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[netbsd-mini2440.git] / sys / arch / vax / include / lcgreg.h
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1 /* $NetBSD: lcgreg.h,v 1.4 2005/12/11 12:19:34 christos Exp $ */
3 /*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 #ifndef _VAX_LCGREG_H
33 #define _VAX_LCGREG_H
35 /* The registers of the LCG used in the VS4000/60 and VS4000/VLC.
36 * All relative to 0x20100000
39 /* Memory Control, Flow Control, Configuration Registers
41 #define LCG_REG_MEM_CONFIG 0x001800
42 #define LCG_REG_MEM_STATUS 0x001804
43 #define LCG_REG_MEM_CURRENT_STATE 0x001808
44 #define LCG_REG_MEM_ERROR 0x00180c
45 #define LCG_REG_SLOW_CONTROL_STATUS 0x001810
47 /* Video Control Registers
49 #define LCG_REG_VIDEO_CONFIG 0x001e00
50 #define LCG_REG_VIDEO_HTIMING 0x001e10
51 #define LCG_REG_VIDEO_VTIMING 0x001e14
52 #define LCG_REG_VIDEO_TIMING 0x001e18
53 #define LCG_REG_VIDEO_X 0x000e30
54 #define LCG_REG_VIDEO_Y 0x000e30
55 #define LCG_REG_VIDEO_REFRESH_BASE 0x000e34
56 #define LCG_REG_VIDEO_REFRESH_SHIFT 0x000e40
57 #define LCG_REG_VIDEO_LUT_LOAD_COUNT 0x000e40
58 #define LCG_REG_CURSOR_SCANLINE_LW0 0x000e50
59 #define LCG_REG_CURSOR_SCANLINE_LW1 0x000e54
60 #define LCG_REG_CURSOR_SCANLINE_LW2 0x000e58
61 #define LCG_REG_CURSOR_SCANLINE_LW3 0x000e5c
62 #define LCG_REG_CURSOR_BASE 0x000e80
63 #define LCG_REG_CURSOR_XY 0x000e84
64 #define LCG_REG_CURSOR_X 0x000e84
65 #define LCG_REG_CURSOR_Y 0x000e84
66 #define LCG_REG_LUT_CONSOLE_SEL 0x000ee0
67 #define LCG_REG_LUT_COLOR_BASE_W 0x0006e4
68 #define LCG_REG_LUT_COLOR_BASE_R 0x0006e4
69 #define LCG_REG_LUT_CONTROL_BASE 0x000ee8
70 #define LCG_REG_VIDEO_COUNTER_TEST 0x000f00
71 #define LCG_REG_MEM_REFRESH_BASE 0x000f04
73 /* Graphics Control and VM Registers
75 #define LCG_REG_LCG_GO 0x000c80
76 #define LCG_REG_NEXT_ADDRESS 0x001334
77 #define LCG_REG_PA_SPTE_PTE 0x001338
78 #define LCG_REG_TB_INVALIDATE_SINGLE 0x001a00
79 #define LCG_REG_TB_INVALIDATE_ALL 0x001a08
80 #define LCG_REG_TB_INVALIDATE_STATUS 0x001a10
81 #define LCG_REG_TB_STATUS 0x001c00
82 #define LCG_REG_TB_VPN_COUNT 0x001c04
83 #define LCG_REG_TB_DEST_VPN 0x001c14
84 #define LCG_REG_TB_SOURCE_VPN 0x001c18
85 #define LCG_REG_TB_STENCIL_VPN 0x001c1c
86 #define LCG_REG_TB_DEST_DATA_PFN_R 0x001c24
87 #define LCG_REG_TB_DEST_DATA_PFN_W 0x001c24
88 #define LCG_REG_TB_SOURCE_DATA_PFN_R 0x001c28
89 #define LCG_REG_TB_SOURCE_DATA_PFN_W 0x001c28
90 #define LCG_REG_TB_STENCIL_DATA_PFN_R 0x001c2c
91 #define LCG_REG_TB_STENCIL_DATA_PFN_W 0x001c2c
92 #define LCG_REG_TB_DEST_PRE_PFN_R 0x001c34
93 #define LCG_REG_TB_DEST_PRE_PFN_W 0x001c34
94 #define LCG_REG_TB_SOURCE_PTE_PFN_R 0x001c38
95 #define LCG_REG_TB_SOURCE_PTE_PFN_W 0x001c38
96 #define LCG_REG_TB_STENCIL_PTE_PFN_R 0x001c3c
97 #define LCG_REG_TB_STENCIL_PTE_PFN_W 0x001c3c
98 #define LCG_REG_GRAPHICS_CONFIG 0x001c90
99 #define LCG_REG_GRAPHICS_INT_STATUS 0x001c94
100 #define LCG_REG_GRAPHICS_INT_SET_ENABLE 0x001c98
101 #define LCG_REG_GRAPHICS_INT_CLR_ENABLE 0x001c9c
102 #define LCG_REG_GRAPHICS_SUB_STATUS 0x001ca0
103 #define LCG_REG_GRAPHICS_CONTROL 0x001ca4
104 #define LCG_REG_BREAKPT_ADDRESS 0x001cb0
105 #define LCG_REG_BREAKPT_VIRTUAL 0x001cb0
106 #define LCG_REG_WRITE_PROTECT_LOW_HIGH 0x001cc0
107 #define LCG_REG_WRITE_PROTECT_LOW 0x001cc0
108 #define LCG_REG_WRITE_PROTECT_HIGH 0x001cc0
109 #define LCG_REG_MAX_VIRTUAL_ADDRESS 0x002350
110 #define LCG_REG_PA_SPTE_POBR 0x002354
112 /* Clip List / Command FIFO Registers
114 #define LCG_REG_CLIP_LIST_OFFSET 0x0004e4
115 #define LCG_REG_CLIP_LIST_BASE 0x0004e4
116 #define LCG_REG_CLIP_LIST 0x0004e4
117 #define LCG_REG_FIFO_MASKS 0x000570
118 #define LCG_REG_FIFO_HEAD_OFFSET 0x000574
119 #define LCG_REG_FIFO_BASE 0x000574
120 #define LCG_REG_FIFO_HEAD 0x000574
121 #define LCG_REG_FIFO_TAIL_OFFSET 0x000578
122 #define LCG_REG_FIFO_BASE2 0x000578
123 #define LCG_REG_FIFO_TAIL 0x000578
124 #define LCG_REG_CLIP_LIST_SAVE_OFFSET 0x000ce4
125 #define LCG_REG_FIFO_RESIDUE_LW0 0x000d04
126 #define LCG_REG_FIFO_RESIDUE_LW1 0x000d08
127 #define LCG_REG_FIFO_RESIDUE_LW2 0x000d0c
128 #define LCG_REG_FIFO_LENGTH 0x000d70
129 #define LCG_REG_FIFO_SAVE_HEAD_OFFSET 0x000d74
130 #define LCG_REG_FIFO_WINDOW_BASE 0x080000
131 #define LCG_REG_FIFO_WINDOW_END 0x100000
133 /* Graphics Data Buffer and Pixel SLU Registers
135 #define LCG_REG_LOGICAL_FUNCTION 0x000220
136 #define LCG_REG_PLANE_MASK 0x000234
137 #define LCG_REG_SOURCE_PLANE_INDEX 0x00026c
138 #define LCG_REG_FOREGROUND_PIXEL 0x0002c0
139 #define LCG_REG_BACKGROUND_PIXEL 0x0004c0
140 #define LCG_REG_GDB_LW0 0x000d80
141 #define LCG_REG_GDB_LW1 0x000d84
142 #define LCG_REG_GDB_LW2 0x000d88
143 #define LCG_REG_GDB_LW3 0x000d8c
144 #define LCG_REG_GDB_LW4 0x000d90
145 #define LCG_REG_GDB_LW5 0x000d94
146 #define LCG_REG_GDB_LW6 0x000d98
147 #define LCG_REG_GDB_LW7 0x000d9c
148 #define LCG_REG_SLU_STATE 0x000da0
150 /* Address Generator Registers
152 #define LCG_REG_CLIP_MIN_Y 0x000244
153 #define LCG_REG_CLIP_MIN_MAX_X 0x000248
154 #define LCG_REG_CLIP_MIN_X 0x000248
155 #define LCG_REG_CLIP_MAX_X 0x000248
156 #define LCG_REG_CLIP_MAX_Y 0x00024c
157 #define LCG_REG_DEST_X_BIAS 0x000250
158 #define LCG_REG_DEST_Y_ORIGIN 0x000254
159 #define LCG_REG_DEST_Y_STEP 0x000258
160 #define LCG_REG_SOURCE_X_BIAS 0x000260
161 #define LCG_REG_SOURCE_Y_BASE 0x000264
162 #define LCG_REG_SOURCE_Y_STEP_WIDTH 0x000268
163 #define LCG_REG_SOURCE_Y_STEP 0x000268
164 #define LCG_REG_SOURCE_WIDTH 0x000268
165 #define LCG_REG_STENCIL_X_BIAS 0x000270
166 #define LCG_REG_STENCIL_Y_BASE 0x000274
167 #define LCG_REG_STENCIL_Y_STEP 0x000278
168 #define LCG_REG_DEST_Y_BASE 0x000284
169 #define LCG_REG_DEST_X 0x000290
170 #define LCG_REG_DEST_WIDTH_HEIGHT 0x000294
171 #define LCG_REG_DEST_WIDTH 0x000294
172 #define LCG_REG_DEST_HEIGHT 0x000294
173 #define LCG_REG_AG_STATUS2 0x000320
174 #define LCG_REG_AG_CURRENT_STATE 0x000320
175 #define LCG_REG_CURRENT_OPCODE 0x000320
176 #define LCG_REG_OP_ACTION_CODE 0x000320
177 #define LCG_REG_AG_STATUS 0x000324
178 #define LCG_REG_NEXT_X 0x000330
179 #define LCG_REG_CLIP_X_DIFF 0x000330
180 #define LCG_REG_SOURCE_X_BIAS0 0x000460
181 #define LCG_REG_SOURCE_WIDTH0 0x000468
182 #define LCG_REG_DEST_X0 0x000490
183 #define LCG_REG_DEST_WIDTH0 0x000494
184 #define LCG_REG_TILE_ROTATION 0x000660
185 #define LCG_REG_TILE_WIDTH 0x000668
187 #endif /* _VAX_LCGREG_H */