sys/arch/x86/include/cpu.h

   1 /*      $NetBSD: cpu.h,v 1.17 2009/04/30 00:07:23 rmind Exp $   */
   2
   3 /*-
   4  * Copyright (c) 1990 The Regents of the University of California.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to Berkeley by
   8  * William Jolitz.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  * 3. Neither the name of the University nor the names of its contributors
  19  *    may be used to endorse or promote products derived from this software
  20  *    without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  *      @(#)cpu.h       5.4 (Berkeley) 5/9/91
  35  */
  36
  37 #ifndef _X86_CPU_H_
  38 #define _X86_CPU_H_
  39
  40 #if defined(_KERNEL) || defined(_KMEMUSER)
  41 #if defined(_KERNEL_OPT)
  42 #include "opt_xen.h"
  43 #ifdef i386
  44 #include "opt_user_ldt.h"
  45 #include "opt_vm86.h"
  46 #endif
  47 #endif
  48
  49 /*
  50  * Definitions unique to x86 cpu support.
  51  */
  52 #include <machine/frame.h>
  53 #include <machine/segments.h>
  54 #include <machine/tss.h>
  55 #include <machine/intrdefs.h>
  56
  57 #include <x86/cacheinfo.h>
  58 #include <x86/via_padlock.h>
  59
  60 #include <sys/cpu_data.h>
  61 #include <sys/evcnt.h>
  62
  63 struct intrsource;
  64 struct pmap;
  65 struct device;
  66
  67 #ifdef __x86_64__
  68 #define i386tss x86_64_tss
  69 #endif
  70
  71 #define NIOPORTS        1024            /* # of ports we allow to be mapped */
  72 #define IOMAPSIZE       (NIOPORTS / 8)  /* I/O bitmap size in bytes */
  73
  74 /*
  75  * a bunch of this belongs in cpuvar.h; move it later..
  76  */
  77
  78 struct cpu_info {
  79         struct device *ci_dev;          /* pointer to our device */
  80         struct cpu_info *ci_self;       /* self-pointer */
  81         volatile struct vcpu_info *ci_vcpu; /* for XEN */
  82         void    *ci_tlog_base;          /* Trap log base */
  83         int32_t ci_tlog_offset;         /* Trap log current offset */
  84
  85         /*
  86          * Will be accessed by other CPUs.
  87          */
  88         struct cpu_info *ci_next;       /* next cpu */
  89         struct lwp *ci_curlwp;          /* current owner of the processor */
  90         struct pmap_cpu *ci_pmap_cpu;   /* per-CPU pmap data */
  91         struct lwp *ci_fpcurlwp;        /* current owner of the FPU */
  92         int     ci_fpsaving;            /* save in progress */
  93         int     ci_fpused;              /* XEN: FPU was used by curlwp */
  94         cpuid_t ci_cpuid;               /* our CPU ID */
  95         int     ci_cpumask;             /* (1 << CPU ID) */
  96         uint8_t ci_initapicid;          /* our intitial APIC ID */
  97         uint8_t ci_packageid;
  98         uint8_t ci_coreid;
  99         uint8_t ci_smtid;
 100         struct cpu_data ci_data;        /* MI per-cpu data */
 101
 102         /*
 103          * Private members.
 104          */
 105         struct evcnt ci_tlb_evcnt;      /* tlb shootdown counter */
 106         struct pmap *ci_pmap;           /* current pmap */
 107         int ci_need_tlbwait;            /* need to wait for TLB invalidations */
 108         int ci_want_pmapload;           /* pmap_load() is needed */
 109         volatile int ci_tlbstate;       /* one of TLBSTATE_ states. see below */
 110 #define TLBSTATE_VALID  0       /* all user tlbs are valid */
 111 #define TLBSTATE_LAZY   1       /* tlbs are valid but won't be kept uptodate */
 112 #define TLBSTATE_STALE  2       /* we might have stale user tlbs */
 113         int ci_curldt;          /* current LDT descriptor */
 114         int ci_nintrhand;       /* number of H/W interrupt handlers */
 115         uint64_t ci_scratch;
 116
 117 #ifdef XEN
 118         struct iplsource  *ci_isources[NIPL];
 119 #else
 120         struct intrsource *ci_isources[MAX_INTR_SOURCES];
 121 #endif
 122         volatile int    ci_mtx_count;   /* Negative count of spin mutexes */
 123         volatile int    ci_mtx_oldspl;  /* Old SPL at this ci_idepth */
 124
 125         /* The following must be aligned for cmpxchg8b. */
 126         struct {
 127                 uint32_t        ipending;
 128                 int             ilevel;
 129         } ci_istate __aligned(8);
 130 #define ci_ipending     ci_istate.ipending
 131 #define ci_ilevel       ci_istate.ilevel
 132
 133         int             ci_idepth;
 134         void *          ci_intrstack;
 135         uint32_t        ci_imask[NIPL];
 136         uint32_t        ci_iunmask[NIPL];
 137
 138         uint32_t ci_flags;              /* flags; see below */
 139         uint32_t ci_ipis;               /* interprocessor interrupts pending */
 140         int sc_apic_version;            /* local APIC version */
 141
 142         uint32_t        ci_signature;    /* X86 cpuid type */
 143         uint32_t        ci_feature_flags;/* X86 %edx CPUID feature bits */
 144         uint32_t        ci_feature2_flags;/* X86 %ecx CPUID feature bits */
 145         uint32_t        ci_feature3_flags;/* X86 extended %edx feature bits */
 146         uint32_t        ci_feature4_flags;/* X86 extended %ecx feature bits */
 147         uint32_t        ci_padlock_flags;/* VIA PadLock feature bits */
 148         uint32_t        ci_vendor[4];    /* vendor string */
 149         uint32_t        ci_cpu_serial[3]; /* PIII serial number */
 150         volatile uint32_t       ci_lapic_counter;
 151
 152         const struct cpu_functions *ci_func;  /* start/stop functions */
 153         struct trapframe *ci_ddb_regs;
 154
 155         u_int ci_cflush_lsize;  /* CFLUSH insn line size */
 156         struct x86_cache_info ci_cinfo[CAI_COUNT];
 157
 158         union descriptor *ci_gdt;
 159
 160 #ifdef i386
 161         struct i386tss  ci_doubleflt_tss;
 162         struct i386tss  ci_ddbipi_tss;
 163 #endif
 164         char *ci_doubleflt_stack;
 165         char *ci_ddbipi_stack;
 166
 167         struct evcnt ci_ipi_events[X86_NIPI];
 168
 169         struct via_padlock      ci_vp;  /* VIA PadLock private storage */
 170
 171         struct i386tss  ci_tss;         /* Per-cpu TSS; shared among LWPs */
 172         char            ci_iomap[IOMAPSIZE]; /* I/O Bitmap */
 173         int ci_tss_sel;                 /* TSS selector of this cpu */
 174
 175         /*
 176          * The following two are actually region_descriptors,
 177          * but that would pollute the namespace.
 178          */
 179         uintptr_t       ci_suspend_gdt;
 180         uint16_t        ci_suspend_gdt_padding;
 181         uintptr_t       ci_suspend_idt;
 182         uint16_t        ci_suspend_idt_padding;
 183
 184         uint16_t        ci_suspend_tr;
 185         uint16_t        ci_suspend_ldt;
 186         uintptr_t       ci_suspend_fs;
 187         uintptr_t       ci_suspend_gs;
 188         uintptr_t       ci_suspend_kgs;
 189         uintptr_t       ci_suspend_efer;
 190         uintptr_t       ci_suspend_reg[12];
 191         uintptr_t       ci_suspend_cr0;
 192         uintptr_t       ci_suspend_cr2;
 193         uintptr_t       ci_suspend_cr3;
 194         uintptr_t       ci_suspend_cr4;
 195         uintptr_t       ci_suspend_cr8;
 196
 197         /* The following must be in a single cache line. */
 198         int             ci_want_resched __aligned(64);
 199         int             ci_padout __aligned(64);
 200 };
 201
 202 /*
 203  * Macros to handle (some) trapframe registers for common x86 code.
 204  */
 205 #ifdef __x86_64__
 206 #define X86_TF_RAX(tf)          tf->tf_rax
 207 #define X86_TF_RDX(tf)          tf->tf_rdx
 208 #define X86_TF_RSP(tf)          tf->tf_rsp
 209 #define X86_TF_RIP(tf)          tf->tf_rip
 210 #define X86_TF_RFLAGS(tf)       tf->tf_rflags
 211 #else
 212 #define X86_TF_RAX(tf)          tf->tf_eax
 213 #define X86_TF_RDX(tf)          tf->tf_edx
 214 #define X86_TF_RSP(tf)          tf->tf_esp
 215 #define X86_TF_RIP(tf)          tf->tf_eip
 216 #define X86_TF_RFLAGS(tf)       tf->tf_eflags
 217 #endif
 218
 219 /*
 220  * Processor flag notes: The "primary" CPU has certain MI-defined
 221  * roles (mostly relating to hardclock handling); we distinguish
 222  * betwen the processor which booted us, and the processor currently
 223  * holding the "primary" role just to give us the flexibility later to
 224  * change primaries should we be sufficiently twisted.
 225  */
 226
 227 #define CPUF_BSP        0x0001          /* CPU is the original BSP */
 228 #define CPUF_AP         0x0002          /* CPU is an AP */
 229 #define CPUF_SP         0x0004          /* CPU is only processor */
 230 #define CPUF_PRIMARY    0x0008          /* CPU is active primary processor */
 231
 232 #define CPUF_SYNCTSC    0x0800          /* Synchronize TSC */
 233 #define CPUF_PRESENT    0x1000          /* CPU is present */
 234 #define CPUF_RUNNING    0x2000          /* CPU is running */
 235 #define CPUF_PAUSE      0x4000          /* CPU is paused in DDB */
 236 #define CPUF_GO         0x8000          /* CPU should start running */
 237
 238 /*
 239  * We statically allocate the CPU info for the primary CPU (or,
 240  * the only CPU on uniprocessors), and the primary CPU is the
 241  * first CPU on the CPU info list.
 242  */
 243 extern struct cpu_info cpu_info_primary;
 244 extern struct cpu_info *cpu_info_list;
 245
 246 #define CPU_INFO_ITERATOR               int
 247 #define CPU_INFO_FOREACH(cii, ci)       cii = 0, ci = cpu_info_list; \
 248                                         ci != NULL; ci = ci->ci_next
 249
 250 #define CPU_STARTUP(_ci, _target)       ((_ci)->ci_func->start(_ci, _target))
 251 #define CPU_STOP(_ci)                   ((_ci)->ci_func->stop(_ci))
 252 #define CPU_START_CLEANUP(_ci)          ((_ci)->ci_func->cleanup(_ci))
 253
 254 #if !defined(__GNUC__) || defined(_MODULE)
 255 /* For non-GCC and modules */
 256 struct cpu_info *x86_curcpu(void);
 257 void    cpu_set_curpri(int);
 258 # ifdef __GNUC__
 259 lwp_t   *x86_curlwp(void) __attribute__ ((const));
 260 # else
 261 lwp_t   *x86_curlwp(void);
 262 # endif
 263 #endif
 264
 265 #define cpu_number()            (cpu_index(curcpu()))
 266
 267 #define CPU_IS_PRIMARY(ci)      ((ci)->ci_flags & CPUF_PRIMARY)
 268
 269 #define X86_AST_GENERIC         0x01
 270 #define X86_AST_PREEMPT         0x02
 271
 272 #define aston(l, why)           ((l)->l_md.md_astpending |= (why))
 273 #define cpu_did_resched(l)      ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT)
 274
 275 void cpu_boot_secondary_processors(void);
 276 void cpu_init_idle_lwps(void);
 277 void cpu_init_msrs(struct cpu_info *, bool);
 278
 279 extern uint32_t cpus_attached;
 280 #ifndef XEN
 281 #define curcpu()                x86_curcpu()
 282 #define curlwp                  x86_curlwp()
 283 #else
 284 /* XXX initgdt() calls pmap_kenter_pa() which calls splvm() before %fs is set */
 285 #define curcpu()                (&cpu_info_primary)
 286 #define curlwp                  curcpu()->ci_curlwp
 287 #endif
 288 #define curpcb                  ((struct pcb *)lwp_getpcb(curlwp))
 289
 290 /*
 291  * Arguments to hardclock, softclock and statclock
 292  * encapsulate the previous machine state in an opaque
 293  * clockframe; for now, use generic intrframe.
 294  */
 295 struct clockframe {
 296         struct intrframe cf_if;
 297 };
 298
 299 /*
 300  * Give a profiling tick to the current process when the user profiling
 301  * buffer pages are invalid.  On the i386, request an ast to send us
 302  * through trap(), marking the proc as needing a profiling tick.
 303  */
 304 extern void     cpu_need_proftick(struct lwp *l);
 305
 306 /*
 307  * Notify the LWP l that it has a signal pending, process as soon as
 308  * possible.
 309  */
 310 extern void     cpu_signotify(struct lwp *);
 311
 312 /*
 313  * We need a machine-independent name for this.
 314  */
 315 extern void (*delay_func)(unsigned int);
 316 struct timeval;
 317
 318 #define DELAY(x)                (*delay_func)(x)
 319 #define delay(x)                (*delay_func)(x)
 320
 321 extern int biosbasemem;
 322 extern int biosextmem;
 323 extern unsigned int cpu_feature;
 324 extern unsigned int cpu_feature2;
 325 extern unsigned int cpu_feature_padlock;
 326 extern int cpu;
 327 extern int cpuid_level;
 328 extern int cpu_class;
 329 extern char cpu_brand_string[];
 330
 331 extern int i386_use_fxsave;
 332 extern int i386_has_sse;
 333 extern int i386_has_sse2;
 334
 335 extern void (*x86_cpu_idle)(void);
 336 #define cpu_idle() (*x86_cpu_idle)()
 337
 338 /* machdep.c */
 339 void    dumpconf(void);
 340 void    cpu_reset(void);
 341 void    i386_proc0_tss_ldt_init(void);
 342 void    dumpconf(void);
 343 void    cpu_reset(void);
 344 void    x86_64_proc0_tss_ldt_init(void);
 345 void    x86_64_init_pcb_tss_ldt(struct cpu_info *);
 346
 347 /* longrun.c */
 348 u_int   tmx86_get_longrun_mode(void);
 349 void    tmx86_get_longrun_status(u_int *, u_int *, u_int *);
 350 void    tmx86_init_longrun(void);
 351
 352 /* identcpu.c */
 353 void    cpu_probe(struct cpu_info *);
 354 void    cpu_identify(struct cpu_info *);
 355
 356 /* cpu_topology.c */
 357 void    x86_cpu_toplogy(struct cpu_info *);
 358
 359 /* vm_machdep.c */
 360 void    cpu_proc_fork(struct proc *, struct proc *);
 361
 362 /* locore.s */
 363 struct region_descriptor;
 364 void    lgdt(struct region_descriptor *);
 365 #ifdef XEN
 366 void    lgdt_finish(void);
 367 void    i386_switch_context(lwp_t *);
 368 #endif
 369
 370 struct pcb;
 371 void    savectx(struct pcb *);
 372 void    lwp_trampoline(void);
 373 void    child_trampoline(void);
 374 #ifdef XEN
 375 void    startrtclock(void);
 376 void    xen_delay(unsigned int);
 377 void    xen_initclocks(void);
 378 #else
 379 /* clock.c */
 380 void    initrtclock(u_long);
 381 void    startrtclock(void);
 382 void    i8254_delay(unsigned int);
 383 void    i8254_microtime(struct timeval *);
 384 void    i8254_initclocks(void);
 385 #endif
 386
 387 /* cpu.c */
 388
 389 void    cpu_probe_features(struct cpu_info *);
 390
 391 /* npx.c */
 392 void    npxsave_lwp(struct lwp *, bool);
 393 void    npxsave_cpu(bool);
 394
 395 /* vm_machdep.c */
 396 paddr_t kvtop(void *);
 397
 398 #ifdef USER_LDT
 399 /* sys_machdep.h */
 400 int     x86_get_ldt(struct lwp *, void *, register_t *);
 401 int     x86_set_ldt(struct lwp *, void *, register_t *);
 402 #endif
 403
 404 /* isa_machdep.c */
 405 void    isa_defaultirq(void);
 406 int     isa_nmi(void);
 407
 408 #ifdef VM86
 409 /* vm86.c */
 410 void    vm86_gpfault(struct lwp *, int);
 411 #endif /* VM86 */
 412
 413 /* consinit.c */
 414 void kgdb_port_init(void);
 415
 416 /* bus_machdep.c */
 417 void x86_bus_space_init(void);
 418 void x86_bus_space_mallocok(void);
 419
 420 #include <machine/psl.h>        /* Must be after struct cpu_info declaration */
 421
 422 #endif /* _KERNEL || __KMEMUSER */
 423
 424 #if defined(_KERNEL) || defined(_STANDALONE)
 425 #include <sys/types.h>
 426 #else
 427 #include <stdbool.h>
 428 #endif /* _KERNEL || _STANDALONE */
 429
 430 /*
 431  * CTL_MACHDEP definitions.
 432  */
 433 #define CPU_CONSDEV             1       /* dev_t: console terminal device */
 434 #define CPU_BIOSBASEMEM         2       /* int: bios-reported base mem (K) */
 435 #define CPU_BIOSEXTMEM          3       /* int: bios-reported ext. mem (K) */
 436 /*      CPU_NKPDE               4       obsolete: int: number of kernel PDEs */
 437 #define CPU_BOOTED_KERNEL       5       /* string: booted kernel name */
 438 #define CPU_DISKINFO            6       /* struct disklist *:
 439                                          * disk geometry information */
 440 #define CPU_FPU_PRESENT         7       /* int: FPU is present */
 441 #define CPU_OSFXSR              8       /* int: OS uses FXSAVE/FXRSTOR */
 442 #define CPU_SSE                 9       /* int: OS/CPU supports SSE */
 443 #define CPU_SSE2                10      /* int: OS/CPU supports SSE2 */
 444 #define CPU_TMLR_MODE           11      /* int: longrun mode
 445                                          * 0: minimum frequency
 446                                          * 1: economy
 447                                          * 2: performance
 448                                          * 3: maximum frequency
 449                                          */
 450 #define CPU_TMLR_FREQUENCY      12      /* int: current frequency */
 451 #define CPU_TMLR_VOLTAGE        13      /* int: curret voltage */
 452 #define CPU_TMLR_PERCENTAGE     14      /* int: current clock percentage */
 453 #define CPU_MAXID               15      /* number of valid machdep ids */
 454
 455 /*
 456  * Structure for CPU_DISKINFO sysctl call.
 457  * XXX this should be somewhere else.
 458  */
 459 #define MAX_BIOSDISKS   16
 460
 461 struct disklist {
 462         int dl_nbiosdisks;                         /* number of bios disks */
 463         struct biosdisk_info {
 464                 int bi_dev;                        /* BIOS device # (0x80 ..) */
 465                 int bi_cyl;                        /* cylinders on disk */
 466                 int bi_head;                       /* heads per track */
 467                 int bi_sec;                        /* sectors per track */
 468                 uint64_t bi_lbasecs;               /* total sec. (iff ext13) */
 469 #define BIFLAG_INVALID          0x01
 470 #define BIFLAG_EXTINT13         0x02
 471                 int bi_flags;
 472         } dl_biosdisks[MAX_BIOSDISKS];
 473
 474         int dl_nnativedisks;                       /* number of native disks */
 475         struct nativedisk_info {
 476                 char ni_devname[16];               /* native device name */
 477                 int ni_nmatches;                   /* # of matches w/ BIOS */
 478                 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
 479         } dl_nativedisks[1];                       /* actually longer */
 480 };
 481 #endif /* !_X86_CPU_H_ */