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[netbsd-mini2440.git] / sys / arch / zaurus / dev / wm8750reg.h
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1 /* $NetBSD$ */
2 /* $OpenBSD: wm8750reg.h,v 1.2 2005/12/31 04:31:27 deraadt Exp $ */
4 /*
5 * Copyright (c) 2005 Christopher Pascoe <c.pascoe@itee.uq.edu.au>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #ifndef _DEV_IC_WM8750REG_H_
21 #define _DEV_IC_WM8750REG_H_
24 * Wolfson Microelectronics' WM8750 I2C/I2S audio codec:
25 * - I2C register definitions. Used in the Sharp Zaurus SL-C3000.
28 #define LINVOL_REG 0x00 /* Left Input volume */
29 #define LINVOL_LIVU 0x100
30 #define LINVOL_LINMUTE 0x80
31 #define LINVOL_LIZC 0x40
32 #define LINVOL_LINVOL_MASK 0x3F
33 #define LINVOL_GET_LINVOL(x) ((x) & 0x3F)
34 #define LINVOL_SET_LINVOL(x) (x)
36 #define RINVOL_REG 0x01 /* Right Input volume */
37 #define RINVOL_RIVU 0x100
38 #define RINVOL_RINMUTE 0x80
39 #define RINVOL_RIZC 0x40
40 #define RINVOL_RINVOL_MASK 0x3F
41 #define RINVOL_GET_RINVOL(x) ((x) & 0x3F)
42 #define RINVOL_SET_RINVOL(x) (x)
44 #define LOUT1VOL_REG 0x02 /* LOUT1 volume */
45 #define LOUT1VOL_LO1VU 0x100
46 #define LOUT1VOL_LO1ZC 0x80
47 #define LOUT1VOL_LOUT1VOL_MASK 0x7F
48 #define LOUT1VOL_GET_LOUT1VOL(x) ((x) & 0x7F)
49 #define LOUT1VOL_SET_LOUT1VOL(x) (x)
51 #define ROUT1VOL_REG 0x03 /* ROUT1 volume */
52 #define ROUT1VOL_RO1VU 0x100
53 #define ROUT1VOL_RO1ZC 0x80
54 #define ROUT1VOL_ROUT1VOL_MASK 0x7F
55 #define ROUT1VOL_GET_ROUT1VOL(x) ((x) & 0x7F)
56 #define ROUT1VOL_SET_ROUT1VOL(x) (x)
58 #define ADCDACCTL_REG 0x05 /* ADC & DAC Control */
59 #define ADCDACCTL_ADCDIV2 0x100
60 #define ADCDACCTL_DACDIV2 0x80
61 #define ADCDACCTL_ADCPOL_MASK 0x60
62 #define ADCDACCTL_GET_ADCPOL(x) (((x) >> 5) & 0x60)
63 #define ADCDACCTL_SET_ADCPOL(x) ((x) << 5)
64 #define ADCDACCTL_HPOR 0x10
65 #define ADCDACCTL_DACMU 0x8
66 #define ADCDACCTL_DEEMPH_MASK 0x6
67 #define ADCDACCTL_GET_DEEMPH(x) (((x) >> 1) & 0x6)
68 #define ADCDACCTL_SET_DEEMPH(x) ((x) << 1)
69 #define ADCDACCTL_ADCHPD 0x1
71 #define AUDINT_REG 0x07 /* Audio Interface */
72 #define AUDINT_BCLKINV 0x80
73 #define AUDINT_MS 0x40
74 #define AUDINT_LRSWAP 0x20
75 #define AUDINT_LRP 0x10
76 #define AUDINT_WL_MASK 0xC
77 #define AUDINT_GET_WL(x) (((x) >> 2) & 0xC)
78 #define AUDINT_SET_WL(x) ((x) << 2)
79 #define AUDINT_FORMAT_MASK 0x3
80 #define AUDINT_GET_FORMAT(x) ((x) & 0x3)
81 #define AUDINT_SET_FORMAT(x) (x)
83 #define SRATE_REG 0x08 /* Sample rate */
84 #define SRATE_BCM_MASK 0x180
85 #define SRATE_GET_BCM(x) (((x) >> 7) & 0x180)
86 #define SRATE_SET_BCM(x) ((x) << 7)
87 #define SRATE_CLKDIV2 0x40
88 #define SRATE_SR_MASK 0x3E
89 #define SRATE_GET_SR(x) (((x) >> 1) & 0x3E)
90 #define SRATE_SET_SR(x) ((x) << 1)
91 #define SRATE_USB 0x1
93 #define LDACVOL_REG 0x0A /* Left DAC volume */
94 #define LDACVOL_LDVU 0x100
95 #define LDACVOL_LDACVOL_MASK 0xFF
96 #define LDACVOL_GET_LDACVOL(x) ((x) & 0xFF)
97 #define LDACVOL_SET_LDACVOL(x) (x)
99 #define RDACVOL_REG 0x0B /* Right DAC volume */
100 #define RDACVOL_RDVU 0x100
101 #define RDACVOL_RDACVOL_MASK 0xFF
102 #define RDACVOL_GET_RDACVOL(x) ((x) & 0xFF)
103 #define RDACVOL_SET_RDACVOL(x) (x)
105 #define BASSCTL_REG 0x0C /* Bass control */
106 #define BASSCTL_BB 0x80
107 #define BASSCTL_BC 0x40
108 #define BASSCTL_BASS_MASK 0xF
109 #define BASSCTL_GET_BASS(x) ((x) & 0xF)
110 #define BASSCTL_SET_BASS(x) (x)
112 #define TREBCTL_REG 0x0D /* Treble control */
113 #define TREBCTL_TC 0x40
114 #define TREBCTL_TRBL_MASK 0xF
115 #define TREBCTL_GET_TRBL(x) ((x) & 0xF)
116 #define TREBCTL_SET_TRBL(x) (x)
118 #define RESET_REG 0x0F /* Reset */
120 #define C3DCTL_REG 0x10 /* 3D control */
121 #define C3DCTL_MODE3D 0x80
122 #define C3DCTL_3DUC 0x40
123 #define C3DCTL_3DLC 0x20
124 #define C3DCTL_3DDEPTH_MASK 0x1E
125 #define C3DCTL_GET_3DDEPTH(x) (((x) >> 1) & 0x1E)
126 #define C3DCTL_SET_3DDEPTH(x) ((x) << 1)
127 #define C3DCTL_3DEN 0x1
129 #define ALC1_REG 0x11 /* ALC1 */
130 #define ALC1_ALCSEL_MASK 0x180
131 #define ALC1_GET_ALCSEL(x) (((x) >> 7) & 0x180)
132 #define ALC1_SET_ALCSEL(x) ((x) << 7)
133 #define ALC1_MAXGAIN_MASK 0x70
134 #define ALC1_GET_MAXGAIN(x) (((x) >> 4) & 0x70)
135 #define ALC1_SET_MAXGAIN(x) ((x) << 4)
136 #define ALC1_ALCL_MASK 0xF
137 #define ALC1_GET_ALCL(x) ((x) & 0xF)
138 #define ALC1_SET_ALCL(x) (x)
140 #define ALC2_REG 0x12 /* ALC2 */
141 #define ALC2_ALCZC 0x80
142 #define ALC2_HLD_MASK 0xF
143 #define ALC2_GET_HLD(x) ((x) & 0xF)
144 #define ALC2_SET_HLD(x) (x)
146 #define ALC3_REG 0x13 /* ALC3 */
147 #define ALC3_DCY_MASK 0xF0
148 #define ALC3_GET_DCY(x) (((x) >> 4) & 0xF0)
149 #define ALC3_SET_DCY(x) ((x) << 4)
150 #define ALC3_ATK_MASK 0xF
151 #define ALC3_GET_ATK(x) ((x) & 0xF)
152 #define ALC3_SET_ATK(x) (x)
154 #define NOISEGATE_REG 0x14 /* Noise Gate */
155 #define NOISEGATE_NGTH_MASK 0xF8
156 #define NOISEGATE_GET_NGTH(x) (((x) >> 3) & 0xF8)
157 #define NOISEGATE_SET_NGTH(x) ((x) << 3)
158 #define NOISEGATE_NGG_MASK 0x6
159 #define NOISEGATE_GET_NGG(x) (((x) >> 1) & 0x6)
160 #define NOISEGATE_SET_NGG(x) ((x) << 1)
161 #define NOISEGATE_NGAT 0x1
163 #define LADCVOL_REG 0x15 /* Left ADC volume */
164 #define LADCVOL_LAVU 0x100
165 #define LADCVOL_LADCVOL_MASK 0xFF
166 #define LADCVOL_GET_LADCVOL(x) ((x) & 0xFF)
167 #define LADCVOL_SET_LADCVOL(x) (x)
169 #define RADCVOL_REG 0x16 /* Right ADC volume */
170 #define RADCVOL_RAVU 0x100
171 #define RADCVOL_RADCVOL_MASK 0xFF
172 #define RADCVOL_GET_RADCVOL(x) ((x) & 0xFF)
173 #define RADCVOL_SET_RADCVOL(x) (x)
175 #define ADCTL1_REG 0x17 /* Additional control(1) */
176 #define ADCTL1_TSDEN 0x100
177 #define ADCTL1_VSEL_MASK 0xC0
178 #define ADCTL1_GET_VSEL(x) (((x) >> 6) & 0xC0)
179 #define ADCTL1_SET_VSEL(x) ((x) << 6)
180 #define ADCTL1_DMONOMIX_MASK 0x30
181 #define ADCTL1_GET_DMONOMIX(x) (((x) >> 4) & 0x30)
182 #define ADCTL1_SET_DMONOMIX(x) ((x) << 4)
183 #define ADCTL1_DATSEL_MASK 0xC
184 #define ADCTL1_GET_DATSEL(x) (((x) >> 2) & 0xC)
185 #define ADCTL1_SET_DATSEL(x) ((x) << 2)
186 #define ADCTL1_DACINV 0x2
187 #define ADCTL1_TOEN 0x1
189 #define ADCTL2_REG 0x18 /* Additional control(2) */
190 #define ADCTL2_OUTSW3_MASK 0x180
191 #define ADCTL2_GET_OUTSW3(x) (((x) >> 7) & 0x180)
192 #define ADCTL2_SET_OUTSW3(x) ((x) << 7)
193 #define ADCTL2_HPSWEN 0x40
194 #define ADCTL2_HPSWPOL 0x20
195 #define ADCTL2_ROUT2INV 0x10
196 #define ADCTL2_TRI 0x08
197 #define ADCTL2_LRCM 0x04
198 #define ADCTL2_ADCOSR 0x02
199 #define ADCTL2_DACOSR 0x01
201 #define PWRMGMT1_REG 0x19 /* Pwr Mgmt (1) */
202 #define PWRMGMT1_VMIDSEL_MASK 0x180
203 #define PWRMGMT1_GET_VMIDSEL(x) (((x) >> 7) & 0x180)
204 #define PWRMGMT1_SET_VMIDSEL(x) ((x) << 7)
205 #define PWRMGMT1_VREF 0x40
206 #define PWRMGMT1_AINL 0x20
207 #define PWRMGMT1_AINR 0x10
208 #define PWRMGMT1_ADCL 0x8
209 #define PWRMGMT1_ADCR 0x4
210 #define PWRMGMT1_MICB 0x2
211 #define PWRMGMT1_DIGENB 0x1
213 #define PWRMGMT2_REG 0x1A /* Pwr Mgmt (2) */
214 #define PWRMGMT2_DACL 0x100
215 #define PWRMGMT2_DACR 0x80
216 #define PWRMGMT2_LOUT1 0x40
217 #define PWRMGMT2_ROUT1 0x20
218 #define PWRMGMT2_LOUT2 0x10
219 #define PWRMGMT2_ROUT2 0x8
220 #define PWRMGMT2_MONO 0x4
221 #define PWRMGMT2_OUT3 0x2
223 #define ADCTL3_REG 0x1B /* Additional Control (3) */
224 #define ADCTL3_ADCLRM_MASK 0x180
225 #define ADCTL3_GET_ADCLRM(x) (((x) >> 7) & 0x180)
226 #define ADCTL3_SET_ADCLRM(x) ((x) << 7)
227 #define ADCTL3_VROI 0x40
228 #define ADCTL3_HPFLREN 0x20
230 #define ADCINPMODE_REG 0x1F /* ADC input mode */
231 #define ADCINPMODE_DS 0x100
232 #define ADCINPMODE_MONOMIX_MASK 0xC0
233 #define ADCINPMODE_GET_MONOMIX(x) (((x) >> 6) & 0xC0)
234 #define ADCINPMODE_SET_MONOMIX(x) ((x) << 6)
235 #define ADCINPMODE_RDCM 0x20
236 #define ADCINPMODE_LDCM 0x10
238 #define ADCLSPATH_REG 0x20 /* ADCL signal path */
239 #define ADCLSPATH_LINSEL_MASK 0xC0
240 #define ADCLSPATH_GET_LINSEL(x) (((x) >> 6) & 0xC0)
241 #define ADCLSPATH_SET_LINSEL(x) ((x) << 6)
242 #define ADCLSPATH_LMICBOOST_MASK 0x30
243 #define ADCLSPATH_GET_LMICBOOST(x) (((x) >> 4) & 0x30)
244 #define ADCLSPATH_SET_LMICBOOST(x) ((x) << 4)
246 #define ADCRSPATH_REG 0x21 /* ADCR signal path */
247 #define ADCRSPATH_RINSEL_MASK 0xC0
248 #define ADCRSPATH_GET_RINSEL(x) (((x) >> 6) & 0xC0)
249 #define ADCRSPATH_SET_RINSEL(x) ((x) << 6)
250 #define ADCRSPATH_RMICBOOST_MASK 0x30
251 #define ADCRSPATH_GET_RMICBOOST(x) (((x) >> 4) & 0x30)
252 #define ADCRSPATH_SET_RMICBOOST(x) ((x) << 4)
254 #define LOUTMIX1_REG 0x22 /* Left out Mix (1) */
255 #define LOUTMIX1_LD2LO 0x100
256 #define LOUTMIX1_LI2LO 0x80
257 #define LOUTMIX1_LI2LOVOL_MASK 0x70
258 #define LOUTMIX1_GET_LI2LOVOL(x) (((x) >> 4) & 0x70)
259 #define LOUTMIX1_SET_LI2LOVOL(x) ((x) << 4)
260 #define LOUTMIX1_LMIXSEL_MASK 0x7
261 #define LOUTMIX1_GET_LMIXSEL(x) ((x) & 0x7)
262 #define LOUTMIX1_SET_LMIXSEL(x) (x)
264 #define LOUTMIX2_REG 0x23 /* Left out Mix (2) */
265 #define LOUTMIX2_RD2LO 0x100
266 #define LOUTMIX2_RI2LO 0x80
267 #define LOUTMIX2_RI2LOVOL_MASK 0x70
268 #define LOUTMIX2_GET_RI2LOVOL(x) (((x) >> 4) & 0x70)
269 #define LOUTMIX2_SET_RI2LOVOL(x) ((x) << 4)
271 #define ROUTMIX1_REG 0x24 /* Right out Mix (1) */
272 #define ROUTMIX1_LD2RO 0x100
273 #define ROUTMIX1_LI2RO 0x80
274 #define ROUTMIX1_LI2ROVOL_MASK 0x70
275 #define ROUTMIX1_GET_LI2ROVOL(x) (((x) >> 4) & 0x70)
276 #define ROUTMIX1_SET_LI2ROVOL(x) ((x) << 4)
277 #define ROUTMIX1_RMIXSEL_MASK 0x7
278 #define ROUTMIX1_GET_RMIXSEL(x) ((x) & 0x7)
279 #define ROUTMIX1_SET_RMIXSEL(x) (x)
281 #define ROUTMIX2_REG 0x25 /* Right out Mix (2) */
282 #define ROUTMIX2_RD2RO 0x100
283 #define ROUTMIX2_RI2RO 0x80
284 #define ROUTMIX2_RI2ROVOL_MASK 0x70
285 #define ROUTMIX2_GET_RI2ROVOL(x) (((x) >> 4) & 0x70)
286 #define ROUTMIX2_SET_RI2ROVOL(x) ((x) << 4)
288 #define MOUTMIX1_REG 0x26 /* Mono out Mix (1) */
289 #define MOUTMIX1_LD2MO 0x100
290 #define MOUTMIX1_LI2MO 0x80
291 #define MOUTMIX1_LI2MOVOL_MASK 0x70
292 #define MOUTMIX1_GET_LI2MOVOL(x) (((x) >> 4) & 0x70)
293 #define MOUTMIX1_SET_LI2MOVOL(x) ((x) << 4)
295 #define MOUTMIX2_REG 0x27 /* Mono out Mix (2) */
296 #define MOUTMIX2_RD2MO 0x100
297 #define MOUTMIX2_RI2MO 0x80
298 #define MOUTMIX2_RI2MOVOL_MASK 0x70
299 #define MOUTMIX2_GET_RI2MOVOL(x) (((x) >> 4) & 0x70)
300 #define MOUTMIX2_SET_RI2MOVOL(x) ((x) << 4)
302 #define LOUT2VOL_REG 0x28 /* LOUT2 volume */
303 #define LOUT2VOL_LO2VU 0x100
304 #define LOUT2VOL_LO2ZC 0x80
305 #define LOUT2VOL_LOUT2VOL_MASK 0x7F
306 #define LOUT2VOL_GET_LOUT2VOL(x) ((x) & 0x7F)
307 #define LOUT2VOL_SET_LOUT2VOL(x) (x)
309 #define ROUT2VOL_REG 0x29 /* ROUT2 volume */
310 #define ROUT2VOL_RO2VU 0x100
311 #define ROUT2VOL_RO2ZC 0x80
312 #define ROUT2VOL_ROUT2VOL_MASK 0x7F
313 #define ROUT2VOL_GET_ROUT2VOL(x) ((x) & 0x7F)
314 #define ROUT2VOL_SET_ROUT2VOL(x) (x)
316 #define MOUTVOL_REG 0x2A /* MONOOUT volume */
317 #define MOUTVOL_MOZC 0x80
318 #define MOUTVOL_MOUTVOL_MASK 0x7F
319 #define MOUTVOL_GET_MOUTVOL(x) ((x) & 0x7F)
320 #define MOUTVOL_SET_MOUTVOL(x) (x)
322 #endif /* _DEV_IC_WM8750REG_H_ */