sys/dev/i2c/x1226.c

   1 /*      $NetBSD: x1226.c,v 1.13 2008/06/08 03:49:26 tsutsui Exp $       */
   2
   3 /*
   4  * Copyright (c) 2003 Shigeyuki Fukushima.
   5  * All rights reserved.
   6  *
   7  * Written by Shigeyuki Fukushima for the NetBSD Project.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed for the NetBSD Project by
  20  *      Shigeyuki Fukushima.
  21  * 4. The name of Shigeyuki Fukushima may not be used to endorse
  22  *    or promote products derived from this software without specific prior
  23  *    written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY SHIGEYUKI FUKUSHIMA ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL SHIGEYUKI FUKUSHIMA
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #include <sys/cdefs.h>
  39 __KERNEL_RCSID(0, "$NetBSD: x1226.c,v 1.13 2008/06/08 03:49:26 tsutsui Exp $");
  40
  41 #include <sys/param.h>
  42 #include <sys/systm.h>
  43 #include <sys/device.h>
  44 #include <sys/kernel.h>
  45 #include <sys/fcntl.h>
  46 #include <sys/uio.h>
  47 #include <sys/conf.h>
  48 #include <sys/event.h>
  49
  50 #include <dev/clock_subr.h>
  51
  52 #include <dev/i2c/i2cvar.h>
  53 #include <dev/i2c/x1226reg.h>
  54
  55 struct xrtc_softc {
  56         device_t                sc_dev;
  57         i2c_tag_t               sc_tag;
  58         int                     sc_address;
  59         int                     sc_open;
  60         struct todr_chip_handle sc_todr;
  61 };
  62
  63 static void     xrtc_attach(device_t, device_t, void *);
  64 static int      xrtc_match(device_t, cfdata_t, void *);
  65
  66 CFATTACH_DECL_NEW(xrtc, sizeof(struct xrtc_softc),
  67     xrtc_match, xrtc_attach, NULL, NULL);
  68 extern struct cfdriver xrtc_cd;
  69
  70 dev_type_open(xrtc_open);
  71 dev_type_close(xrtc_close);
  72 dev_type_read(xrtc_read);
  73 dev_type_write(xrtc_write);
  74
  75 const struct cdevsw xrtc_cdevsw = {
  76         xrtc_open, xrtc_close, xrtc_read, xrtc_write,
  77         noioctl, nostop, notty, nopoll, nommap, nokqfilter, D_OTHER
  78 };
  79
  80 static int xrtc_clock_read(struct xrtc_softc *, struct clock_ymdhms *);
  81 static int xrtc_clock_write(struct xrtc_softc *, struct clock_ymdhms *);
  82 static int xrtc_gettime(struct todr_chip_handle *, struct timeval *);
  83 static int xrtc_settime(struct todr_chip_handle *, struct timeval *);
  84
  85 /*
  86  * xrtc_match()
  87  */
  88 static int
  89 xrtc_match(device_t parent, cfdata_t cf, void *arg)
  90 {
  91         struct i2c_attach_args *ia = arg;
  92
  93         /* match only this RTC devices */
  94         if (ia->ia_addr == X1226_ADDR)
  95                 return (1);
  96
  97         return (0);
  98 }
  99
 100 /*
 101  * xrtc_attach()
 102  */
 103 static void
 104 xrtc_attach(device_t parent, device_t self, void *arg)
 105 {
 106         struct xrtc_softc *sc = device_private(self);
 107         struct i2c_attach_args *ia = arg;
 108
 109         aprint_naive(": Real-time Clock/NVRAM\n");
 110         aprint_normal(": Xicor X1226 Real-time Clock/NVRAM\n");
 111
 112         sc->sc_tag = ia->ia_tag;
 113         sc->sc_address = ia->ia_addr;
 114         sc->sc_dev = self;
 115         sc->sc_open = 0;
 116         sc->sc_todr.cookie = sc;
 117         sc->sc_todr.todr_gettime = xrtc_gettime;
 118         sc->sc_todr.todr_settime = xrtc_settime;
 119         sc->sc_todr.todr_setwen = NULL;
 120
 121         todr_attach(&sc->sc_todr);
 122 }
 123
 124
 125 /*ARGSUSED*/
 126 int
 127 xrtc_open(dev_t dev, int flag, int fmt, struct lwp *l)
 128 {
 129         struct xrtc_softc *sc;
 130
 131         if ((sc = device_lookup_private(&xrtc_cd, minor(dev))) == NULL)
 132                 return (ENXIO);
 133
 134         /* XXX: Locking */
 135
 136         if (sc->sc_open)
 137                 return (EBUSY);
 138
 139         sc->sc_open = 1;
 140         return (0);
 141 }
 142
 143 /*ARGSUSED*/
 144 int
 145 xrtc_close(dev_t dev, int flag, int fmt, struct lwp *l)
 146 {
 147         struct xrtc_softc *sc;
 148
 149         if ((sc = device_lookup_private(&xrtc_cd, minor(dev))) == NULL)
 150                 return (ENXIO);
 151
 152         sc->sc_open = 0;
 153         return (0);
 154 }
 155
 156 /*ARGSUSED*/
 157 int
 158 xrtc_read(dev_t dev, struct uio *uio, int flags)
 159 {
 160         struct xrtc_softc *sc;
 161         u_int8_t ch, cmdbuf[2];
 162         int addr, error;
 163
 164         if ((sc = device_lookup_private(&xrtc_cd, minor(dev))) == NULL)
 165                 return (ENXIO);
 166
 167         if (uio->uio_offset >= X1226_NVRAM_SIZE)
 168                 return (EINVAL);
 169
 170         if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
 171                 return (error);
 172
 173         while (uio->uio_resid && uio->uio_offset < X1226_NVRAM_SIZE) {
 174                 addr = (int)uio->uio_offset + X1226_NVRAM_START;
 175                 cmdbuf[0] = (addr >> 8) && 0xff;
 176                 cmdbuf[1] = addr && 0xff;
 177                 if ((error = iic_exec(sc->sc_tag,
 178                         I2C_OP_READ_WITH_STOP,
 179                         sc->sc_address, cmdbuf, 2, &ch, 1, 0)) != 0) {
 180                         iic_release_bus(sc->sc_tag, 0);
 181                         aprint_error_dev(sc->sc_dev,
 182                             "xrtc_read: read failed at 0x%x\n",
 183                                 (int)uio->uio_offset);
 184                         return (error);
 185                 }
 186                 if ((error = uiomove(&ch, 1, uio)) != 0) {
 187                         iic_release_bus(sc->sc_tag, 0);
 188                         return (error);
 189                 }
 190         }
 191
 192         iic_release_bus(sc->sc_tag, 0);
 193
 194         return (0);
 195 }
 196
 197 /*ARGSUSED*/
 198 int
 199 xrtc_write(dev_t dev, struct uio *uio, int flags)
 200 {
 201         struct xrtc_softc *sc;
 202         u_int8_t cmdbuf[3];
 203         int addr, error;
 204
 205         if ((sc = device_lookup_private(&xrtc_cd, minor(dev))) == NULL)
 206                 return (ENXIO);
 207
 208         if (uio->uio_offset >= X1226_NVRAM_SIZE)
 209                 return (EINVAL);
 210
 211         if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
 212                 return (error);
 213
 214         while (uio->uio_resid && uio->uio_offset < X1226_NVRAM_SIZE) {
 215                 addr = (int)uio->uio_offset + X1226_NVRAM_START;
 216                 cmdbuf[0] = (addr >> 8) && 0xff;
 217                 cmdbuf[1] = addr && 0xff;
 218                 if ((error = uiomove(&cmdbuf[2], 1, uio)) != 0) {
 219                         break;
 220                 }
 221                 if ((error = iic_exec(sc->sc_tag,
 222                         uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
 223                         sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0)) != 0) {
 224                         iic_release_bus(sc->sc_tag, 0);
 225                         aprint_error_dev(sc->sc_dev,
 226                             "xrtc_write: write failed at 0x%x\n",
 227                                 (int)uio->uio_offset);
 228                         return (error);
 229                 }
 230         }
 231
 232         iic_release_bus(sc->sc_tag, 0);
 233
 234         return (0);
 235 }
 236
 237
 238 static int
 239 xrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv)
 240 {
 241         struct xrtc_softc *sc = ch->cookie;
 242         struct clock_ymdhms dt, check;
 243         int retries;
 244
 245         memset(&dt, 0, sizeof(dt));
 246         memset(&check, 0, sizeof(check));
 247
 248         retries = 5;
 249         do {
 250                 xrtc_clock_read(sc, &dt);
 251                 xrtc_clock_read(sc, &check);
 252         } while (memcmp(&dt, &check, sizeof(check)) != 0 && --retries);
 253
 254         tv->tv_sec = clock_ymdhms_to_secs(&dt);
 255         tv->tv_usec = 0;
 256
 257         return (0);
 258 }
 259
 260 static int
 261 xrtc_settime(struct todr_chip_handle *ch, struct timeval *tv)
 262 {
 263         struct xrtc_softc *sc = ch->cookie;
 264         struct clock_ymdhms dt;
 265
 266         clock_secs_to_ymdhms(tv->tv_sec, &dt);
 267
 268         if (xrtc_clock_write(sc, &dt) == 0)
 269                 return (-1);
 270
 271         return (0);
 272 }
 273
 274 static int
 275 xrtc_clock_read(struct xrtc_softc *sc, struct clock_ymdhms *dt)
 276 {
 277         int i = 0;
 278         u_int8_t bcd[X1226_REG_RTC_SIZE], cmdbuf[2];
 279
 280         if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
 281                 aprint_error_dev(sc->sc_dev,
 282                     "xrtc_clock_read: failed to acquire I2C bus\n");
 283                 return (0);
 284         }
 285
 286         /* Read each RTC register in order */
 287         for (i = 0 ; i < X1226_REG_RTC_SIZE ; i++) {
 288                 int addr = i + X1226_REG_RTC_BASE;
 289                 cmdbuf[0] = (addr >> 8) & 0xff;
 290                 cmdbuf[1] = addr & 0xff;
 291
 292                 if (iic_exec(sc->sc_tag,
 293                         I2C_OP_READ_WITH_STOP,
 294                         sc->sc_address, cmdbuf, 2,
 295                         &bcd[i], 1, I2C_F_POLL)) {
 296                         iic_release_bus(sc->sc_tag, I2C_F_POLL);
 297                         aprint_error_dev(sc->sc_dev,
 298                             "xrtc_clock_read: failed to read rtc "
 299                                 "at 0x%x\n", i);
 300                         return (0);
 301                 }
 302         }
 303
 304         /* Done with I2C */
 305         iic_release_bus(sc->sc_tag, I2C_F_POLL);
 306
 307         /*
 308          * Convert the X1226's register bcd values
 309          */
 310         dt->dt_sec = FROMBCD(bcd[X1226_REG_SC - X1226_REG_RTC_BASE]
 311                         & X1226_REG_SC_MASK);
 312         dt->dt_min = FROMBCD(bcd[X1226_REG_MN - X1226_REG_RTC_BASE]
 313                         & X1226_REG_MN_MASK);
 314         if (!(bcd[X1226_REG_HR - X1226_REG_RTC_BASE] & X1226_FLAG_HR_24H)) {
 315                 dt->dt_hour = FROMBCD(bcd[X1226_REG_HR - X1226_REG_RTC_BASE]
 316                                 & X1226_REG_HR12_MASK);
 317                 if (bcd[X1226_REG_HR - X1226_REG_RTC_BASE] & X1226_FLAG_HR_12HPM) {
 318                         dt->dt_hour += 12;
 319                 }
 320         } else {
 321                 dt->dt_hour = FROMBCD(bcd[X1226_REG_HR - X1226_REG_RTC_BASE]
 322                         & X1226_REG_HR24_MASK);
 323         }
 324         dt->dt_wday = FROMBCD(bcd[X1226_REG_DW - X1226_REG_RTC_BASE]
 325                         & X1226_REG_DT_MASK);
 326         dt->dt_day = FROMBCD(bcd[X1226_REG_DT - X1226_REG_RTC_BASE]
 327                         & X1226_REG_DT_MASK);
 328         dt->dt_mon = FROMBCD(bcd[X1226_REG_MO - X1226_REG_RTC_BASE]
 329                         & X1226_REG_MO_MASK);
 330         dt->dt_year = FROMBCD(bcd[X1226_REG_YR - X1226_REG_RTC_BASE]
 331                         & X1226_REG_YR_MASK);
 332         dt->dt_year += FROMBCD(bcd[X1226_REG_Y2K - X1226_REG_RTC_BASE]
 333                         & X1226_REG_Y2K_MASK) * 100;
 334
 335         return (1);
 336 }
 337
 338 static int
 339 xrtc_clock_write(struct xrtc_softc *sc, struct clock_ymdhms *dt)
 340 {
 341         int i = 0, addr;
 342         u_int8_t bcd[X1226_REG_RTC_SIZE], cmdbuf[3];
 343
 344         /*
 345          * Convert our time to bcd values
 346          */
 347         bcd[X1226_REG_SC - X1226_REG_RTC_BASE] = TOBCD(dt->dt_sec);
 348         bcd[X1226_REG_MN - X1226_REG_RTC_BASE] = TOBCD(dt->dt_min);
 349         bcd[X1226_REG_HR - X1226_REG_RTC_BASE] = TOBCD(dt->dt_hour)
 350                                                 | X1226_FLAG_HR_24H;
 351         bcd[X1226_REG_DW - X1226_REG_RTC_BASE] = TOBCD(dt->dt_wday);
 352         bcd[X1226_REG_DT - X1226_REG_RTC_BASE] = TOBCD(dt->dt_day);
 353         bcd[X1226_REG_MO - X1226_REG_RTC_BASE] = TOBCD(dt->dt_mon);
 354         bcd[X1226_REG_YR - X1226_REG_RTC_BASE] = TOBCD(dt->dt_year % 100);
 355         bcd[X1226_REG_Y2K - X1226_REG_RTC_BASE] = TOBCD(dt->dt_year / 100);
 356
 357         if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
 358                 aprint_error_dev(sc->sc_dev,
 359                     "xrtc_clock_write: failed to acquire I2C bus\n");
 360                 return (0);
 361         }
 362
 363         /* Unlock register: Write Enable Latch */
 364         addr = X1226_REG_SR;
 365         cmdbuf[0] = ((addr >> 8) & 0xff);
 366         cmdbuf[1] = (addr & 0xff);
 367         cmdbuf[2] = X1226_FLAG_SR_WEL;
 368         if (iic_exec(sc->sc_tag,
 369                 I2C_OP_WRITE_WITH_STOP,
 370                 sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
 371                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
 372                 aprint_error_dev(sc->sc_dev, "xrtc_clock_write: "
 373                         "failed to write-unlock status register(WEL=1)\n");
 374                 return (0);
 375         }
 376
 377         /* Unlock register: Register Write Enable Latch */
 378         addr = X1226_REG_SR;
 379         cmdbuf[0] = ((addr >> 8) & 0xff);
 380         cmdbuf[1] = (addr & 0xff);
 381         cmdbuf[2] = X1226_FLAG_SR_WEL | X1226_FLAG_SR_RWEL;
 382         if (iic_exec(sc->sc_tag,
 383                 I2C_OP_WRITE_WITH_STOP,
 384                 sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
 385                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
 386                 aprint_error_dev(sc->sc_dev, "xrtc_clock_write: "
 387                         "failed to write-unlock status register(RWEL=1)\n");
 388                 return (0);
 389         }
 390
 391         /* Write each RTC register in reverse order */
 392         for (i = (X1226_REG_RTC_SIZE - 1) ; i >= 0; i--) {
 393                 addr = i + X1226_REG_RTC_BASE;
 394                 cmdbuf[0] = ((addr >> 8) & 0xff);
 395                 cmdbuf[1] = (addr & 0xff);
 396                 if (iic_exec(sc->sc_tag,
 397                         I2C_OP_WRITE_WITH_STOP,
 398                         sc->sc_address, cmdbuf, 2,
 399                         &bcd[i], 1, I2C_F_POLL)) {
 400
 401                         /* Lock register: WEL/RWEL off */
 402                         addr = X1226_REG_SR;
 403                         cmdbuf[0] = ((addr >> 8) & 0xff);
 404                         cmdbuf[1] = (addr & 0xff);
 405                         cmdbuf[2] = 0;
 406                         iic_exec(sc->sc_tag,
 407                                 I2C_OP_WRITE_WITH_STOP,
 408                                 sc->sc_address, cmdbuf, 2,
 409                                 &cmdbuf[2], 1, 0);
 410
 411                         iic_release_bus(sc->sc_tag, I2C_F_POLL);
 412                         aprint_error_dev(sc->sc_dev, "xrtc_clock_write: failed to write rtc "
 413                                 "at 0x%x\n", i);
 414                         return (0);
 415                 }
 416         }
 417
 418         /* Lock register: WEL/RWEL off */
 419         addr = X1226_REG_SR;
 420         cmdbuf[0] = ((addr >> 8) & 0xff);
 421         cmdbuf[1] = (addr & 0xff);
 422         cmdbuf[2] = 0;
 423         if (iic_exec(sc->sc_tag,
 424                 I2C_OP_WRITE_WITH_STOP,
 425                 sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
 426                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
 427                 aprint_error_dev(sc->sc_dev, "xrtc_clock_write: "
 428                         "failed to write-lock status register\n");
 429                 return (0);
 430         }
 431
 432         iic_release_bus(sc->sc_tag, I2C_F_POLL);
 433         return (1);
 434 }