1 /* $NetBSD: i2o.h,v 1.14 2008/04/28 20:23:48 martin Exp $ */
4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * Structures and constants, as presented by the I2O specification revision
34 * 1.5 (obtainable from http://www.intelligent-io.com/). Currently, only
35 * what's useful to us is defined in this file.
42 * ================= Miscellaneous definitions =================
45 /* Organisation IDs */
46 #define I2O_ORG_DPT 0x001b
47 #define I2O_ORG_INTEL 0x0028
48 #define I2O_ORG_AMI 0x1000
50 /* Macros to assist in building message headers */
51 #define I2O_MSGFLAGS(s) (I2O_VERSION_11 | (sizeof(struct s) << 14))
52 #define I2O_MSGFUNC(t, f) ((t) | (I2O_TID_HOST << 12) | ((f) << 24))
53 #define I2O_MSGPRIV(o, f) ((f) | ((o) << 16))
55 /* Common message function codes with no payload or an undefined payload */
56 #define I2O_UTIL_NOP 0x00
57 #define I2O_EXEC_IOP_CLEAR 0xbe
58 #define I2O_EXEC_SYS_QUIESCE 0xc3
59 #define I2O_EXEC_SYS_ENABLE 0xd1
60 #define I2O_PRIVATE_MESSAGE 0xff
62 /* Device class codes */
63 #define I2O_CLASS_EXECUTIVE 0x00
64 #define I2O_CLASS_DDM 0x01
65 #define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x10
66 #define I2O_CLASS_SEQUENTIAL_STORAGE 0x11
67 #define I2O_CLASS_LAN 0x20
68 #define I2O_CLASS_WAN 0x30
69 #define I2O_CLASS_FIBRE_CHANNEL_PORT 0x40
70 #define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x41
71 #define I2O_CLASS_SCSI_PERIPHERAL 0x51
72 #define I2O_CLASS_ATE_PORT 0x60
73 #define I2O_CLASS_ATE_PERIPHERAL 0x61
74 #define I2O_CLASS_FLOPPY_CONTROLLER 0x70
75 #define I2O_CLASS_FLOPPY_DEVICE 0x71
76 #define I2O_CLASS_BUS_ADAPTER_PORT 0x80
78 #define I2O_CLASS_ANY 0xffffffff
80 /* Reply status codes */
81 #define I2O_STATUS_SUCCESS 0x00
82 #define I2O_STATUS_ABORT_DIRTY 0x01
83 #define I2O_STATUS_ABORT_NO_DATA_XFER 0x02
84 #define I2O_STATUS_ABORT_PARTIAL_XFER 0x03
85 #define I2O_STATUS_ERROR_DIRTY 0x04
86 #define I2O_STATUS_ERROR_NO_DATA_XFER 0x05
87 #define I2O_STATUS_ERROR_PARTIAL_XFER 0x06
88 #define I2O_STATUS_PROCESS_ABORT_DIRTY 0x08
89 #define I2O_STATUS_PROCESS_ABORT_NO_DATA_XFER 0x09
90 #define I2O_STATUS_PROCESS_ABORT_PARTIAL_XFER 0x0a
91 #define I2O_STATUS_TRANSACTION_ERROR 0x0b
92 #define I2O_STATUS_PROGRESS_REPORT 0x80
94 /* Detailed status codes */
95 #define I2O_DSC_SUCCESS 0x00
96 #define I2O_DSC_BAD_KEY 0x02
97 #define I2O_DSC_TCL_ERROR 0x03
98 #define I2O_DSC_REPLY_BUFFER_FULL 0x04
99 #define I2O_DSC_NO_SUCH_PAGE 0x05
100 #define I2O_DSC_INSUFFICIENT_RESOURCE_SOFT 0x06
101 #define I2O_DSC_INSUFFICIENT_RESOURCE_HARD 0x07
102 #define I2O_DSC_CHAIN_BUFFER_TOO_LARGE 0x09
103 #define I2O_DSC_UNSUPPORTED_FUNCTION 0x0a
104 #define I2O_DSC_DEVICE_LOCKED 0x0b
105 #define I2O_DSC_DEVICE_RESET 0x0c
106 #define I2O_DSC_INAPPROPRIATE_FUNCTION 0x0d
107 #define I2O_DSC_INVALID_INITIATOR_ADDRESS 0x0e
108 #define I2O_DSC_INVALID_MESSAGE_FLAGS 0x0f
109 #define I2O_DSC_INVALID_OFFSET 0x10
110 #define I2O_DSC_INVALID_PARAMETER 0x11
111 #define I2O_DSC_INVALID_REQUEST 0x12
112 #define I2O_DSC_INVALID_TARGET_ADDRESS 0x13
113 #define I2O_DSC_MESSAGE_TOO_LARGE 0x14
114 #define I2O_DSC_MESSAGE_TOO_SMALL 0x15
115 #define I2O_DSC_MISSING_PARAMETER 0x16
116 #define I2O_DSC_TIMEOUT 0x17
117 #define I2O_DSC_UNKNOWN_ERROR 0x18
118 #define I2O_DSC_UNKNOWN_FUNCTION 0x19
119 #define I2O_DSC_UNSUPPORTED_VERSION 0x1a
120 #define I2O_DSC_DEVICE_BUSY 0x1b
121 #define I2O_DSC_DEVICE_NOT_AVAILABLE 0x1c
123 /* Message versions */
124 #define I2O_VERSION_10 0x00
125 #define I2O_VERSION_11 0x01
126 #define I2O_VERSION_20 0x02
128 /* Commonly used TIDs */
129 #define I2O_TID_IOP 0
130 #define I2O_TID_HOST 1
131 #define I2O_TID_NONE 4095
133 /* SGL flags. This list covers only a fraction of the possibilities. */
134 #define I2O_SGL_IGNORE 0x00000000
135 #define I2O_SGL_SIMPLE 0x10000000
136 #define I2O_SGL_PAGE_LIST 0x20000000
138 #define I2O_SGL_BC_32BIT 0x01000000
139 #define I2O_SGL_BC_64BIT 0x02000000
140 #define I2O_SGL_BC_96BIT 0x03000000
141 #define I2O_SGL_DATA_OUT 0x04000000
142 #define I2O_SGL_END_BUFFER 0x40000000
143 #define I2O_SGL_END 0x80000000
145 /* Serial number formats */
146 #define I2O_SNFMT_UNKNOWN 0
147 #define I2O_SNFMT_BINARY 1
148 #define I2O_SNFMT_ASCII 2
149 #define I2O_SNFMT_UNICODE 3
150 #define I2O_SNFMT_LAN_MAC 4
151 #define I2O_SNFMT_WAN_MAC 5
154 * ================= Common structures =================
158 * Standard I2O message frame. All message frames begin with this.
161 * ---- ------------- ----------------------------------------------------
162 * 0-2 msgflags Message header version. Must be 001 (little endian).
163 * 3 msgflags Reserved.
164 * 4-7 msgflags Offset to SGLs expressed as # of 32-bit words.
165 * 8-15 msgflags Control flags.
166 * 16-31 msgflags Message frame size expressed as # of 32-bit words.
167 * 0-11 msgfunc TID of target.
168 * 12-23 msgfunc TID of initiator.
169 * 24-31 msgfunc Function (i.e., type of message).
174 u_int32_t msgictx
; /* Initiator context */
175 u_int32_t msgtctx
; /* Transaction context */
177 /* Message payload */
181 #define I2O_MSGFLAGS_STATICMF 0x0100
182 #define I2O_MSGFLAGS_64BIT 0x0200
183 #define I2O_MSGFLAGS_MULTI 0x1000
184 #define I2O_MSGFLAGS_FAIL 0x2000
185 #define I2O_MSGFLAGS_LAST_REPLY 0x4000
186 #define I2O_MSGFLAGS_REPLY 0x8000
189 * Standard reply frame. msgflags, msgfunc, msgictx and msgtctx have the
190 * same meaning as in `struct i2o_msg'.
197 u_int16_t detail
; /* Detailed status code */
199 u_int8_t reqstatus
; /* Request status code */
206 * Fault notification reply, returned when a message frame can not be
207 * processed (i.e I2O_MSGFLAGS_FAIL is set in the reply).
209 struct i2o_fault_notify
{
213 u_int32_t msgtctx
; /* Not valid! */
217 u_int8_t failurecode
;
218 u_int16_t failingiop
; /* Bits 0-12 only */
219 u_int16_t failinghostunit
;
226 * Hardware resource table. Not documented here.
228 struct i2o_hrt_entry
{
230 u_int16_t controllingtid
;
237 u_int16_t numentries
;
240 u_int32_t changeindicator
;
241 struct i2o_hrt_entry entry
[1];
245 * Logical configuration table entry. Bitfields are broken down as follows:
248 * ----- -------------- ---------------------------------------------------
249 * 0-11 classid Class ID.
250 * 12-15 classid Class version.
251 * 0-11 usertid User TID
252 * 12-23 usertid Parent TID.
253 * 24-31 usertid BIOS info.
255 struct i2o_lct_entry
{
257 u_int16_t localtid
; /* Bits 0-12 only */
258 u_int32_t changeindicator
;
259 u_int32_t deviceflags
;
262 u_int32_t subclassinfo
;
264 u_int8_t identitytag
[8];
269 * Logical configuration table header.
275 u_int32_t changeindicator
;
276 struct i2o_lct_entry entry
[1];
280 * IOP system table. Bitfields are broken down as follows:
283 * ----- -------------- ---------------------------------------------------
285 * 12-31 iopid Reserved.
286 * 0-11 segnumber Segment number.
287 * 12-15 segnumber I2O version.
288 * 16-23 segnumber IOP state.
289 * 24-31 segnumber Messenger type.
291 struct i2o_systab_entry
{
296 u_int16_t inboundmsgframesize
;
298 u_int32_t lastchanged
;
300 u_int32_t inboundmsgportaddresslow
;
301 u_int32_t inboundmsgportaddresshigh
;
308 u_int32_t changeindicator
;
309 u_int32_t reserved1
[2];
310 struct i2o_systab_entry entry
[1];
314 * IOP status record. Bitfields are broken down as follows:
317 * ----- -------------- ---------------------------------------------------
319 * 12-15 iopid Reserved.
320 * 16-31 iopid Host unit ID.
321 * 0-11 segnumber Segment number.
322 * 12-15 segnumber I2O version.
323 * 16-23 segnumber IOP state.
324 * 24-31 segnumber Messenger type.
331 u_int16_t inboundmframesize
;
334 u_int32_t maxinboundmframes
;
335 u_int32_t currentinboundmframes
;
336 u_int32_t maxoutboundmframes
;
337 u_int8_t productid
[24];
338 u_int32_t expectedlctsize
;
340 u_int32_t desiredprivmemsize
;
341 u_int32_t currentprivmemsize
;
342 u_int32_t currentprivmembase
;
343 u_int32_t desiredpriviosize
;
344 u_int32_t currentpriviosize
;
345 u_int32_t currentpriviobase
;
346 u_int8_t reserved2
[3];
350 #define I2O_IOP_STATE_INITIALIZING 0x01
351 #define I2O_IOP_STATE_RESET 0x02
352 #define I2O_IOP_STATE_HOLD 0x04
353 #define I2O_IOP_STATE_READY 0x05
354 #define I2O_IOP_STATE_OPERATIONAL 0x08
355 #define I2O_IOP_STATE_FAILED 0x10
356 #define I2O_IOP_STATE_FAULTED 0x11
359 * ================= Executive class messages =================
362 #define I2O_EXEC_STATUS_GET 0xa0
363 struct i2o_exec_status_get
{
366 u_int32_t reserved
[4];
372 #define I2O_EXEC_OUTBOUND_INIT 0xa1
373 struct i2o_exec_outbound_init
{
379 u_int32_t flags
; /* init code, outbound msg size */
382 #define I2O_EXEC_OUTBOUND_INIT_IN_PROGRESS 1
383 #define I2O_EXEC_OUTBOUND_INIT_REJECTED 2
384 #define I2O_EXEC_OUTBOUND_INIT_FAILED 3
385 #define I2O_EXEC_OUTBOUND_INIT_COMPLETE 4
387 #define I2O_EXEC_LCT_NOTIFY 0xa2
388 struct i2o_exec_lct_notify
{
394 u_int32_t changeindicator
;
397 #define I2O_EXEC_SYS_TAB_SET 0xa3
398 struct i2o_exec_sys_tab_set
{
407 #define I2O_EXEC_HRT_GET 0xa8
408 struct i2o_exec_hrt_get
{
415 #define I2O_EXEC_IOP_RESET 0xbd
416 struct i2o_exec_iop_reset
{
419 u_int32_t reserved
[4];
421 u_int32_t statushigh
;
424 #define I2O_RESET_IN_PROGRESS 0x01
425 #define I2O_RESET_REJECTED 0x02
428 * ================= Executive class parameter groups =================
431 #define I2O_PARAM_EXEC_LCT_SCALAR 0x0101
432 #define I2O_PARAM_EXEC_LCT_TABLE 0x0102
435 * ================= HBA class messages =================
438 #define I2O_HBA_BUS_SCAN 0x89
439 struct i2o_hba_bus_scan
{
447 * ================= HBA class parameter groups =================
450 #define I2O_PARAM_HBA_CTLR_INFO 0x0000
451 struct i2o_param_hba_ctlr_info
{
455 u_int8_t busname
[12];
458 #define I2O_HBA_BUS_GENERIC 0x00
459 #define I2O_HBA_BUS_SCSI 0x01
460 #define I2O_HBA_BUS_FCA 0x10
462 #define I2O_PARAM_HBA_SCSI_PORT_INFO 0x0001
463 struct i2o_param_hba_scsi_port_info
{
465 u_int8_t electricalif
;
466 u_int8_t isosynchonrous
;
467 u_int8_t connectortype
;
468 u_int8_t connectorgender
;
471 u_int32_t maxnumberofdevices
;
474 #define I2O_PARAM_HBA_SCSI_PORT_GENERIC 0x01
475 #define I2O_PARAM_HBA_SCSI_PORT_UNKNOWN 0x02
476 #define I2O_PARAM_HBA_SCSI_PORT_PARINTF 0x03
477 #define I2O_PARAM_HBA_SCSI_PORT_FCL 0x04
478 #define I2O_PARAM_HBA_SCSI_PORT_1394 0x05
479 #define I2O_PARAM_HBA_SCSI_PORT_SSA 0x06
481 #define I2O_PARAM_HBA_SCSI_PORT_SE 0x03
482 #define I2O_PARAM_HBA_SCSI_PORT_DIFF 0x04
483 #define I2O_PARAM_HBA_SCSI_PORT_LVD 0x05
484 #define I2O_PARAM_HBA_SCSI_PORT_OPTCL 0x06
486 #define I2O_PARAM_HBA_SCSI_PORT_HDBS50 0x04
487 #define I2O_PARAM_HBA_SCSI_PORT_HDBU50 0x05
488 #define I2O_PARAM_HBA_SCSI_PORT_DBS50 0x06
489 #define I2O_PARAM_HBA_SCSI_PORT_DBU50 0x07
490 #define I2O_PARAM_HBA_SCSI_PORT_HDBS68 0x08
491 #define I2O_PARAM_HBA_SCSI_PORT_HDBU68 0x09
492 #define I2O_PARAM_HBA_SCSI_PORT_SCA1 0x0a
493 #define I2O_PARAM_HBA_SCSI_PORT_SCA2 0x0b
494 #define I2O_PARAM_HBA_SCSI_PORT_FCDB9 0x0c
495 #define I2O_PARAM_HBA_SCSI_PORT_FC 0x0d
496 #define I2O_PARAM_HBA_SCSI_PORT_FCSCA40 0x0e
497 #define I2O_PARAM_HBA_SCSI_PORT_FCSCA20 0x0f
498 #define I2O_PARAM_HBA_SCSI_PORT_FCBNC 0x10
500 #define I2O_PARAM_HBA_SCSI_PORT_FEMALE 0x03
501 #define I2O_PARAM_HBA_SCSI_PORT_MALE 0x04
503 #define I2O_PARAM_HBA_SCSI_CTLR_INFO 0x0200
504 struct i2o_param_hba_scsi_ctlr_info
{
509 u_int32_t initiatorid
;
510 u_int64_t scanlun0only
;
511 u_int16_t disabledevice
;
513 u_int8_t maxdatawidth
;
514 u_int64_t maxsyncrate
;
518 * ================= Utility messages =================
521 #define I2O_UTIL_ABORT 0x01
522 struct i2o_util_abort
{
527 u_int32_t flags
; /* abort type and function type */
531 #define I2O_UTIL_ABORT_EXACT 0x00000000
532 #define I2O_UTIL_ABORT_FUNCTION 0x00010000
533 #define I2O_UTIL_ABORT_TRANSACTION 0x00020000
534 #define I2O_UTIL_ABORT_WILD 0x00030000
536 #define I2O_UTIL_ABORT_CLEAN 0x00040000
538 struct i2o_util_abort_reply
{
546 #define I2O_UTIL_PARAMS_SET 0x05
547 #define I2O_UTIL_PARAMS_GET 0x06
548 struct i2o_util_params_op
{
556 #define I2O_PARAMS_OP_FIELD_GET 1
557 #define I2O_PARAMS_OP_LIST_GET 2
558 #define I2O_PARAMS_OP_MORE_GET 3
559 #define I2O_PARAMS_OP_SIZE_GET 4
560 #define I2O_PARAMS_OP_TABLE_GET 5
561 #define I2O_PARAMS_OP_FIELD_SET 6
562 #define I2O_PARAMS_OP_LIST_SET 7
563 #define I2O_PARAMS_OP_ROW_ADD 8
564 #define I2O_PARAMS_OP_ROW_DELETE 9
565 #define I2O_PARAMS_OP_TABLE_CLEAR 10
567 struct i2o_param_op_list_header
{
572 struct i2o_param_op_all_template
{
575 u_int16_t fieldcount
;
579 struct i2o_param_op_results
{
584 struct i2o_param_read_results
{
586 u_int8_t blockstatus
;
587 u_int8_t errorinfosize
;
590 struct i2o_param_table_results
{
592 u_int8_t blockstatus
;
593 u_int8_t errorinfosize
;
598 #define I2O_UTIL_CLAIM 0x09
599 struct i2o_util_claim
{
607 #define I2O_UTIL_CLAIM_RESET_SENSITIVE 0x00000002
608 #define I2O_UTIL_CLAIM_STATE_SENSITIVE 0x00000004
609 #define I2O_UTIL_CLAIM_CAPACITY_SENSITIVE 0x00000008
610 #define I2O_UTIL_CLAIM_NO_PEER_SERVICE 0x00000010
611 #define I2O_UTIL_CLAIM_NO_MANAGEMENT_SERVICE 0x00000020
613 #define I2O_UTIL_CLAIM_PRIMARY_USER 0x01000000
614 #define I2O_UTIL_CLAIM_AUTHORIZED_USER 0x02000000
615 #define I2O_UTIL_CLAIM_SECONDARY_USER 0x03000000
616 #define I2O_UTIL_CLAIM_MANAGEMENT_USER 0x04000000
618 #define I2O_UTIL_CLAIM_RELEASE 0x0b
619 struct i2o_util_claim_release
{
624 u_int32_t flags
; /* User flags as per I2O_UTIL_CLAIM */
627 #define I2O_UTIL_CLAIM_RELEASE_CONDITIONAL 0x00000001
629 #define I2O_UTIL_CONFIG_DIALOG 0x10
630 struct i2o_util_config_dialog
{
638 #define I2O_UTIL_EVENT_REGISTER 0x13
639 struct i2o_util_event_register
{
647 struct i2o_util_event_register_reply
{
653 u_int32_t eventdata
[1];
656 /* Generic events. */
657 #define I2O_EVENT_GEN_DEVICE_STATE 0x00400000
658 #define I2O_EVENT_GEN_VENDOR_EVENT 0x00800000
659 #define I2O_EVENT_GEN_FIELD_MODIFIED 0x01000000
660 #define I2O_EVENT_GEN_EVENT_MASK_MODIFIED 0x02000000
661 #define I2O_EVENT_GEN_DEVICE_RESET 0x04000000
662 #define I2O_EVENT_GEN_CAPABILITY_CHANGE 0x08000000
663 #define I2O_EVENT_GEN_LOCK_RELEASE 0x10000000
664 #define I2O_EVENT_GEN_NEED_CONFIGURATION 0x20000000
665 #define I2O_EVENT_GEN_GENERAL_WARNING 0x40000000
666 #define I2O_EVENT_GEN_STATE_CHANGE 0x80000000
668 /* Executive class events. */
669 #define I2O_EVENT_EXEC_RESOURCE_LIMITS 0x00000001
670 #define I2O_EVENT_EXEC_CONNECTION_FAIL 0x00000002
671 #define I2O_EVENT_EXEC_ADAPTER_FAULT 0x00000004
672 #define I2O_EVENT_EXEC_POWER_FAIL 0x00000008
673 #define I2O_EVENT_EXEC_RESET_PENDING 0x00000010
674 #define I2O_EVENT_EXEC_RESET_IMMINENT 0x00000020
675 #define I2O_EVENT_EXEC_HARDWARE_FAIL 0x00000040
676 #define I2O_EVENT_EXEC_XCT_CHANGE 0x00000080
677 #define I2O_EVENT_EXEC_NEW_LCT_ENTRY 0x00000100
678 #define I2O_EVENT_EXEC_MODIFIED_LCT 0x00000200
679 #define I2O_EVENT_EXEC_DDM_AVAILIBILITY 0x00000400
681 /* LAN class events. */
682 #define I2O_EVENT_LAN_LINK_DOWN 0x00000001
683 #define I2O_EVENT_LAN_LINK_UP 0x00000002
684 #define I2O_EVENT_LAN_MEDIA_CHANGE 0x00000004
687 * ================= Utility parameter groups =================
690 #define I2O_PARAM_DEVICE_IDENTITY 0xf100
691 struct i2o_param_device_identity
{
695 u_int8_t vendorinfo
[16];
696 u_int8_t productinfo
[16];
697 u_int8_t description
[16];
698 u_int8_t revlevel
[8];
700 u_int8_t serialnumber
[1];
703 #define I2O_PARAM_DDM_IDENTITY 0xf101
704 struct i2o_param_ddm_identity
{
707 u_int8_t revlevel
[8];
709 u_int8_t serialnumber
[12];
713 * ================= Block storage class messages =================
716 #define I2O_RBS_BLOCK_READ 0x30
717 struct i2o_rbs_block_read
{
722 u_int32_t flags
; /* flags, time multipler, read ahead */
725 u_int32_t highoffset
;
728 #define I2O_RBS_BLOCK_READ_NO_RETRY 0x01
729 #define I2O_RBS_BLOCK_READ_SOLO 0x02
730 #define I2O_RBS_BLOCK_READ_CACHE_READ 0x04
731 #define I2O_RBS_BLOCK_READ_PREFETCH 0x08
732 #define I2O_RBS_BLOCK_READ_CACHE_ONLY 0x10
734 #define I2O_RBS_BLOCK_WRITE 0x31
735 struct i2o_rbs_block_write
{
740 u_int32_t flags
; /* flags, time multipler */
743 u_int32_t highoffset
;
746 #define I2O_RBS_BLOCK_WRITE_NO_RETRY 0x01
747 #define I2O_RBS_BLOCK_WRITE_SOLO 0x02
748 #define I2O_RBS_BLOCK_WRITE_CACHE_NONE 0x04
749 #define I2O_RBS_BLOCK_WRITE_CACHE_WT 0x08
750 #define I2O_RBS_BLOCK_WRITE_CACHE_WB 0x10
752 #define I2O_RBS_CACHE_FLUSH 0x37
753 struct i2o_rbs_cache_flush
{
758 u_int32_t flags
; /* flags, time multipler */
761 #define I2O_RBS_MEDIA_MOUNT 0x41
762 struct i2o_rbs_media_mount
{
771 #define I2O_RBS_MEDIA_EJECT 0x43
772 struct i2o_rbs_media_eject
{
780 #define I2O_RBS_MEDIA_LOCK 0x49
781 struct i2o_rbs_media_lock
{
789 #define I2O_RBS_MEDIA_UNLOCK 0x4b
790 struct i2o_rbs_media_unlock
{
798 /* Standard RBS reply frame. */
799 struct i2o_rbs_reply
{
807 u_int32_t transfercount
;
808 u_int64_t offset
; /* Error replies only */
812 * ================= Block storage class parameter groups =================
815 #define I2O_PARAM_RBS_DEVICE_INFO 0x0000
816 struct i2o_param_rbs_device_info
{
819 u_int16_t powerstate
;
822 u_int32_t capabilities
;
826 #define I2O_RBS_TYPE_DIRECT 0x00
827 #define I2O_RBS_TYPE_WORM 0x04
828 #define I2O_RBS_TYPE_CDROM 0x05
829 #define I2O_RBS_TYPE_OPTICAL 0x07
831 #define I2O_RBS_CAP_CACHING 0x00000001
832 #define I2O_RBS_CAP_MULTI_PATH 0x00000002
833 #define I2O_RBS_CAP_DYNAMIC_CAPACITY 0x00000004
834 #define I2O_RBS_CAP_REMOVABLE_MEDIA 0x00000008
835 #define I2O_RBS_CAP_REMOVABLE_DEVICE 0x00000010
836 #define I2O_RBS_CAP_READ_ONLY 0x00000020
837 #define I2O_RBS_CAP_LOCKOUT 0x00000040
838 #define I2O_RBS_CAP_BOOT_BYPASS 0x00000080
839 #define I2O_RBS_CAP_COMPRESSION 0x00000100
840 #define I2O_RBS_CAP_DATA_SECURITY 0x00000200
841 #define I2O_RBS_CAP_RAID 0x00000400
843 #define I2O_RBS_STATE_CACHING 0x00000001
844 #define I2O_RBS_STATE_POWERED_ON 0x00000002
845 #define I2O_RBS_STATE_READY 0x00000004
846 #define I2O_RBS_STATE_MEDIA_LOADED 0x00000008
847 #define I2O_RBS_STATE_DEVICE_LOADED 0x00000010
848 #define I2O_RBS_STATE_READ_ONLY 0x00000020
849 #define I2O_RBS_STATE_LOCKOUT 0x00000040
850 #define I2O_RBS_STATE_BOOT_BYPASS 0x00000080
851 #define I2O_RBS_STATE_COMPRESSION 0x00000100
852 #define I2O_RBS_STATE_DATA_SECURITY 0x00000200
853 #define I2O_RBS_STATE_RAID 0x00000400
855 #define I2O_PARAM_RBS_OPERATION 0x0001
856 struct i2o_param_rbs_operation
{
858 u_int8_t reasstolerance
;
862 u_int32_t expectedtimeout
;
863 u_int32_t rwvtimeout
;
864 u_int32_t rwvtimeoutbase
;
865 u_int32_t timeoutbase
;
866 u_int32_t orderedreqdepth
;
867 u_int32_t atomicwritesize
;
870 #define I2O_PARAM_RBS_OPERATION_autoreass 0
871 #define I2O_PARAM_RBS_OPERATION_reasstolerance 1
872 #define I2O_PARAM_RBS_OPERATION_numretries 2
873 #define I2O_PARAM_RBS_OPERATION_reserved0 3
874 #define I2O_PARAM_RBS_OPERATION_reasssize 4
875 #define I2O_PARAM_RBS_OPERATION_expectedtimeout 5
876 #define I2O_PARAM_RBS_OPERATION_rwvtimeout 6
877 #define I2O_PARAM_RBS_OPERATION_rwvtimeoutbase 7
878 #define I2O_PARAM_RBS_OPERATION_timeoutbase 8
879 #define I2O_PARAM_RBS_OPERATION_orderedreqdepth 9
880 #define I2O_PARAM_RBS_OPERATION_atomicwritesize 10
882 #define I2O_PARAM_RBS_CACHE_CONTROL 0x0003
883 struct i2o_param_rbs_cache_control
{
884 u_int32_t totalcachesize
;
885 u_int32_t readcachesize
;
886 u_int32_t writecachesize
;
887 u_int8_t writepolicy
;
889 u_int8_t errorcorrection
;
894 * ================= SCSI peripheral class messages =================
897 #define I2O_SCSI_DEVICE_RESET 0x27
898 struct i2o_scsi_device_reset
{
905 #define I2O_SCSI_SCB_EXEC 0x81
906 struct i2o_scsi_scb_exec
{
911 u_int32_t flags
; /* CDB length and flags */
916 #define I2O_SCB_FLAG_SENSE_DATA_IN_MESSAGE 0x00200000
917 #define I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER 0x00600000
918 #define I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 0x00800000
919 #define I2O_SCB_FLAG_HEAD_QUEUE_TAG 0x01000000
920 #define I2O_SCB_FLAG_ORDERED_QUEUE_TAG 0x01800000
921 #define I2O_SCB_FLAG_ACA_QUEUE_TAG 0x02000000
922 #define I2O_SCB_FLAG_ENABLE_DISCONNECT 0x20000000
923 #define I2O_SCB_FLAG_XFER_FROM_DEVICE 0x40000000
924 #define I2O_SCB_FLAG_XFER_TO_DEVICE 0x80000000
926 #define I2O_SCSI_SCB_ABORT 0x83
927 struct i2o_scsi_scb_abort
{
935 struct i2o_scsi_reply
{
949 #define I2O_SCSI_DSC_SUCCESS 0x00
950 #define I2O_SCSI_DSC_REQUEST_ABORTED 0x02
951 #define I2O_SCSI_DSC_UNABLE_TO_ABORT 0x03
952 #define I2O_SCSI_DSC_COMPLETE_WITH_ERROR 0x04
953 #define I2O_SCSI_DSC_ADAPTER_BUSY 0x05
954 #define I2O_SCSI_DSC_REQUEST_INVALID 0x06
955 #define I2O_SCSI_DSC_PATH_INVALID 0x07
956 #define I2O_SCSI_DSC_DEVICE_NOT_PRESENT 0x08
957 #define I2O_SCSI_DSC_UNABLE_TO_TERMINATE 0x09
958 #define I2O_SCSI_DSC_SELECTION_TIMEOUT 0x0a
959 #define I2O_SCSI_DSC_COMMAND_TIMEOUT 0x0b
960 #define I2O_SCSI_DSC_MR_MESSAGE_RECEIVED 0x0d
961 #define I2O_SCSI_DSC_SCSI_BUS_RESET 0x0e
962 #define I2O_SCSI_DSC_PARITY_ERROR_FAILURE 0x0f
963 #define I2O_SCSI_DSC_AUTOSENSE_FAILED 0x10
964 #define I2O_SCSI_DSC_NO_ADAPTER 0x11
965 #define I2O_SCSI_DSC_DATA_OVERRUN 0x12
966 #define I2O_SCSI_DSC_UNEXPECTED_BUS_FREE 0x13
967 #define I2O_SCSI_DSC_SEQUENCE_FAILURE 0x14
968 #define I2O_SCSI_DSC_REQUEST_LENGTH_ERROR 0x15
969 #define I2O_SCSI_DSC_PROVIDE_FAILURE 0x16
970 #define I2O_SCSI_DSC_BDR_MESSAGE_SENT 0x17
971 #define I2O_SCSI_DSC_REQUEST_TERMINATED 0x18
972 #define I2O_SCSI_DSC_IDE_MESSAGE_SENT 0x33
973 #define I2O_SCSI_DSC_RESOURCE_UNAVAILABLE 0x34
974 #define I2O_SCSI_DSC_UNACKNOWLEDGED_EVENT 0x35
975 #define I2O_SCSI_DSC_MESSAGE_RECEIVED 0x36
976 #define I2O_SCSI_DSC_INVALID_CDB 0x37
977 #define I2O_SCSI_DSC_LUN_INVALID 0x38
978 #define I2O_SCSI_DSC_SCSI_TID_INVALID 0x39
979 #define I2O_SCSI_DSC_FUNCTION_UNAVAILABLE 0x3a
980 #define I2O_SCSI_DSC_NO_NEXUS 0x3b
981 #define I2O_SCSI_DSC_SCSI_IID_INVALID 0x3c
982 #define I2O_SCSI_DSC_CDB_RECEIVED 0x3d
983 #define I2O_SCSI_DSC_LUN_ALREADY_ENABLED 0x3e
984 #define I2O_SCSI_DSC_BUS_BUSY 0x3f
985 #define I2O_SCSI_DSC_QUEUE_FROZEN 0x40
988 * ================= SCSI peripheral class parameter groups =================
991 #define I2O_PARAM_SCSI_DEVICE_INFO 0x0000
992 struct i2o_param_scsi_device_info
{
996 u_int32_t identifier
;
998 u_int32_t queuedepth
;
1001 u_int8_t negdatawidth
;
1003 u_int64_t negsyncrate
;
1007 * ================= LAN class messages =================
1010 #define I2O_LAN_PACKET_SEND 0x3b
1011 struct i2o_lan_packet_send
{
1020 #define I2O_LAN_TCW_ACCESS_PRI_MASK 0x00000007
1021 #define I2O_LAN_TCW_SUPPRESS_CRC 0x00000008
1022 #define I2O_LAN_TCW_SUPPRESS_LOOPBACK 0x00000010
1023 #define I2O_LAN_TCW_CKSUM_NETWORK 0x00000020
1024 #define I2O_LAN_TCW_CKSUM_TRANSPORT 0x00000040
1025 #define I2O_LAN_TCW_REPLY_BATCH 0x00000000
1026 #define I2O_LAN_TCW_REPLY_IMMEDIATELY 0x40000000
1027 #define I2O_LAN_TCW_REPLY_UNSUCCESSFUL 0x80000000
1028 #define I2O_LAN_TCW_REPLY_NONE 0xc0000000
1030 #define I2O_LAN_SDU_SEND 0x3d
1031 struct i2o_lan_sdu_send
{
1035 u_int32_t tcw
; /* As per PACKET_SEND. */
1040 struct i2o_lan_send_reply
{
1051 #define I2O_LAN_RECEIVE_POST 0x3e
1052 struct i2o_lan_receive_post
{
1061 struct i2o_lan_receive_reply
{
1069 u_int32_t bucketsleft
;
1072 #define I2O_LAN_RECEIVE_REPLY_PDB 0x80
1074 #define I2O_LAN_PDB_ERROR_NONE 0x00
1075 #define I2O_LAN_PDB_ERROR_BAD_CRC 0x01
1076 #define I2O_LAN_PDB_ERROR_ALIGNMENT 0x02
1077 #define I2O_LAN_PDB_ERROR_TOO_LONG 0x03
1078 #define I2O_LAN_PDB_ERROR_TOO_SHORT 0x04
1079 #define I2O_LAN_PDB_ERROR_RX_OVERRUN 0x05
1080 #define I2O_LAN_PDB_ERROR_L3_CKSUM_BAD 0x40
1081 #define I2O_LAN_PDB_ERROR_L4_CKSUM_BAD 0x80
1082 #define I2O_LAN_PDB_ERROR_CKSUM_MASK 0xc0
1083 #define I2O_LAN_PDB_ERROR_OTHER 0xff
1085 #define I2O_LAN_RESET 0x35
1086 struct i2o_lan_reset
{
1091 u_int16_t resrcflags
;
1094 #define I2O_LAN_RESRC_RETURN_BUCKETS 0x0001
1095 #define I2O_LAN_RESRC_RETURN_XMITS 0x0002
1097 #define I2O_LAN_SUSPEND 0x37
1098 struct i2o_lan_suspend
{
1103 u_int16_t resrcflags
; /* As per RESET. */
1106 #define I2O_LAN_DSC_SUCCESS 0x00
1107 #define I2O_LAN_DSC_DEVICE_FAILURE 0x01
1108 #define I2O_LAN_DSC_DESTINATION_NOT_FOUND 0x02
1109 #define I2O_LAN_DSC_TRANSMIT_ERROR 0x03
1110 #define I2O_LAN_DSC_TRANSMIT_ABORTED 0x04
1111 #define I2O_LAN_DSC_RECEIVE_ERROR 0x05
1112 #define I2O_LAN_DSC_RECEIVE_ABORTED 0x06
1113 #define I2O_LAN_DSC_DMA_ERROR 0x07
1114 #define I2O_LAN_DSC_BAD_PACKET_DETECTED 0x08
1115 #define I2O_LAN_DSC_OUT_OF_MEMORY 0x09
1116 #define I2O_LAN_DSC_BUCKET_OVERRUN 0x0a
1117 #define I2O_LAN_DSC_IOP_INTERNAL_ERROR 0x0b
1118 #define I2O_LAN_DSC_CANCELED 0x0c
1119 #define I2O_LAN_DSC_INVALID_TRANSACTION_CONTEXT 0x0d
1120 #define I2O_LAN_DSC_DEST_ADDRESS_DETECTED 0x0e
1121 #define I2O_LAN_DSC_DEST_ADDRESS_OMITTED 0x0f
1122 #define I2O_LAN_DSC_PARTIAL_PACKET_RETURNED 0x10
1123 #define I2O_LAN_DSC_TEMP_SUSPENDED_STATE 0x11
1126 * ================= LAN class parameter groups =================
1129 #define I2O_PARAM_LAN_DEVICE_INFO 0x0000
1130 struct i2o_param_lan_device_info
{
1135 u_int16_t reserved2
;
1136 u_int32_t minpktsize
;
1137 u_int32_t maxpktsize
;
1143 #define I2O_LAN_TYPE_ETHERNET 0x0030
1144 #define I2O_LAN_TYPE_100BASEVG 0x0040
1145 #define I2O_LAN_TYPE_TOKEN_RING 0x0050
1146 #define I2O_LAN_TYPE_FDDI 0x0060
1147 #define I2O_LAN_TYPE_FIBRECHANNEL 0x0070
1149 #define I2O_PARAM_LAN_MAC_ADDRESS 0x0001
1150 struct i2o_param_lan_mac_address
{
1151 u_int8_t activeaddr
[8];
1152 u_int8_t localaddr
[8];
1153 u_int8_t addrmask
[8];
1154 u_int32_t filtermask
;
1155 u_int32_t hwfiltercaps
;
1156 u_int32_t maxmcastaddr
;
1157 u_int32_t maxfilterperfect
;
1158 u_int32_t maxfilterimperfect
;
1161 #define I2O_PARAM_LAN_MAC_ADDRESS_activeaddr 0
1162 #define I2O_PARAM_LAN_MAC_ADDRESS_localaddr 1
1163 #define I2O_PARAM_LAN_MAC_ADDRESS_addrmask 2
1164 #define I2O_PARAM_LAN_MAC_ADDRESS_filtermask 3
1165 #define I2O_PARAM_LAN_MAC_ADDRESS_hwfiltercaps 4
1166 #define I2O_PARAM_LAN_MAC_ADDRESS_maxmcastaddr 5
1167 #define I2O_PARAM_LAN_MAC_ADDRESS_maxfilterperfect 6
1168 #define I2O_PARAM_LAN_MAC_ADDRESS_maxfilterimperfect 7
1170 #define I2O_LAN_FILTERMASK_UNICAST_DISABLE 0x0001
1171 #define I2O_LAN_FILTERMASK_PROMISC_ENABLE 0x0002
1172 #define I2O_LAN_FILTERMASK_PROMISC_MCAST_ENABLE 0x0004
1173 #define I2O_LAN_FILTERMASK_BROADCAST_DISABLE 0x0100
1174 #define I2O_LAN_FILTERMASK_MCAST_DISABLE 0x0200
1175 #define I2O_LAN_FILTERMASK_FUNCADDR_DISABLE 0x0400
1176 #define I2O_LAN_FILTERMASK_MACMODE_0 0x0800
1177 #define I2O_LAN_FILTERMASK_MACMODE_1 0x1000
1179 #define I2O_PARAM_LAN_MCAST_MAC_ADDRESS 0x0002
1181 * This one's a table, not a scalar.
1184 #define I2O_PARAM_LAN_BATCH_CONTROL 0x0003
1185 struct i2o_param_lan_batch_control
{
1186 u_int32_t batchflags
;
1187 u_int32_t risingloaddly
; /* 1.5 only */
1188 u_int32_t risingloadthresh
; /* 1.5 only */
1189 u_int32_t fallingloaddly
; /* 1.5 only */
1190 u_int32_t fallingloadthresh
; /* 1.5 only */
1191 u_int32_t maxrxbatchcount
;
1192 u_int32_t maxrxbatchdelay
;
1193 u_int32_t maxtxbatchdelay
; /* 2.0 (conflict with 1.5) */
1194 u_int32_t maxtxbatchcount
; /* 2.0 only */
1197 #define I2O_PARAM_LAN_BATCH_CONTROL_batchflags 0
1198 #define I2O_PARAM_LAN_BATCH_CONTROL_risingloaddly 1
1199 #define I2O_PARAM_LAN_BATCH_CONTROL_risingloadthresh 2
1200 #define I2O_PARAM_LAN_BATCH_CONTROL_fallingloaddly 3
1201 #define I2O_PARAM_LAN_BATCH_CONTROL_fallingloadthresh 4
1202 #define I2O_PARAM_LAN_BATCH_CONTROL_maxrxbatchcount 5
1203 #define I2O_PARAM_LAN_BATCH_CONTROL_maxrxbatchdelay 6
1204 #define I2O_PARAM_LAN_BATCH_CONTROL_maxtxbatchdelay 7
1205 #define I2O_PARAM_LAN_BATCH_CONTROL_maxtxbatchcount 8
1207 #define I2O_PARAM_LAN_OPERATION 0x0004
1208 struct i2o_param_lan_operation
{
1209 u_int32_t pktprepad
;
1210 u_int32_t userflags
;
1211 u_int32_t pktorphanlimit
;
1212 u_int32_t txmodesenable
; /* 2.0 only */
1213 u_int32_t rxmodesenable
; /* 2.0 only */
1216 #define I2O_PARAM_LAN_OPERATION_pktprepad 0
1217 #define I2O_PARAM_LAN_OPERATION_userflags 1
1218 #define I2O_PARAM_LAN_OPERATION_pktorphanlimit 2
1219 #define I2O_PARAM_LAN_OPERATION_txmodesenable 3
1220 #define I2O_PARAM_LAN_OPERATION_rxmodesenable 4
1222 #define I2O_PARAM_LAN_MEDIA_OPERATION 0x0005
1223 struct i2o_param_lan_media_operation
{
1224 u_int32_t connectortype
;
1225 u_int32_t connectiontype
;
1228 u_int8_t fullduplex
;
1229 u_int8_t linkstatus
;
1230 u_int8_t badpkthandling
; /* v1.5 only */
1231 u_int8_t duplextarget
; /* v2.0 only */
1232 u_int32_t connectortarget
; /* v2.0 only */
1233 u_int32_t connectiontarget
; /* v2.0 only */
1236 #define I2O_PARAM_LAN_MEDIA_OPERATION_connectortype 0
1237 #define I2O_PARAM_LAN_MEDIA_OPERATION_connectiontype 1
1238 #define I2O_PARAM_LAN_MEDIA_OPERATION_curtxbps 2
1239 #define I2O_PARAM_LAN_MEDIA_OPERATION_currxbps 3
1240 #define I2O_PARAM_LAN_MEDIA_OPERATION_fullduplex 4
1241 #define I2O_PARAM_LAN_MEDIA_OPERATION_linkstatus 5
1242 #define I2O_PARAM_LAN_MEDIA_OPERATION_badpkthandling 6
1243 #define I2O_PARAM_LAN_MEDIA_OPERATION_duplextarget 7
1244 #define I2O_PARAM_LAN_MEDIA_OPERATION_connectortarget 8
1245 #define I2O_PARAM_LAN_MEDIA_OPERATION_connectiontarget 9
1247 #define I2O_LAN_CONNECTOR_OTHER 0x00
1248 #define I2O_LAN_CONNECTOR_UNKNOWN 0x01
1249 #define I2O_LAN_CONNECTOR_AUI 0x02
1250 #define I2O_LAN_CONNECTOR_UTP 0x03
1251 #define I2O_LAN_CONNECTOR_BNC 0x04
1252 #define I2O_LAN_CONNECTOR_RJ45 0x05
1253 #define I2O_LAN_CONNECTOR_STP_DB9 0x06
1254 #define I2O_LAN_CONNECTOR_FIBER_MIC 0x07
1255 #define I2O_LAN_CONNECTOR_APPLE_AUI 0x08
1256 #define I2O_LAN_CONNECTOR_MII 0x09
1257 #define I2O_LAN_CONNECTOR_COPPER_DB9 0x0a
1258 #define I2O_LAN_CONNECTOR_COPPER_AW 0x0b
1259 #define I2O_LAN_CONNECTOR_OPTICAL_LW 0x0c
1260 #define I2O_LAN_CONNECTOR_SIP 0x0d
1261 #define I2O_LAN_CONNECTOR_OPTICAL_SW 0x0e
1263 #define I2O_LAN_CONNECTION_UNKNOWN 0x0000
1265 #define I2O_LAN_CONNECTION_ETHERNET_AUI 0x0301
1266 #define I2O_LAN_CONNECTION_ETHERNET_10BASE5 0x0302
1267 #define I2O_LAN_CONNECTION_ETHERNET_FOIRL 0x0303
1268 #define I2O_LAN_CONNECTION_ETHERNET_10BASE2 0x0304
1269 #define I2O_LAN_CONNECTION_ETHERNET_10BROAD36 0x0305
1270 #define I2O_LAN_CONNECTION_ETHERNET_10BASET 0x0306
1271 #define I2O_LAN_CONNECTION_ETHERNET_10BASEFP 0x0307
1272 #define I2O_LAN_CONNECTION_ETHERNET_10BASEFB 0x0308
1273 #define I2O_LAN_CONNECTION_ETHERNET_10BASEFL 0x0309
1274 #define I2O_LAN_CONNECTION_ETHERNET_100BASETX 0x030a
1275 #define I2O_LAN_CONNECTION_ETHERNET_100BASEFX 0x030b
1276 #define I2O_LAN_CONNECTION_ETHERNET_100BASET4 0x030c
1277 #define I2O_LAN_CONNECTION_ETHERNET_1000BASESX 0x030d
1278 #define I2O_LAN_CONNECTION_ETHERNET_1000BASELX 0x030e
1279 #define I2O_LAN_CONNECTION_ETHERNET_1000BASECX 0x030f
1280 #define I2O_LAN_CONNECTION_ETHERNET_1000BASET 0x0310
1282 #define I2O_LAN_CONNECTION_100BASEVG_ETHERNET 0x0401
1283 #define I2O_LAN_CONNECTION_100BASEVG_TOKEN_RING 0x0402
1285 #define I2O_LAN_CONNECTION_TOKEN_RING_4MBIT 0x0501
1286 #define I2O_LAN_CONNECTION_TOKEN_RING_16MBIT 0x0502
1288 #define I2O_LAN_CONNECTION_FDDI_125MBIT 0x0601
1290 #define I2O_LAN_CONNECTION_FIBRECHANNEL_P2P 0x0701
1291 #define I2O_LAN_CONNECTION_FIBRECHANNEL_AL 0x0702
1292 #define I2O_LAN_CONNECTION_FIBRECHANNEL_PL 0x0703
1293 #define I2O_LAN_CONNECTION_FIBRECHANNEL_F 0x0704
1295 #define I2O_LAN_CONNECTION_OTHER_EMULATED 0x0f00
1296 #define I2O_LAN_CONNECTION_OTHER_OTHER 0x0f01
1298 #define I2O_LAN_CONNECTION_DEFAULT 0xffffffff
1300 #define I2O_PARAM_LAN_TRANSMIT_INFO 0x0007
1301 struct i2o_param_lan_transmit_info
{
1303 u_int32_t maxchainsg
;
1304 u_int32_t maxoutstanding
;
1305 u_int32_t maxpktsout
;
1306 u_int32_t maxpktsreq
;
1310 #define I2O_LAN_MODES_NO_DA_IN_SGL 0x0002
1311 #define I2O_LAN_MODES_CRC_SUPPRESSION 0x0004
1312 #define I2O_LAN_MODES_LOOPBACK_SUPPRESSION 0x0004 /* 1.5 only */
1313 #define I2O_LAN_MODES_FCS_RECEPTION 0x0008 /* 2.0 only */
1314 #define I2O_LAN_MODES_MAC_INSERTION 0x0010
1315 #define I2O_LAN_MODES_RIF_INSERTION 0x0020
1316 #define I2O_LAN_MODES_IPV4_CHECKSUM 0x0100 /* 2.0 only */
1317 #define I2O_LAN_MODES_TCP_CHECKSUM 0x0200 /* 2.0 only */
1318 #define I2O_LAN_MODES_UDP_CHECKSUM 0x0400 /* 2.0 only */
1319 #define I2O_LAN_MODES_RSVP_CHECKSUM 0x0800 /* 2.0 only */
1320 #define I2O_LAN_MODES_ICMP_CHECKSUM 0x1000 /* 2.0 only */
1322 #define I2O_PARAM_LAN_RECEIVE_INFO 0x0008
1323 struct i2o_param_lan_receive_info
{
1325 u_int32_t maxbuckets
;
1328 #define I2O_PARAM_LAN_STATS 0x0009
1329 struct i2o_param_lan_stats
{
1335 u_int64_t rxnobuffer
;
1336 u_int64_t resetcount
;
1339 #define I2O_PARAM_LAN_802_3_STATS 0x0200
1340 struct i2o_param_lan_802_3_stats
{
1341 u_int64_t alignmenterror
;
1342 u_int64_t onecollision
;
1343 u_int64_t manycollisions
;
1345 u_int64_t latecollision
;
1346 u_int64_t maxcollisions
;
1347 u_int64_t carrierlost
;
1348 u_int64_t excessivedeferrals
;
1351 #define I2O_PARAM_LAN_FDDI_STATS 0x0400
1352 struct i2o_param_lan_fddi_stats
{
1353 u_int64_t configstate
;
1354 u_int64_t upstreamnode
;
1355 u_int64_t downstreamnode
;
1356 u_int64_t frameerrors
;
1357 u_int64_t frameslost
;
1358 u_int64_t ringmgmtstate
;
1359 u_int64_t lctfailures
;
1360 u_int64_t lemrejects
;
1362 u_int64_t lconnectionstate
;
1365 #endif /* !defined _I2O_I2O_H_ */