sys/dev/ic/clmpccvar.h

   1 /*      $NetBSD: clmpccvar.h,v 1.11 2007/07/14 21:02:37 ad Exp $ */
   2
   3 /*-
   4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Steve C. Woodford.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #ifndef __clmpccvar_h
  33 #define __clmpccvar_h
  34
  35
  36 /* Buffer size for character buffer */
  37 #define CLMPCC_RING_SIZE        512
  38
  39 /* How many channels per chip */
  40 #define CLMPCC_NUM_CHANS        4
  41
  42 /* Reasons for calling the MD code's iack hook function */
  43 #define CLMPCC_IACK_MODEM       0
  44 #define CLMPCC_IACK_RX          1
  45 #define CLMPCC_IACK_TX          2
  46
  47
  48 struct clmpcc_softc;
  49
  50 /*
  51  * Each channel is represented by one of the following structures
  52  */
  53 struct clmpcc_chan {
  54         struct tty      *ch_tty;        /* This channel's tty structure */
  55         struct clmpcc_softc *ch_sc;     /* Pointer to chip's softc structure */
  56         u_char          ch_car;         /* Channel number (CD2400_REG_CAR) */
  57         u_char          ch_openflags;   /* Persistent TIOC flags */
  58         volatile u_short ch_flags;      /* Various channel-specific flags */
  59 #define CLMPCC_FLG_IS_CONSOLE   0x0001  /* Channel is system console */
  60 #define CLMPCC_FLG_START_BREAK  0x0002
  61 #define CLMPCC_FLG_END_BREAK    0x0004
  62 #define CLMPCC_FLG_FIFO_CLEAR   0x0008
  63 #define CLMPCC_FLG_UPDATE_PARMS 0x0010
  64 #define CLMPCC_FLG_NEED_INIT    0x0020
  65
  66         u_char          ch_tx_done;
  67
  68         u_char          ch_control;
  69
  70         /* New port parameters wait here until written by the Tx ISR */
  71         u_char          ch_tcor;
  72         u_char          ch_tbpr;
  73         u_char          ch_rcor;
  74         u_char          ch_rbpr;
  75         u_char          ch_cor1;
  76         u_char          ch_cor2;
  77         u_char          ch_cor3;
  78         u_char          ch_cor4;        /* Current Rx Fifo threshold */
  79         u_char          ch_cor5;
  80
  81         u_int8_t        *ch_ibuf;       /* Start of input ring buffer */
  82         u_int8_t        *ch_ibuf_end;   /* End of input ring buffer */
  83         u_int8_t        *ch_ibuf_rd;    /* Input buffer tail (reader) */
  84         u_int8_t        *ch_ibuf_wr;    /* Input buffer head (writer) */
  85
  86         u_int8_t        *ch_obuf_addr;  /* Output buffer address */
  87         u_int           ch_obuf_size;   /* Output buffer size (in bytes) */
  88 };
  89
  90
  91 struct clmpcc_softc {
  92         struct device   sc_dev;
  93
  94         /*
  95          * The bus/MD-specific attachment code must initialise the
  96          * following fields before calling 'clmpcc_attach_subr()'.
  97          */
  98         bus_space_tag_t sc_iot;         /* Tag for parent bus */
  99         bus_space_handle_t sc_ioh;      /* Handle for chip's regs */
 100         void            *sc_data;       /* MD-specific data */
 101         int             sc_clk;         /* Clock-rate, in Hz */
 102         struct evcnt    *sc_evcnt;      /* Parent Event Counter (or NULL) */
 103         u_char          sc_vector_base; /* Vector base reg, or 0 for auto */
 104         u_char          sc_rpilr;       /* Receive Priority Interrupt Level */
 105         u_char          sc_tpilr;       /* Transmit Priority Interrupt Level */
 106         u_char          sc_mpilr;       /* Modem Priority Interrupt Level */
 107         int             sc_swaprtsdtr;  /* Non-zero if RTS and DTR swapped */
 108         u_int           sc_byteswap;    /* One of the following ... */
 109 #define CLMPCC_BYTESWAP_LOW     0x00    /* *byteswap pin is low */
 110 #define CLMPCC_BYTESWAP_HIGH    0x03    /* *byteswap pin is high */
 111
 112         void            *sc_softintr_cookie;
 113
 114         /* Called when an interrupt has to be acknowledged in polled mode. */
 115         void            (*sc_iackhook)(struct clmpcc_softc *, int);
 116
 117         /*
 118          * No user-serviceable parts below
 119          */
 120         struct clmpcc_chan sc_chans[CLMPCC_NUM_CHANS];
 121 };
 122
 123 extern void     clmpcc_attach(struct clmpcc_softc *);
 124 extern int      clmpcc_cnattach(struct clmpcc_softc *, int, int);
 125 extern int      clmpcc_rxintr(void *);
 126 extern int      clmpcc_txintr(void *);
 127 extern int      clmpcc_mdintr(void *);
 128 extern void     clmpcc_softintr(void *);
 129
 130 #endif  /* __clmpccvar_h */