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[netbsd-mini2440.git] / sys / dev / ic / cs4215reg.h
blob1dca5c9e0b646a900171977fc54f0b0c71208cda
1 /* $NetBSD: cs4215reg.h,v 1.3 2007/03/14 05:35:22 macallan Exp $ */
3 /*
4 * Copyright (c) 2001 Jared D. McNeill <jmcneill@NetBSD.org>
5 * All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
30 /* time slot 1: status register */
31 #define CS4215_CLB (1<<2) /* control latch bit */
32 #define CS4215_MLB (1<<4) /* 1: mic: 20 dB gain disabled */
33 #define CS4215_RSRVD_1 (1<<5)
35 /* time slot 2: data format register */
36 #define CS4215_DFR_LINEAR16 0
37 #define CS4215_DFR_ULAW 1
38 #define CS4215_DFR_ALAW 2
39 #define CS4215_DFR_LINEAR8 3
40 #define CS4215_DFR_STEREO (1<<2)
41 const struct {
42 unsigned short freq;
43 unsigned char xtal;
44 unsigned char csval;
45 } CS4215_FREQ[] = {
46 { 8000, (1<<4), (0<<3) },
47 { 16000, (1<<4), (1<<3) },
48 { 27429, (1<<4), (2<<3) }, /* actually 24428.57 */
49 { 32000, (1<<4), (3<<3) },
50 /* NA (4<<3) */
51 /* NA (5<<3) */
52 { 48000, (1<<4), (6<<3) },
53 { 9600, (1<<4), (7<<3) },
54 { 5513, (2<<4), (0<<3) }, /* actually 5512.5 */
55 { 11025, (2<<4), (1<<3) },
56 { 18900, (2<<4), (2<<3) },
57 { 22050, (2<<4), (3<<3) },
58 { 37800, (2<<4), (4<<3) },
59 { 44100, (2<<4), (5<<3) },
60 { 33075, (2<<4), (6<<3) },
61 { 6615, (2<<4), (7<<3) },
62 { 0, 0, 0 }
65 /* time slot 3: serial port control register */
66 #define CS4215_XCLK (1<<1) /* 0: enable serial output */
67 #define CS4215_BSEL_128 (1<<2) /* bitrate: 128 bits per frame */
69 /* time slot 5: output setting */
70 #define CS4215_LO(v) (v) /* left output attenuation 0x3f: -94.5 dB */
71 #define CS4215_LE (1<<6) /* line out enable */
72 #define CS4215_HE (1<<7) /* headphone enable */
74 /* time slot 6: output setting */
75 #define CS4215_RO(v) (v) /* right output attenuation 0x3f: -94.5 dB */
76 #define CS4215_SE (1<<6) /* speaker enable */
77 #define CS4215_ADI (1<<7) /* a/d data invalid: busy in calibration */
79 /* time slot 7: input setting */
80 #define CS4215_LG(v) (v) /* left gain setting 0xf: 22.5 dB */
81 #define CS4215_IS (1<<4) /* input select: 1 = mic, 0 = line */
82 #define CS4215_PIO0 (1<<6) /* parallel I/O 0 */
83 #define CS4215_PIO1 (1<<7) /* parallel I/O 1 */
85 /* time slot 8: input setting */
86 #define CS4215_RG(v) (v) /* right gain setting 0xf: 22.5 dB */
87 #define CS4215_MA(v) ((v)<<4) /* monitor path attenuation 0xf: mute */