1 /* $NetBSD: i82596var.h,v 1.14 2009/05/10 04:26:19 tsutsui Exp $ */
4 * Copyright (c) 2003 Jochen Kunz.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of Jochen Kunz may not be used to endorse or promote
16 * products derived from this software without specific prior
19 * THIS SOFTWARE IS PROVIDED BY JOCHEN KUNZ
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL JOCHEN KUNZ
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 /* All definitions are for a Intel 82596 DX/SX / CA in linear 32 bit mode. */
36 /* Supported chip variants */
37 extern const char *i82596_typenames
[];
38 enum i82596_types
{ I82596_UNKNOWN
, I82596_DX
, I82596_CA
};
42 /* System Configuration Pointer */
44 volatile uint16_t scp_pad1
;
45 volatile uint16_t scp_sysbus
; /* Sysbus Byte */
46 volatile uint32_t scp_pad2
;
47 volatile uint32_t scp_iscp_addr
; /* Int. Sys. Conf. Pointer */
52 /* Intermediate System Configuration Pointer */
54 volatile uint16_t iscp_busy
; /* Even Word, bits 0..15 */
55 volatile uint16_t iscp_pad
; /* Odd Word, bits 16..32 */
56 volatile uint32_t iscp_scb_addr
; /* address of SCB */
61 /* System Control Block */
63 volatile uint16_t scb_status
; /* Status Bits */
64 volatile uint16_t scb_cmd
; /* Command Bits */
65 volatile uint32_t scb_cmd_blk_addr
; /* Command Block Address */
66 volatile uint32_t scb_rfa_addr
; /* Receive Frame Area Address */
67 volatile uint32_t scb_crc_err
; /* CRC Errors */
68 volatile uint32_t scb_align_err
; /* Alignment Errors */
69 volatile uint32_t scb_resource_err
; /* Resource Errors [1] */
70 volatile uint32_t scb_overrun_err
; /* Overrun Errors [1] */
71 volatile uint32_t scb_rcvcdt_err
; /* RCVCDT Errors [1] */
72 volatile uint32_t scb_short_fr_err
; /* Short Frame Errors */
73 volatile uint16_t scb_tt_off
; /* Bus Throtle Off Timer */
74 volatile uint16_t scb_tt_on
; /* Bus Throtle On Timer */
76 /* [1] In MONITOR mode these counters change function. */
82 volatile uint16_t cb_status
; /* Status Bits */
83 volatile uint16_t cb_cmd
; /* Command Bits */
84 volatile uint32_t cb_link_addr
; /* Link Address to next CMD */
86 volatile uint8_t cb_ind_addr
[8];/* Individual Address */
87 volatile uint8_t cb_cf
[16]; /* Configuration Bytes */
89 volatile uint16_t mc_size
;/* Num bytes of Mcast Addr.*/
90 volatile uint8_t mc_addrs
[6]; /* List of Mcast Addr. */
93 volatile uint32_t tx_tbd_addr
;/* TX Buf. Descr. Addr.*/
94 volatile uint16_t tx_tcb_count
; /* Len. of opt. data */
95 volatile uint16_t tx_pad
;
96 volatile uint8_t tx_dest_addr
[6]; /* Dest. Addr. */
97 volatile uint16_t tx_length
; /* Length of data */
98 /* uint8_t data; Data to send, optional */
100 volatile uint32_t cb_tdr
; /* Time & Flags from TDR CMD */
101 volatile uint32_t cb_dump_addr
; /* Address of Dump buffer */
107 /* Transmit Buffer Descriptor */
109 volatile uint16_t tbd_size
; /* Size of buffer & Flags */
110 volatile uint16_t tbd_pad
;
111 volatile uint32_t tbd_link_addr
; /* Link Address to next RFD */
112 volatile uint32_t tbd_tb_addr
; /* Transmit Buffer Address */
117 /* Receive Frame Descriptor */
119 volatile uint16_t rfd_status
; /* Status Bits */
120 volatile uint16_t rfd_cmd
; /* Command Bits */
121 volatile uint32_t rfd_link_addr
; /* Link Address to next RFD */
122 volatile uint32_t rfd_rbd_addr
; /* Address of first free RBD */
123 volatile uint16_t rfd_count
; /* Actual Count */
124 volatile uint16_t rfd_size
; /* Size */
125 volatile uint8_t rfd_dest_addr
[6]; /* Destination Address */
126 volatile uint8_t rfd_src_addr
[6]; /* Source Address */
127 volatile uint16_t rfd_length
; /* Length Field */
128 volatile uint16_t rfd_pad
; /* Optional Data */
133 /* Receive Buffer Descriptor */
135 volatile uint16_t rbd_count
; /* Actual Cont of bytes */
136 volatile uint16_t rbd_pad1
;
137 volatile uint32_t rbd_next_rbd
; /* Address of Next RBD */
138 volatile uint32_t rbd_rb_addr
; /* Receive Buffer Address */
139 volatile uint16_t rbd_size
; /* Size of Receive Buffer */
140 volatile uint16_t rbd_pad2
;
145 #define IEE_NRFD 32 /* Number of RFDs == length of receive queue */
146 #define IEE_NCB 32 /* Number of Command Blocks == transmit queue */
147 #define IEE_NTBD 16 /* Number of TBDs per CB */
152 device_t sc_dev
; /* common device data */
153 struct ifmedia sc_ifmedia
; /* media interface */
154 struct ethercom sc_ethercom
; /* ethernet specific stuff */
155 enum i82596_types sc_type
;
156 bus_dma_tag_t sc_dmat
;
157 bus_dmamap_t sc_shmem_map
;
158 bus_dma_segment_t sc_dma_segs
;
160 bus_dmamap_t sc_rx_map
[IEE_NRFD
];
161 bus_dmamap_t sc_tx_map
[IEE_NCB
];
162 struct mbuf
*sc_rx_mbuf
[IEE_NRFD
];
163 struct mbuf
*sc_tx_mbuf
[IEE_NCB
];
164 uint8_t *sc_shmem_addr
;
188 uint32_t sc_align_err
;
189 uint32_t sc_resource_err
;
190 uint32_t sc_overrun_err
;
191 uint32_t sc_rcvcdt_err
;
192 uint32_t sc_short_fr_err
;
193 uint32_t sc_receive_err
;
197 uint32_t sc_tx_timeout
;
198 uint32_t sc_setup_timeout
;
199 int (*sc_iee_cmd
)(struct iee_softc
*, uint32_t);
200 int (*sc_iee_reset
)(struct iee_softc
*);
201 void (*sc_mediastatus
)(struct ifnet
*, struct ifmediareq
*);
202 int (*sc_mediachange
)(struct ifnet
*);
208 #define IEE_NEED_SWAP 0x01
209 #define IEE_WANT_MCAST 0x02
210 #define IEE_REV_A 0x04
213 * Rev A1 chip doesn't have 32-bit BE mode and all 32 bit pointers are
214 * treated as two 16-bit big endian entities.
216 #define IEE_SWAPA32(x) ((sc->sc_flags & (IEE_NEED_SWAP|IEE_REV_A)) == \
217 (IEE_NEED_SWAP|IEE_REV_A) ? \
218 (((x) << 16) | ((x) >> 16)) : (x))
220 * The SCB absolute address and statistical counters are
221 * always treated as two 16-bit big endian entities
222 * even in 32-bit BE mode supported by Rev B and C chips.
224 #define IEE_SWAP32(x) ((sc->sc_flags & IEE_NEED_SWAP) != 0 ? \
225 (((x) << 16) | ((x) >> 16)) : (x))
226 #define IEE_PHYS_SHMEM(x) ((uint32_t) (sc->sc_shmem_map->dm_segs[0].ds_addr \
229 #define SC_SCP(sc) ((struct iee_scp *)((sc)->sc_shmem_addr + \
231 #define SC_ISCP(sc) ((struct iee_iscp *)((sc)->sc_shmem_addr + \
233 #define SC_SCB(sc) ((struct iee_scb *)((sc)->sc_shmem_addr + \
235 #define SC_RFD(sc, n) ((struct iee_rfd *)((sc)->sc_shmem_addr + \
237 (n) * (sc)->sc_rfd_sz))
238 #define SC_RBD(sc, n) ((struct iee_rbd *)((sc)->sc_shmem_addr + \
240 (n) * (sc)->sc_rbd_sz))
241 #define SC_CB(sc, n) ((struct iee_cb *)((sc)->sc_shmem_addr + \
243 (n) * (sc)->sc_cb_sz))
244 #define SC_TBD(sc, n) ((struct iee_tbd *)((sc)->sc_shmem_addr + \
246 (n) * (sc)->sc_tbd_sz))
248 #define IEE_SCPSYNC(sc, ops) \
249 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
250 (sc)->sc_scb_off, (sc)->sc_scp_sz, (ops))
251 #define IEE_ISCPSYNC(sc, ops) \
252 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
253 (sc)->sc_iscp_off, (sc)->sc_iscp_sz, (ops))
254 #define IEE_SCBSYNC(sc, ops) \
255 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
256 (sc)->sc_scb_off, (sc)->sc_scb_sz, (ops))
257 #define IEE_RFDSYNC(sc, n, ops) \
258 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
259 (sc)->sc_rfd_off + (n) * (sc)->sc_rfd_sz, \
260 (sc)->sc_rfd_sz, (ops))
261 #define IEE_RBDSYNC(sc, n, ops) \
262 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
263 (sc)->sc_rbd_off + (n) * (sc)->sc_rbd_sz, \
264 (sc)->sc_rbd_sz, (ops))
265 #define IEE_CBSYNC(sc, n, ops) \
266 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
267 (sc)->sc_cb_off + (n) * (sc)->sc_cb_sz, \
268 (sc)->sc_cb_sz, (ops))
269 #define IEE_TBDSYNC(sc, n, ops) \
270 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_shmem_map, \
271 (sc)->sc_tbd_off + (n) * (sc)->sc_tbd_sz, \
272 (sc)->sc_tbd_sz, (ops))
274 void iee_attach(struct iee_softc
*, uint8_t *, int *, int, int);
275 void iee_detach(struct iee_softc
*, int);
276 int iee_intr(void *);