sys/dev/ic/lemacvar.h

   1 /*      $NetBSD: lemacvar.h,v 1.6.22.3 2004/09/21 13:28:04 skrll Exp $ */
   2
   3 /*
   4  * Copyright (c) 1997 Matt Thomas <matt@3am-software.com>
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. The name of the author may not be used to endorse or promote products
  13  *    derived from this software without specific prior written permission
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  */
  26
  27 #ifndef _LEMAC_VAR_H
  28 #define _LEMAC_VAR_H
  29
  30 #include "rnd.h"
  31 #if NRND > 0
  32 #include <sys/rnd.h>
  33 #endif
  34
  35 /*
  36  * Ethernet status, per interface.
  37  */
  38 typedef struct {
  39     struct device sc_dv;
  40     void *sc_ih;
  41     void *sc_ats;
  42     struct ethercom sc_ec;
  43     struct ifmedia sc_ifmedia;
  44     bus_space_tag_t sc_iot;
  45     bus_space_tag_t sc_memt;
  46     bus_space_handle_t sc_ioh;
  47     bus_space_handle_t sc_memh;
  48     unsigned sc_flags;                  /* */
  49 #define LEMAC_PIO_MODE          0x0000U
  50 #define LEMAC_2K_MODE           0x0001U
  51 #define LEMAC_WAS_32K_MODE      0x0002U
  52 #define LEMAC_WAS_64K_MODE      0x0003U
  53 #define LEMAC_MODE_MASK         0x0003U
  54 #define LEMAC_ALLMULTI          0x0010U
  55 #define LEMAC_ALIVE             0x0020U
  56 #define LEMAC_LINKUP            0x0040U
  57     unsigned sc_lastpage;               /* last 2K page */
  58     unsigned sc_txctl;                  /* Transmit Control Byte */
  59     unsigned sc_ctlmode;                /* media ctl bits */
  60     struct {
  61         u_int8_t csr_cs;
  62         u_int8_t csr_tqc;
  63         u_int8_t csr_fmq;
  64     } sc_csr;
  65     unsigned sc_laststatus;             /* last read of LEMAC_REG_CS */
  66     u_int16_t sc_mctbl[LEMAC_MCTBL_SIZE/sizeof(u_int16_t)];
  67                                         /* local copy of multicast table */
  68     struct {
  69         unsigned cntr_txnospc;          /* total # of no transmit memory */
  70         unsigned cntr_txfull;           /* total # of transmitter full */
  71         unsigned cntr_tne_intrs;        /* total # of transmit done intrs */
  72         unsigned cntr_rne_intrs;        /* total # of receive done intrs */
  73         unsigned cntr_txd_intrs;        /* total # of transmit error intrs */
  74         unsigned cntr_rxd_intrs;        /* total # of receive error intrs */
  75     } sc_cntrs;
  76     /*
  77      * We rely on sc_enaddr being aligned on (at least) a 16 bit boundary
  78      */
  79     unsigned char sc_enaddr[ETHER_ADDR_LEN];    /* current Ethernet address */
  80     char sc_prodname[LEMAC_EEP_PRDNMSZ+1]; /* product name DE20x-xx */
  81     u_int8_t sc_eeprom[LEMAC_EEP_SIZE]; /* local copy eeprom */
  82 #if NRND > 0
  83     rndsource_element_t rnd_source;
  84 #endif
  85 } lemac_softc_t;
  86
  87 #define sc_if   sc_ec.ec_if
  88
  89 #define LEMAC_IFP_TO_SOFTC(ifp) ((lemac_softc_t *)((ifp)->if_softc))
  90 #define LEMAC_USE_PIO_MODE(sc)  (((sc->sc_flags & LEMAC_MODE_MASK) == LEMAC_PIO_MODE) || (sc->sc_if.if_flags & IFF_LINK0))
  91
  92 #define LEMAC_OUTB(sc, o, v)    bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (o), (v))
  93 #define LEMAC_OUTSB(sc, o, l, p)        bus_space_write_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
  94 #define LEMAC_INB(sc, o)        bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (o))
  95 #define LEMAC_INSB(sc, o, l, p) bus_space_read_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
  96
  97 #define LEMAC_PUTBUF8(sc, o, l, p)      bus_space_write_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
  98 #define LEMAC_PUTBUF16(sc, o, l, p)     bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
  99 #define LEMAC_PUTBUF32(sc, o, l, p)     bus_space_write_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
 100
 101 #define LEMAC_PUT8(sc, o, v)    bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (o), (v))
 102 #define LEMAC_PUT16(sc, o, v)   bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (o), (v))
 103 #define LEMAC_PUT32(sc, o, v)   bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (o), (v))
 104
 105 #define LEMAC_GETBUF8(sc, o, l, p)      bus_space_read_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
 106 #define LEMAC_GETBUF16(sc, o, l, p)     bus_space_read_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
 107 #define LEMAC_GETBUF32(sc, o, l, p)     bus_space_read_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
 108
 109 #define LEMAC_GET8(sc, o)       bus_space_read_1((sc)->sc_memt, (sc)->sc_memh, (o))
 110 #define LEMAC_GET16(sc, o)      bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (o))
 111 #define LEMAC_GET32(sc, o)      bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (o))
 112
 113
 114 #define LEMAC_INTR_ENABLE(sc) \
 115         LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_ALL)
 116
 117 #define LEMAC_INTR_DISABLE(sc) \
 118         LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) & ~LEMAC_IC_ALL)
 119
 120 #define LEMAC_IS_64K_MODE(mbase) (((mbase) >= 0x0A) && ((mbase) <= 0x0F))
 121 #define LEMAC_IS_32K_MODE(mbase) (((mbase) >= 0x14) && ((mbase) <= 0x1F))
 122 #define LEMAC_IS_2K_MODE(mbase) ( (mbase) >= 0x40)
 123
 124 #define LEMAC_DECODEIRQ(i)      ((0xFBA5 >> ((i) >> 3)) & 0x0F)
 125
 126 #define LEMAC_ADDREQUAL(a1, a2) \
 127         (((u_int16_t *)a1)[0] == ((u_int16_t *)a2)[0] \
 128          && ((u_int16_t *)a1)[1] == ((u_int16_t *)a2)[1] \
 129          && ((u_int16_t *)a1)[2] == ((u_int16_t *)a2)[2])
 130
 131 #define LEMAC_ADDRBRDCST(a1) \
 132         (((u_int16_t *)a1)[0] == 0xFFFFU \
 133          && ((u_int16_t *)a1)[1] == 0xFFFFU \
 134          && ((u_int16_t *)a1)[2] == 0xFFFFU)
 135
 136 extern void lemac_ifattach(lemac_softc_t *);
 137 extern void lemac_info_get(const bus_space_tag_t, const bus_space_handle_t,
 138     bus_addr_t *, bus_size_t *, int *);
 139 extern int lemac_port_check(const bus_space_tag_t, const bus_space_handle_t);
 140 extern int lemac_intr(void *);
 141 extern void lemac_shutdown(void *);
 142
 143 #endif /* _LEMACVAR_H */