sys/dev/ic/mk48txxreg.h

   1 /*      $NetBSD: mk48txxreg.h,v 1.9 2005/12/11 12:21:27 christos Exp $ */
   2 /*-
   3  * Copyright (c) 2000 The NetBSD Foundation, Inc.
   4  * All rights reserved.
   5  *
   6  * This code is derived from software contributed to The NetBSD Foundation
   7  * by Paul Kranenburg.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  28  * POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 /*
  32  * Mostek MK48Txx clocks.
  33  *
  34  * The MK48T02 has 2KB of non-volatile memory. The time-of-day clock
  35  * registers start at offset 0x7f8.
  36  *
  37  * The MK48T08 and MK48T18 have 8KB of non-volatile memory
  38  *
  39  * The MK48T59 also has 8KB of non-volatile memory but in addition it
  40  * has a battery low detection bit and a power supply wakeup alarm for
  41  * power management.  It's at offset 0x1ff0 in the NVRAM.
  42  */
  43
  44 /*
  45  * Mostek MK48TXX register definitions
  46  */
  47
  48 /*
  49  * The first bank of eight registers at offset (nvramsz - 16) is
  50  * available only on more recent (which??) MK48Txx models.
  51  */
  52 #define MK48TXX_IFLAGS  0       /* flags */
  53 /*                      1          unused on MK48T59 */
  54 #define MK48TXX_IASEC   2       /* alarm seconds (0..59; BCD) */
  55 #define MK48TXX_IAMIN   3       /* alarm minutes (0..59; BCD) */
  56 #define MK48TXX_IAHOUR  4       /* alarm hour (0..23; BCD) */
  57 #define MK48TXX_IADAY   5       /* alarm day (1..31; BCD) */
  58 #define MK48TXX_IINTR   6       /* interrupts */
  59 #define MK48TXX_IWDOG   7       /* watchdog */
  60 #define MK48TXX_ICSR    8       /* control register */
  61 #define MK48TXX_ISEC    9       /* seconds (0..59; BCD) */
  62 #define MK48TXX_IMIN    10      /* minutes (0..59; BCD) */
  63 #define MK48TXX_IHOUR   11      /* hour (0..23; BCD) */
  64 #define MK48TXX_IWDAY   12      /* weekday (1..7) */
  65 #define MK48TXX_IDAY    13      /* day in month (1..31; BCD) */
  66 #define MK48TXX_IMON    14      /* month (1..12; BCD) */
  67 #define MK48TXX_IYEAR   15      /* year (0..99; BCD) */
  68
  69 /* Bits in the flags register */
  70 #define MK48TXX_FLAGS_WDF       0x80    /* watchdog flag */
  71 #define MK48TXX_FLAGS_ALARM     0x40    /* alarm flag */
  72 #define MK48TXX_FLAGS_BATTLOW   0x10    /* battery low */
  73
  74 /* Bits in the interrupt register */
  75 #define MK48TXX_INTR_AFE        0x80    /* alarm flag enable */
  76 #define MK48TXX_INTR_ABE        0x20    /* alarm in battery backup enable */
  77
  78 /* Bits in the watchdog register */
  79 #define MK48TXX_WDOG_WDS        0x80    /* watchdog steering */
  80 #define MK48TXX_WDOG_BMB_MASK   0x7c    /* watchdog multiplier bits */
  81 #define MK48TXX_WDOG_BMB_SHIFT  2
  82 #define MK48TXX_WDOG_RES_MASK   0x03    /* watchdog resolution bits */
  83 #define MK48TXX_WDOG_RES_1_16S  0x00    /*   1/16 seconds */
  84 #define MK48TXX_WDOG_RES_1_4S   0x01    /*   1/4 seconds */
  85 #define MK48TXX_WDOG_RES_1S     0x02    /*   1 second */
  86 #define MK48TXX_WDOG_RES_4S     0x03    /*   4 seconds */
  87
  88 /* Bits in the control register */
  89 #define MK48TXX_CSR_WRITE       0x80    /* want to write */
  90 #define MK48TXX_CSR_READ        0x40    /* want to read (freeze clock) */
  91
  92 /* Bit in the weekday register */
  93 #define MK48TXX_WDAY_FT         0x40    /* freq test: toggle sec[0] at 512Hz */
  94                                         /* next two are on MK48T59 only */
  95 #define MK48TXX_WDAY_CEB        0x20    /* century enable */
  96 #define MK48TXX_WDAY_CB         0x10    /* century bit */
  97
  98 /* Bit in the seconds register */
  99 #define MK48TXX_SEC_STOP        0x80    /* stop the oscillator */
 100
 101 #define MK48T02_CLKSZ           2048
 102 #define MK48T02_CLKOFF          0x7f0
 103
 104 #define MK48T08_CLKSZ           8192
 105 #define MK48T08_CLKOFF          0x1ff0
 106
 107 #define MK48T18_CLKSZ           8192
 108 #define MK48T18_CLKOFF          0x1ff0
 109
 110 #define MK48T59_CLKSZ           8192
 111 #define MK48T59_CLKOFF          0x1ff0