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[netbsd-mini2440.git] / sys / dev / ic / rrunner.c
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1 /* $NetBSD: rrunner.c,v 1.71 2009/04/15 20:44:25 elad Exp $ */
2
3 /*
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code contributed to The NetBSD Foundation by Kevin M. Lahey
8 * of the Numerical Aerospace Simulation Facility, NASA Ames Research
9 * Center.
10 *
11 * Partially based on a HIPPI driver written by Essential Communications
12 * Corporation. Thanks to Jason Thorpe, Matt Jacob, and Fred Templin
13 * for invaluable advice and encouragement!
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: rrunner.c,v 1.71 2009/04/15 20:44:25 elad Exp $");
39
40 #include "opt_inet.h"
41
42 #include "bpfilter.h"
43 #include "esh.h"
44
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/mbuf.h>
48 #include <sys/buf.h>
49 #include <sys/bufq.h>
50 #include <sys/socket.h>
51 #include <sys/ioctl.h>
52 #include <sys/errno.h>
53 #include <sys/syslog.h>
54 #include <sys/select.h>
55 #include <sys/device.h>
56 #include <sys/proc.h>
57 #include <sys/kernel.h>
58 #include <sys/conf.h>
59 #include <sys/kauth.h>
60
61 #include <uvm/uvm_extern.h>
62
63 #include <net/if.h>
64 #include <net/if_dl.h>
65 #include <net/route.h>
66
67 #include <net/if_hippi.h>
68 #include <net/if_media.h>
69
70 #ifdef INET
71 #include <netinet/in.h>
72 #include <netinet/in_systm.h>
73 #include <netinet/in_var.h>
74 #include <netinet/ip.h>
75 #include <netinet/if_inarp.h>
76 #endif
77
78
79 #if NBPFILTER > 0
80 #include <net/bpf.h>
81 #include <net/bpfdesc.h>
82 #endif
83
84 #include <sys/cpu.h>
85 #include <sys/bus.h>
86 #include <sys/intr.h>
87
88 #include <dev/ic/rrunnerreg.h>
89 #include <dev/ic/rrunnervar.h>
90
91 /*
92 #define ESH_PRINTF
93 */
94
95 /* Autoconfig definition of driver back-end */
96 extern struct cfdriver esh_cd;
97
98 struct esh_softc *esh_softc_debug[22]; /* for gdb */
99
100 #ifdef DIAGNOSTIC
101 u_int32_t max_write_len;
102 #endif
103
104 /* Network device driver and initialization framework routines */
105
106 void eshinit(struct esh_softc *);
107 int eshioctl(struct ifnet *, u_long, void *);
108 void eshreset(struct esh_softc *);
109 void eshstart(struct ifnet *);
110 static int eshstatus(struct esh_softc *);
111 void eshstop(struct esh_softc *);
112 void eshwatchdog(struct ifnet *);
113
114 /* Routines to support FP operation */
115
116 dev_type_open(esh_fpopen);
117 dev_type_close(esh_fpclose);
118 dev_type_read(esh_fpread);
119 dev_type_write(esh_fpwrite);
120 #ifdef MORE_DONE
121 dev_type_mmap(esh_fpmmap);
122 #endif
123 dev_type_strategy(esh_fpstrategy);
124
125 const struct cdevsw esh_cdevsw = {
126 esh_fpopen, esh_fpclose, esh_fpread, esh_fpwrite, nullioctl,
127 nostop, notty, nullpoll,
128 #ifdef MORE_DONE
129 esh_fpmmap,
130 #else
131 nommap,
132 #endif
133 nullkqfilter,
134 D_OTHER,
135 };
136
137 /* General routines, not externally visable */
138
139 static struct mbuf *esh_adjust_mbufs(struct esh_softc *, struct mbuf *m);
140 static void esh_dma_sync(struct esh_softc *, void *,
141 int, int, int, int, int, int);
142 static void esh_fill_snap_ring(struct esh_softc *);
143 static void esh_init_snap_ring(struct esh_softc *);
144 static void esh_close_snap_ring(struct esh_softc *);
145 static void esh_read_snap_ring(struct esh_softc *, u_int16_t, int);
146 static void esh_fill_fp_ring(struct esh_softc *, struct esh_fp_ring_ctl *);
147 static void esh_flush_fp_ring(struct esh_softc *,
148 struct esh_fp_ring_ctl *,
149 struct esh_dmainfo *);
150 static void esh_init_fp_rings(struct esh_softc *);
151 static void esh_read_fp_ring(struct esh_softc *, u_int16_t, int, int);
152 static void esh_reset_runcode(struct esh_softc *);
153 static void esh_send(struct esh_softc *);
154 static void esh_send_cmd(struct esh_softc *, u_int8_t, u_int8_t, u_int8_t);
155 static u_int32_t esh_read_eeprom(struct esh_softc *, u_int32_t);
156 static void esh_write_addr(bus_space_tag_t, bus_space_handle_t,
157 bus_addr_t, bus_addr_t);
158 static int esh_write_eeprom(struct esh_softc *, u_int32_t, u_int32_t);
159 static void eshstart_cleanup(struct esh_softc *, u_int16_t, int);
160
161 static struct esh_dmainfo *esh_new_dmainfo(struct esh_softc *);
162 static void esh_free_dmainfo(struct esh_softc *, struct esh_dmainfo *);
163 static int esh_generic_ioctl(struct esh_softc *, u_long, void *, u_long,
164 struct lwp *);
165
166 #ifdef ESH_PRINTF
167 static int esh_check(struct esh_softc *);
168 #endif
169
170 #define ESHUNIT(x) ((minor(x) & 0xff00) >> 8)
171 #define ESHULP(x) (minor(x) & 0x00ff)
172
173
174 /*
175 * Back-end attach and configure. Allocate DMA space and initialize
176 * all structures.
177 */
178
179 void
180 eshconfig(struct esh_softc *sc)
181 {
182 struct ifnet *ifp = &sc->sc_if;
183 bus_space_tag_t iot = sc->sc_iot;
184 bus_space_handle_t ioh = sc->sc_ioh;
185 u_int32_t misc_host_ctl;
186 u_int32_t misc_local_ctl;
187 u_int32_t header_format;
188 u_int32_t ula_tmp;
189 bus_size_t size;
190 int rseg;
191 int error;
192 int i;
193
194 esh_softc_debug[device_unit(&sc->sc_dev)] = sc;
195 sc->sc_flags = 0;
196
197 TAILQ_INIT(&sc->sc_dmainfo_freelist);
198 sc->sc_dmainfo_freelist_count = 0;
199
200 /*
201 * Allocate and divvy up some host side memory that can hold
202 * data structures that will be DMA'ed over to the NIC
203 */
204
205 sc->sc_dma_size = sizeof(struct rr_gen_info) +
206 sizeof(struct rr_ring_ctl) * RR_ULP_COUNT +
207 sizeof(struct rr_descr) * RR_SEND_RING_SIZE +
208 sizeof(struct rr_descr) * RR_SNAP_RECV_RING_SIZE +
209 sizeof(struct rr_event) * RR_EVENT_RING_SIZE;
210
211 error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dma_size,
212 0, RR_DMA_BOUNDARY, &sc->sc_dmaseg, 1,
213 &rseg, BUS_DMA_NOWAIT);
214 if (error) {
215 aprint_error_dev(&sc->sc_dev, "couldn't allocate space for host-side"
216 "data structures\n");
217 return;
218 }
219 if (rseg > 1) {
220 aprint_error_dev(&sc->sc_dev, "contiguous memory not available\n");
221 goto bad_dmamem_map;
222 }
223
224 error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dmaseg, rseg,
225 sc->sc_dma_size, (void **)&sc->sc_dma_addr,
226 BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
227 if (error) {
228 aprint_error_dev(&sc->sc_dev,
229 "couldn't map memory for host-side structures\n");
230 goto bad_dmamem_map;
231 }
232
233 if (bus_dmamap_create(sc->sc_dmat, sc->sc_dma_size,
234 1, sc->sc_dma_size, RR_DMA_BOUNDARY,
235 BUS_DMA_ALLOCNOW | BUS_DMA_NOWAIT,
236 &sc->sc_dma)) {
237 aprint_error_dev(&sc->sc_dev, "couldn't create DMA map\n");
238 goto bad_dmamap_create;
239 }
240
241 if (bus_dmamap_load(sc->sc_dmat, sc->sc_dma, sc->sc_dma_addr,
242 sc->sc_dma_size, NULL, BUS_DMA_NOWAIT)) {
243 aprint_error_dev(&sc->sc_dev, "couldn't load DMA map\n");
244 goto bad_dmamap_load;
245 }
246
247 memset(sc->sc_dma_addr, 0, sc->sc_dma_size);
248
249 sc->sc_gen_info_dma = sc->sc_dma->dm_segs->ds_addr;
250 sc->sc_gen_info = (struct rr_gen_info *) sc->sc_dma_addr;
251 size = sizeof(struct rr_gen_info);
252
253 sc->sc_recv_ring_table_dma = sc->sc_dma->dm_segs->ds_addr + size;
254 sc->sc_recv_ring_table =
255 (struct rr_ring_ctl *) (sc->sc_dma_addr + size);
256 size += sizeof(struct rr_ring_ctl) * RR_ULP_COUNT;
257
258 sc->sc_send_ring_dma = sc->sc_dma->dm_segs->ds_addr + size;
259 sc->sc_send_ring = (struct rr_descr *) (sc->sc_dma_addr + size);
260 sc->sc2_send_ring = (struct rr2_descr *) (sc->sc_dma_addr + size);
261 size += sizeof(struct rr_descr) * RR_SEND_RING_SIZE;
262
263 sc->sc_snap_recv_ring_dma = sc->sc_dma->dm_segs->ds_addr + size;
264 sc->sc_snap_recv_ring = (struct rr_descr *) (sc->sc_dma_addr + size);
265 sc->sc2_snap_recv_ring = (struct rr2_descr *) (sc->sc_dma_addr + size);
266 size += sizeof(struct rr_descr) * RR_SNAP_RECV_RING_SIZE;
267
268 sc->sc_event_ring_dma = sc->sc_dma->dm_segs->ds_addr + size;
269 sc->sc_event_ring = (struct rr_event *) (sc->sc_dma_addr + size);
270 size += sizeof(struct rr_event) * RR_EVENT_RING_SIZE;
271
272 #ifdef DIAGNOSTIC
273 if (size > sc->sc_dmaseg.ds_len) {
274 aprint_error_dev(&sc->sc_dev, "bogus size calculation\n");
275 goto bad_other;
276 }
277 #endif
278
279 /*
280 * Allocate DMA maps for transfers. We do this here and now
281 * so we won't have to wait for them in the middle of sending
282 * or receiving something.
283 */
284
285 if (bus_dmamap_create(sc->sc_dmat, ESH_MAX_NSEGS * RR_DMA_MAX,
286 ESH_MAX_NSEGS, RR_DMA_MAX, RR_DMA_BOUNDARY,
287 BUS_DMA_ALLOCNOW | BUS_DMA_NOWAIT,
288 &sc->sc_send.ec_dma)) {
289 aprint_error_dev(&sc->sc_dev, "failed bus_dmamap_create\n");
290 goto bad_other;
291 }
292 sc->sc_send.ec_offset = 0;
293 sc->sc_send.ec_descr = sc->sc_send_ring;
294 TAILQ_INIT(&sc->sc_send.ec_di_queue);
295 bufq_alloc(&sc->sc_send.ec_buf_queue, "fcfs", 0);
296
297 for (i = 0; i < RR_MAX_SNAP_RECV_RING_SIZE; i++)
298 if (bus_dmamap_create(sc->sc_dmat, RR_DMA_MAX, 1, RR_DMA_MAX,
299 RR_DMA_BOUNDARY,
300 BUS_DMA_ALLOCNOW | BUS_DMA_NOWAIT,
301 &sc->sc_snap_recv.ec_dma[i])) {
302 aprint_error_dev(&sc->sc_dev, "failed bus_dmamap_create\n");
303 for (i--; i >= 0; i--)
304 bus_dmamap_destroy(sc->sc_dmat,
305 sc->sc_snap_recv.ec_dma[i]);
306 goto bad_ring_dmamap_create;
307 }
308
309 /*
310 * If this is a coldboot, the NIC RunCode should be operational.
311 * If it is a warmboot, it may or may not be operational.
312 * Just to be sure, we'll stop the RunCode and reset everything.
313 */
314
315 /* Halt the processor (preserve NO_SWAP, if set) */
316
317 misc_host_ctl = bus_space_read_4(iot, ioh, RR_MISC_HOST_CTL);
318 bus_space_write_4(iot, ioh, RR_MISC_HOST_CTL,
319 (misc_host_ctl & RR_MH_NO_SWAP) | RR_MH_HALT_PROC);
320
321 /* Make the EEPROM readable */
322
323 misc_local_ctl = bus_space_read_4(iot, ioh, RR_MISC_LOCAL_CTL);
324 bus_space_write_4(iot, ioh, RR_MISC_LOCAL_CTL,
325 misc_local_ctl & ~(RR_LC_FAST_PROM | RR_LC_ADD_SRAM |
326 RR_LC_PARITY_ON));
327
328 /* Extract interesting information from the EEPROM: */
329
330 header_format = esh_read_eeprom(sc, RR_EE_HEADER_FORMAT);
331 if (header_format != RR_EE_HEADER_FORMAT_MAGIC) {
332 aprint_error_dev(&sc->sc_dev, "bogus EEPROM header format value %x\n",
333 header_format);
334 goto bad_other;
335 }
336
337 /*
338 * As it is now, the runcode version in the EEPROM doesn't
339 * reflect the actual runcode version number. That is only
340 * available once the runcode starts up. We should probably
341 * change the firmware update code to modify this value,
342 * but Essential itself doesn't do it right now.
343 */
344
345 sc->sc_sram_size = 4 * esh_read_eeprom(sc, RR_EE_SRAM_SIZE);
346 sc->sc_runcode_start = esh_read_eeprom(sc, RR_EE_RUNCODE_START);
347 sc->sc_runcode_version = esh_read_eeprom(sc, RR_EE_RUNCODE_VERSION);
348
349 sc->sc_pci_latency = esh_read_eeprom(sc, RR_EE_PCI_LATENCY);
350 sc->sc_pci_lat_gnt = esh_read_eeprom(sc, RR_EE_PCI_LAT_GNT);
351
352 /* General tuning values */
353
354 sc->sc_tune.rt_mode_and_status =
355 esh_read_eeprom(sc, RR_EE_MODE_AND_STATUS);
356 sc->sc_tune.rt_conn_retry_count =
357 esh_read_eeprom(sc, RR_EE_CONN_RETRY_COUNT);
358 sc->sc_tune.rt_conn_retry_timer =
359 esh_read_eeprom(sc, RR_EE_CONN_RETRY_TIMER);
360 sc->sc_tune.rt_conn_timeout =
361 esh_read_eeprom(sc, RR_EE_CONN_TIMEOUT);
362 sc->sc_tune.rt_interrupt_timer =
363 esh_read_eeprom(sc, RR_EE_INTERRUPT_TIMER);
364 sc->sc_tune.rt_tx_timeout =
365 esh_read_eeprom(sc, RR_EE_TX_TIMEOUT);
366 sc->sc_tune.rt_rx_timeout =
367 esh_read_eeprom(sc, RR_EE_RX_TIMEOUT);
368 sc->sc_tune.rt_stats_timer =
369 esh_read_eeprom(sc, RR_EE_STATS_TIMER);
370 sc->sc_tune.rt_stats_timer = ESH_STATS_TIMER_DEFAULT;
371
372 /* DMA tuning values */
373
374 sc->sc_tune.rt_pci_state =
375 esh_read_eeprom(sc, RR_EE_PCI_STATE);
376 sc->sc_tune.rt_dma_write_state =
377 esh_read_eeprom(sc, RR_EE_DMA_WRITE_STATE);
378 sc->sc_tune.rt_dma_read_state =
379 esh_read_eeprom(sc, RR_EE_DMA_READ_STATE);
380 sc->sc_tune.rt_driver_param =
381 esh_read_eeprom(sc, RR_EE_DRIVER_PARAM);
382
383 /*
384 * Snag the ULA. The first two bytes are reserved.
385 * We don't really use it immediately, but it would be good to
386 * have for building IPv6 addresses, etc.
387 */
388
389 ula_tmp = esh_read_eeprom(sc, RR_EE_ULA_HI);
390 sc->sc_ula[0] = (ula_tmp >> 8) & 0xff;
391 sc->sc_ula[1] = ula_tmp & 0xff;
392
393 ula_tmp = esh_read_eeprom(sc, RR_EE_ULA_LO);
394 sc->sc_ula[2] = (ula_tmp >> 24) & 0xff;
395 sc->sc_ula[3] = (ula_tmp >> 16) & 0xff;
396 sc->sc_ula[4] = (ula_tmp >> 8) & 0xff;
397 sc->sc_ula[5] = ula_tmp & 0xff;
398
399 /* Reset EEPROM readability */
400
401 bus_space_write_4(iot, ioh, RR_MISC_LOCAL_CTL, misc_local_ctl);
402
403 strlcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ);
404 ifp->if_softc = sc;
405 ifp->if_start = eshstart;
406 ifp->if_ioctl = eshioctl;
407 ifp->if_watchdog = eshwatchdog;
408 ifp->if_flags = IFF_SIMPLEX | IFF_NOTRAILERS | IFF_NOARP;
409 IFQ_SET_READY(&ifp->if_snd);
410
411 if_attach(ifp);
412 hippi_ifattach(ifp, sc->sc_ula);
413
414 sc->sc_misaligned_bufs = sc->sc_bad_lens = 0;
415 sc->sc_fp_rings = 0;
416
417 return;
418
419 bad_ring_dmamap_create:
420 bus_dmamap_destroy(sc->sc_dmat, sc->sc_send.ec_dma);
421 bad_other:
422 bus_dmamap_unload(sc->sc_dmat, sc->sc_dma);
423 bad_dmamap_load:
424 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dma);
425 bad_dmamap_create:
426 bus_dmamem_unmap(sc->sc_dmat, sc->sc_dma_addr, sc->sc_dma_size);
427 bad_dmamem_map:
428 bus_dmamem_free(sc->sc_dmat, &sc->sc_dmaseg, rseg);
429 return;
430 }
431
432
433 /*
434 * Bring device up.
435 *
436 * Assume that the on-board processor has already been stopped,
437 * the rings have been cleared of valid buffers, and everything
438 * is pretty much as it was when the system started.
439 *
440 * Stop the processor (just for good measure), clear the SRAM,
441 * reload the boot code, and start it all up again, with the PC
442 * pointing at the boot code. Once the boot code has had a chance
443 * to come up, adjust all of the appropriate parameters, and send
444 * the 'start firmware' command.
445 *
446 * The NIC won't actually be up until it gets an interrupt with an
447 * event indicating the RunCode is up.
448 */
449
450 void
451 eshinit(struct esh_softc *sc)
452 {
453 struct ifnet *ifp = &sc->sc_if;
454 bus_space_tag_t iot = sc->sc_iot;
455 bus_space_handle_t ioh = sc->sc_ioh;
456 struct rr_ring_ctl *ring;
457 u_int32_t misc_host_ctl;
458 u_int32_t misc_local_ctl;
459 u_int32_t value;
460 u_int32_t mode;
461
462 /* If we're already doing an init, don't try again simultaniously */
463
464 if ((sc->sc_flags & ESH_FL_INITIALIZING) != 0)
465 return;
466 sc->sc_flags = ESH_FL_INITIALIZING;
467
468 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma, 0, sc->sc_dma_size,
469 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
470
471 /* Halt the processor (preserve NO_SWAP, if set) */
472
473 misc_host_ctl = bus_space_read_4(iot, ioh, RR_MISC_HOST_CTL);
474 bus_space_write_4(iot, ioh, RR_MISC_HOST_CTL,
475 (misc_host_ctl & RR_MH_NO_SWAP)
476 | RR_MH_HALT_PROC | RR_MH_CLEAR_INT);
477
478 /* Make the EEPROM readable */
479
480 misc_local_ctl = bus_space_read_4(iot, ioh, RR_MISC_LOCAL_CTL);
481 bus_space_write_4(iot, ioh, RR_MISC_LOCAL_CTL,
482 misc_local_ctl & ~(RR_LC_FAST_PROM |
483 RR_LC_ADD_SRAM |
484 RR_LC_PARITY_ON));
485
486 /* Reset DMA */
487
488 bus_space_write_4(iot, ioh, RR_RX_STATE, RR_RS_RESET);
489 bus_space_write_4(iot, ioh, RR_TX_STATE, 0);
490 bus_space_write_4(iot, ioh, RR_DMA_READ_STATE, RR_DR_RESET);
491 bus_space_write_4(iot, ioh, RR_DMA_WRITE_STATE, RR_DW_RESET);
492 bus_space_write_4(iot, ioh, RR_PCI_STATE, 0);
493 bus_space_write_4(iot, ioh, RR_TIMER, 0);
494 bus_space_write_4(iot, ioh, RR_TIMER_REF, 0);
495
496 /*
497 * Reset the assist register that the documentation suggests
498 * resetting. Too bad that the docs don't mention anything
499 * else about the register!
500 */
501
502 bus_space_write_4(iot, ioh, 0x15C, 1);
503
504 /* Clear BIST, set the PC to the start of the code and let 'er rip */
505
506 value = bus_space_read_4(iot, ioh, RR_PCI_BIST);
507 bus_space_write_4(iot, ioh, RR_PCI_BIST, (value & ~0xff) | 8);
508
509 sc->sc_bist_write(sc, 0);
510 esh_reset_runcode(sc);
511
512 bus_space_write_4(iot, ioh, RR_PROC_PC, sc->sc_runcode_start);
513 bus_space_write_4(iot, ioh, RR_PROC_BREAKPT, 0x00000001);
514
515 misc_host_ctl &= ~RR_MH_HALT_PROC;
516 bus_space_write_4(iot, ioh, RR_MISC_HOST_CTL, misc_host_ctl);
517
518 /* XXX: should we sleep rather than delaying for 1ms!? */
519
520 delay(1000); /* Need 500 us, but we'll give it more */
521
522 value = sc->sc_bist_read(sc);
523 if (value != 0) {
524 aprint_error_dev(&sc->sc_dev, "BIST is %d, not 0!\n",
525 value);
526 goto bad_init;
527 }
528
529 #ifdef ESH_PRINTF
530 printf("%s: BIST is %x\n", device_xname(&sc->sc_dev), value);
531 eshstatus(sc);
532 #endif
533
534 /* RunCode is up. Initialize NIC */
535
536 esh_write_addr(iot, ioh, RR_GEN_INFO_PTR, sc->sc_gen_info_dma);
537 esh_write_addr(iot, ioh, RR_RECV_RING_PTR, sc->sc_recv_ring_table_dma);
538
539 sc->sc_event_consumer = 0;
540 bus_space_write_4(iot, ioh, RR_EVENT_CONSUMER, sc->sc_event_consumer);
541 sc->sc_event_producer = bus_space_read_4(iot, ioh, RR_EVENT_PRODUCER);
542 sc->sc_cmd_producer = RR_INIT_CMD;
543 sc->sc_cmd_consumer = 0;
544
545 mode = bus_space_read_4(iot, ioh, RR_MODE_AND_STATUS);
546 mode |= (RR_MS_WARNINGS |
547 RR_MS_ERR_TERM |
548 RR_MS_NO_RESTART |
549 RR_MS_SWAP_DATA);
550 mode &= ~RR_MS_PH_MODE;
551 bus_space_write_4(iot, ioh, RR_MODE_AND_STATUS, mode);
552
553 #if 0
554 #ifdef ESH_PRINTF
555 printf("eshinit: misc_local_ctl %x, SRAM size %d\n", misc_local_ctl,
556 sc->sc_sram_size);
557 #endif
558 /*
559 misc_local_ctl |= (RR_LC_FAST_PROM | RR_LC_PARITY_ON);
560 */
561 if (sc->sc_sram_size > 256 * 1024) {
562 misc_local_ctl |= RR_LC_ADD_SRAM;
563 }
564 #endif
565
566 #ifdef ESH_PRINTF
567 printf("eshinit: misc_local_ctl %x\n", misc_local_ctl);
568 #endif
569 bus_space_write_4(iot, ioh, RR_MISC_LOCAL_CTL, misc_local_ctl);
570
571 /* Set tuning parameters */
572
573 bus_space_write_4(iot, ioh, RR_CONN_RETRY_COUNT,
574 sc->sc_tune.rt_conn_retry_count);
575 bus_space_write_4(iot, ioh, RR_CONN_RETRY_TIMER,
576 sc->sc_tune.rt_conn_retry_timer);
577 bus_space_write_4(iot, ioh, RR_CONN_TIMEOUT,
578 sc->sc_tune.rt_conn_timeout);
579 bus_space_write_4(iot, ioh, RR_INTERRUPT_TIMER,
580 sc->sc_tune.rt_interrupt_timer);
581 bus_space_write_4(iot, ioh, RR_TX_TIMEOUT,
582 sc->sc_tune.rt_tx_timeout);
583 bus_space_write_4(iot, ioh, RR_RX_TIMEOUT,
584 sc->sc_tune.rt_rx_timeout);
585 bus_space_write_4(iot, ioh, RR_STATS_TIMER,
586 sc->sc_tune.rt_stats_timer);
587 bus_space_write_4(iot, ioh, RR_PCI_STATE,
588 sc->sc_tune.rt_pci_state);
589 bus_space_write_4(iot, ioh, RR_DMA_WRITE_STATE,
590 sc->sc_tune.rt_dma_write_state);
591 bus_space_write_4(iot, ioh, RR_DMA_READ_STATE,
592 sc->sc_tune.rt_dma_read_state);
593
594 sc->sc_max_rings = bus_space_read_4(iot, ioh, RR_MAX_RECV_RINGS);
595
596 sc->sc_runcode_version =
597 bus_space_read_4(iot, ioh, RR_RUNCODE_VERSION);
598 sc->sc_version = sc->sc_runcode_version >> 16;
599 if (sc->sc_version != 1 && sc->sc_version != 2) {
600 aprint_error_dev(&sc->sc_dev, "bad version number %d in runcode\n",
601 sc->sc_version);
602 goto bad_init;
603 }
604
605 if (sc->sc_version == 1) {
606 sc->sc_options = 0;
607 } else {
608 value = bus_space_read_4(iot, ioh, RR_ULA);
609 sc->sc_options = value >> 16;
610 }
611
612 if (sc->sc_options & (RR_OP_LONG_TX | RR_OP_LONG_RX)) {
613 aprint_error_dev(&sc->sc_dev, "unsupported firmware -- long descriptors\n");
614 goto bad_init;
615 }
616
617 printf("%s: startup runcode version %d.%d.%d, options %x\n",
618 device_xname(&sc->sc_dev),
619 sc->sc_version,
620 (sc->sc_runcode_version >> 8) & 0xff,
621 sc->sc_runcode_version & 0xff,
622 sc->sc_options);
623
624 /* Initialize the general ring information */
625
626 memset(sc->sc_recv_ring_table, 0,
627 sizeof(struct rr_ring_ctl) * RR_ULP_COUNT);
628
629 ring = &sc->sc_gen_info->ri_event_ring_ctl;
630 ring->rr_ring_addr = sc->sc_event_ring_dma;
631 ring->rr_entry_size = sizeof(struct rr_event);
632 ring->rr_free_bufs = RR_EVENT_RING_SIZE / 4;
633 ring->rr_entries = RR_EVENT_RING_SIZE;
634 ring->rr_prod_index = 0;
635
636 ring = &sc->sc_gen_info->ri_cmd_ring_ctl;
637 ring->rr_free_bufs = 8;
638 ring->rr_entry_size = sizeof(union rr_cmd);
639 ring->rr_prod_index = RR_INIT_CMD;
640
641 ring = &sc->sc_gen_info->ri_send_ring_ctl;
642 ring->rr_ring_addr = sc->sc_send_ring_dma;
643 if (sc->sc_version == 1) {
644 ring->rr_free_bufs = RR_RR_DONT_COMPLAIN;
645 } else {
646 ring->rr_free_bufs = 0;
647 }
648
649 ring->rr_entries = RR_SEND_RING_SIZE;
650 ring->rr_entry_size = sizeof(struct rr_descr);
651
652 ring->rr_prod_index = sc->sc_send.ec_producer =
653 sc->sc_send.ec_consumer = 0;
654 sc->sc_send.ec_cur_mbuf = NULL;
655 sc->sc_send.ec_cur_buf = NULL;
656
657 sc->sc_snap_recv.ec_descr = sc->sc_snap_recv_ring;
658 sc->sc_snap_recv.ec_consumer = sc->sc_snap_recv.ec_producer = 0;
659
660 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma, 0, sc->sc_dma_size,
661 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
662
663 /* Set up the watchdog to make sure something happens! */
664
665 sc->sc_watchdog = 0;
666 ifp->if_timer = 5;
667
668 /*
669 * Can't actually turn on interface until we see some events,
670 * so set initialized flag, but don't start sending.
671 */
672
673 sc->sc_flags = ESH_FL_INITIALIZED;
674 esh_send_cmd(sc, RR_CC_START_RUNCODE, 0, 0);
675 return;
676
677 bad_init:
678 sc->sc_flags = 0;
679 wakeup((void *) sc);
680 return;
681 }
682
683
684 /*
685 * Code to handle the Framing Protocol (FP) interface to the esh.
686 * This will allow us to write directly to the wire, with no
687 * intervening memcpy's to slow us down.
688 */
689
690 int
691 esh_fpopen(dev_t dev, int oflags, int devtype,
692 struct lwp *l)
693 {
694 struct esh_softc *sc;
695 struct rr_ring_ctl *ring_ctl;
696 struct esh_fp_ring_ctl *recv;
697 int ulp = ESHULP(dev);
698 int error = 0;
699 bus_size_t size;
700 int rseg;
701 int s;
702
703 sc = device_lookup_private(&esh_cd, ESHUNIT(dev));
704 if (sc == NULL || ulp == HIPPI_ULP_802)
705 return (ENXIO);
706
707 #ifdef ESH_PRINTF
708 printf("esh_fpopen: opening board %d, ulp %d\n",
709 device_unit(&sc->sc_dev), ulp);
710 #endif
711
712 /* If the card is not up, initialize it. */
713
714 s = splnet();
715
716 if (sc->sc_fp_rings >= sc->sc_max_rings - 1) {
717 splx(s);
718 return (ENOSPC);
719 }
720
721 if ((sc->sc_flags & ESH_FL_INITIALIZED) == 0) {
722 eshinit(sc);
723 if ((sc->sc_flags & ESH_FL_INITIALIZED) == 0)
724 return EIO;
725 }
726
727 if ((sc->sc_flags & ESH_FL_RUNCODE_UP) == 0) {
728 /*
729 * Wait for the runcode to indicate that it is up,
730 * while watching to make sure we haven't crashed.
731 */
732
733 error = 0;
734 while (error == 0 &&
735 (sc->sc_flags & ESH_FL_INITIALIZED) != 0 &&
736 (sc->sc_flags & ESH_FL_RUNCODE_UP) == 0) {
737 error = tsleep((void *) sc, PCATCH | PRIBIO,
738 "eshinit", 0);
739 #ifdef ESH_PRINTF
740 printf("esh_fpopen: tslept\n");
741 #endif
742 }
743
744 if (error != 0) {
745 splx(s);
746 return error;
747 }
748
749 if ((sc->sc_flags & ESH_FL_RUNCODE_UP) == 0) {
750 splx(s);
751 return EIO;
752 }
753 }
754
755
756 #ifdef ESH_PRINTF
757 printf("esh_fpopen: card up\n");
758 #endif
759
760 /* Look at the ring descriptor to see if the ULP is in use */
761
762 ring_ctl = &sc->sc_recv_ring_table[ulp];
763 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma,
764 (char *) ring_ctl - (char *) sc->sc_dma_addr,
765 sizeof(*ring_ctl),
766 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
767 if (ring_ctl->rr_entry_size != 0) {
768 splx(s);
769 return (EBUSY);
770 }
771
772 #ifdef ESH_PRINTF
773 printf("esh_fpopen: ring %d okay\n", ulp);
774 #endif
775
776 /*
777 * Allocate the DMA space for the ring; space for the
778 * ring control blocks has already been staticly allocated.
779 */
780
781 recv = (struct esh_fp_ring_ctl *)
782 malloc(sizeof(*recv), M_DEVBUF, M_WAITOK|M_ZERO);
783 if (recv == NULL)
784 return(ENOMEM);
785 TAILQ_INIT(&recv->ec_queue);
786
787 size = RR_FP_RECV_RING_SIZE * sizeof(struct rr_descr);
788 error = bus_dmamem_alloc(sc->sc_dmat, size, 0, RR_DMA_BOUNDARY,
789 &recv->ec_dmaseg, 1,
790 &rseg, BUS_DMA_WAITOK);
791
792 if (error) {
793 aprint_error_dev(&sc->sc_dev, "couldn't allocate space for FP receive ring"
794 "data structures\n");
795 goto bad_fp_dmamem_alloc;
796 }
797
798 if (rseg > 1) {
799 aprint_error_dev(&sc->sc_dev, "contiguous memory not available for "
800 "FP receive ring\n");
801 goto bad_fp_dmamem_map;
802 }
803
804 error = bus_dmamem_map(sc->sc_dmat, &recv->ec_dmaseg, rseg,
805 size, (void **) &recv->ec_descr,
806 BUS_DMA_WAITOK | BUS_DMA_COHERENT);
807 if (error) {
808 aprint_error_dev(&sc->sc_dev, "couldn't map memory for FP receive ring\n");
809 goto bad_fp_dmamem_map;
810 }
811
812 if (bus_dmamap_create(sc->sc_dmat, size, 1, size, RR_DMA_BOUNDARY,
813 BUS_DMA_ALLOCNOW | BUS_DMA_WAITOK,
814 &recv->ec_dma)) {
815 aprint_error_dev(&sc->sc_dev, "couldn't create DMA map for FP receive ring\n");
816 goto bad_fp_dmamap_create;
817 }
818
819 if (bus_dmamap_load(sc->sc_dmat, recv->ec_dma, recv->ec_descr,
820 size, NULL, BUS_DMA_WAITOK)) {
821 aprint_error_dev(&sc->sc_dev, "couldn't load DMA map for FP receive ring\n");
822 goto bad_fp_dmamap_load;
823 }
824
825 memset(recv->ec_descr, 0, size);
826
827 /*
828 * Create the ring:
829 *
830 * XXX: HTF are we gonna deal with the fact that we don't know
831 * if the open succeeded until we get a response from
832 * the event handler? I guess we could go to sleep waiting
833 * for the interrupt, and get woken up by the eshintr
834 * case handling it.
835 */
836
837 ring_ctl->rr_ring_addr = recv->ec_dma->dm_segs->ds_addr;
838 ring_ctl->rr_free_bufs = RR_FP_RECV_RING_SIZE / 4;
839 ring_ctl->rr_entries = RR_FP_RECV_RING_SIZE;
840 ring_ctl->rr_entry_size = sizeof(struct rr_descr);
841 ring_ctl->rr_prod_index = recv->ec_producer = recv->ec_consumer = 0;
842 ring_ctl->rr_mode = RR_RR_CHARACTER;
843 recv->ec_ulp = ulp;
844 recv->ec_index = -1;
845
846 sc->sc_fp_recv[ulp] = recv;
847
848 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma,
849 (char *) ring_ctl - (char *) sc->sc_dma_addr,
850 sizeof(*ring_ctl),
851 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
852
853 bus_dmamap_sync(sc->sc_dmat, recv->ec_dma, 0, size,
854 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
855
856 esh_send_cmd(sc, RR_CC_ENABLE_RING, ulp, recv->ec_producer);
857
858 #ifdef ESH_PRINTF
859 printf("esh_fpopen: sent create ring cmd\n");
860 #endif
861
862 while (recv->ec_index == -1) {
863 error = tsleep((void *) &recv->ec_ulp, PCATCH | PRIBIO,
864 "eshfpopen", 0);
865 if (error != 0 || recv->ec_index == -1) {
866 splx(s);
867 goto bad_fp_ring_create;
868 }
869 }
870 #ifdef ESH_PRINTF
871 printf("esh_fpopen: created ring\n");
872 #endif
873
874 /*
875 * Ring is created. Set up various pointers to the ring
876 * information, fill the ring, and get going...
877 */
878
879 sc->sc_fp_rings++;
880 splx(s);
881 return 0;
882
883 bad_fp_ring_create:
884 #ifdef ESH_PRINTF
885 printf("esh_fpopen: bad ring create\n");
886 #endif
887 sc->sc_fp_recv[ulp] = NULL;
888 memset(ring_ctl, 0, sizeof(*ring_ctl));
889 bus_dmamap_unload(sc->sc_dmat, recv->ec_dma);
890 bad_fp_dmamap_load:
891 bus_dmamap_destroy(sc->sc_dmat, recv->ec_dma);
892 bad_fp_dmamap_create:
893 bus_dmamem_unmap(sc->sc_dmat, (void *) recv->ec_descr, size);
894 bad_fp_dmamem_map:
895 bus_dmamem_free(sc->sc_dmat, &recv->ec_dmaseg, rseg);
896 bad_fp_dmamem_alloc:
897 free(recv, M_DEVBUF);
898 if (error == 0)
899 error = ENOMEM;
900 splx(s);
901 return (error);
902 }
903
904
905 int
906 esh_fpclose(dev_t dev, int fflag, int devtype,
907 struct lwp *l)
908 {
909 struct esh_softc *sc;
910 struct rr_ring_ctl *ring_ctl;
911 struct esh_fp_ring_ctl *ring;
912 int ulp = ESHULP(dev);
913 int index;
914 int error = 0;
915 int s;
916
917 sc = device_lookup_private(&esh_cd, ESHUNIT(dev));
918 if (sc == NULL || ulp == HIPPI_ULP_802)
919 return (ENXIO);
920
921 s = splnet();
922
923 ring = sc->sc_fp_recv[ulp];
924 ring_ctl = &sc->sc_recv_ring_table[ulp];
925 index = ring->ec_index;
926
927 #ifdef ESH_PRINTF
928 printf("esh_fpclose: closing unit %d, ulp %d\n",
929 device_unit(&sc->sc_dev), ulp);
930 #endif
931 assert(ring);
932 assert(ring_ctl);
933
934 /*
935 * Disable the ring, wait for notification, and get rid of DMA
936 * stuff and dynamically allocated memory. Loop, waiting to
937 * learn that the ring has been disabled, or the card
938 * has been shut down.
939 */
940
941 do {
942 esh_send_cmd(sc, RR_CC_DISABLE_RING, ulp, ring->ec_producer);
943
944 error = tsleep((void *) &ring->ec_index, PCATCH | PRIBIO,
945 "esh_fpclose", 0);
946 if (error != 0 && error != EAGAIN) {
947 aprint_error_dev(&sc->sc_dev, "esh_fpclose: wait on ring disable bad\n");
948 ring->ec_index = -1;
949 break;
950 }
951 } while (ring->ec_index != -1 && sc->sc_flags != 0);
952
953 /*
954 * XXX: Gotta unload the ring, removing old descriptors!
955 * *Can* there be outstanding reads with a close issued!?
956 */
957
958 bus_dmamap_unload(sc->sc_dmat, ring->ec_dma);
959 bus_dmamap_destroy(sc->sc_dmat, ring->ec_dma);
960 bus_dmamem_unmap(sc->sc_dmat, (void *) ring->ec_descr,
961 RR_FP_RECV_RING_SIZE * sizeof(struct rr_descr));
962 bus_dmamem_free(sc->sc_dmat, &ring->ec_dmaseg, ring->ec_dma->dm_nsegs);
963 free(ring, M_DEVBUF);
964 memset(ring_ctl, 0, sizeof(*ring_ctl));
965 sc->sc_fp_recv[ulp] = NULL;
966 sc->sc_fp_recv_index[index] = NULL;
967
968 sc->sc_fp_rings--;
969 if (sc->sc_fp_rings == 0)
970 sc->sc_flags &= ~ESH_FL_FP_RING_UP;
971
972 splx(s);
973 return 0;
974 }
975
976 int
977 esh_fpread(dev_t dev, struct uio *uio, int ioflag)
978 {
979 struct lwp *l = curlwp;
980 struct proc *p = l->l_proc;
981 struct iovec *iovp;
982 struct esh_softc *sc;
983 struct esh_fp_ring_ctl *ring;
984 struct esh_dmainfo *di;
985 int ulp = ESHULP(dev);
986 int error;
987 int i;
988 int s;
989
990 #ifdef ESH_PRINTF
991 printf("esh_fpread: dev %x\n", dev);
992 #endif
993
994 sc = device_lookup_private(&esh_cd, ESHUNIT(dev));
995 if (sc == NULL || ulp == HIPPI_ULP_802)
996 return (ENXIO);
997
998 s = splnet();
999
1000 ring = sc->sc_fp_recv[ulp];
1001
1002 if ((sc->sc_flags & ESH_FL_INITIALIZED) == 0) {
1003 error = ENXIO;
1004 goto fpread_done;
1005 }
1006
1007 /* Check for validity */
1008 for (i = 0; i < uio->uio_iovcnt; i++) {
1009 /* Check for valid offsets and sizes */
1010 if (((u_long) uio->uio_iov[i].iov_base & 3) != 0 ||
1011 (i < uio->uio_iovcnt - 1 &&
1012 (uio->uio_iov[i].iov_len & 3) != 0)) {
1013 error = EFAULT;
1014 goto fpread_done;
1015 }
1016 }
1017
1018 /* Lock down the pages */
1019 for (i = 0; i < uio->uio_iovcnt; i++) {
1020 iovp = &uio->uio_iov[i];
1021 error = uvm_vslock(p->p_vmspace, iovp->iov_base, iovp->iov_len,
1022 VM_PROT_WRITE);
1023 if (error) {
1024 /* Unlock what we've locked so far. */
1025 for (--i; i >= 0; i--) {
1026 iovp = &uio->uio_iov[i];
1027 uvm_vsunlock(p->p_vmspace, iovp->iov_base,
1028 iovp->iov_len);
1029 }
1030 goto fpread_done;
1031 }
1032 }
1033
1034 /*
1035 * Perform preliminary DMA mapping and throw the buffers
1036 * onto the queue to be sent.
1037 */
1038
1039 di = esh_new_dmainfo(sc);
1040 if (di == NULL) {
1041 error = ENOMEM;
1042 goto fpread_done;
1043 }
1044 di->ed_buf = NULL;
1045 di->ed_error = 0;
1046 di->ed_read_len = 0;
1047
1048 #ifdef ESH_PRINTF
1049 printf("esh_fpread: ulp %d, uio offset %qd, resid %d, iovcnt %d\n",
1050 ulp, uio->uio_offset, uio->uio_resid, uio->uio_iovcnt);
1051 #endif
1052
1053 error = bus_dmamap_load_uio(sc->sc_dmat, di->ed_dma,
1054 uio, BUS_DMA_READ|BUS_DMA_WAITOK);
1055 if (error) {
1056 aprint_error_dev(&sc->sc_dev, "esh_fpread: bus_dmamap_load_uio "
1057 "failed\terror code %d\n",
1058 error);
1059 error = ENOBUFS;
1060 esh_free_dmainfo(sc, di);
1061 goto fpread_done;
1062 }
1063
1064 bus_dmamap_sync(sc->sc_dmat, di->ed_dma,
1065 0, di->ed_dma->dm_mapsize,
1066 BUS_DMASYNC_PREREAD);
1067
1068 #ifdef ESH_PRINTF
1069 printf("esh_fpread: ulp %d, di %p, nsegs %d, uio len %d\n",
1070 ulp, di, di->ed_dma->dm_nsegs, uio->uio_resid);
1071 #endif
1072
1073 di->ed_flags |= ESH_DI_BUSY;
1074
1075 TAILQ_INSERT_TAIL(&ring->ec_queue, di, ed_list);
1076 esh_fill_fp_ring(sc, ring);
1077
1078 while ((di->ed_flags & ESH_DI_BUSY) != 0 && error == 0) {
1079 error = tsleep((void *) di, PCATCH | PRIBIO, "esh_fpread", 0);
1080 #ifdef ESH_PRINTF
1081 printf("esh_fpread: ulp %d, tslept %d\n", ulp, error);
1082 #endif
1083 if (error) {
1084 /*
1085 * Remove the buffer entries from the ring; this
1086 * is gonna require a DISCARD_PKT command, and
1087 * will certainly disrupt things. This is why we
1088 * can have only one outstanding read on a ring
1089 * at a time. :-(
1090 */
1091
1092 printf("esh_fpread: was that a ^C!? error %d, ulp %d\n",
1093 error, ulp);
1094 if (error == EINTR || error == ERESTART)
1095 error = 0;
1096 if ((di->ed_flags & ESH_DI_BUSY) != 0) {
1097 esh_flush_fp_ring(sc, ring, di);
1098 error = EINTR;
1099 break;
1100 }
1101 }
1102 }
1103
1104 if (error == 0 && di->ed_error != 0)
1105 error = EIO;
1106
1107 /*
1108 * How do we let the caller know how much has been read?
1109 * Adjust the uio_resid stuff!?
1110 */
1111
1112 assert(uio->uio_resid >= di->ed_read_len);
1113
1114 uio->uio_resid -= di->ed_read_len;
1115 for (i = 0; i < uio->uio_iovcnt; i++) {
1116 iovp = &uio->uio_iov[i];
1117 uvm_vsunlock(p->p_vmspace, iovp->iov_base, iovp->iov_len);
1118 }
1119 esh_free_dmainfo(sc, di);
1120
1121 fpread_done:
1122 #ifdef ESH_PRINTF
1123 printf("esh_fpread: ulp %d, error %d\n", ulp, error);
1124 #endif
1125 splx(s);
1126 return error;
1127 }
1128
1129
1130 int
1131 esh_fpwrite(dev_t dev, struct uio *uio, int ioflag)
1132 {
1133 struct lwp *l = curlwp;
1134 struct proc *p = l->l_proc;
1135 struct iovec *iovp;
1136 struct esh_softc *sc;
1137 struct esh_send_ring_ctl *ring;
1138 struct esh_dmainfo *di;
1139 int ulp = ESHULP(dev);
1140 int error;
1141 int len;
1142 int i;
1143 int s;
1144
1145 #ifdef ESH_PRINTF
1146 printf("esh_fpwrite: dev %x\n", dev);
1147 #endif
1148
1149 sc = device_lookup_private(&esh_cd, ESHUNIT(dev));
1150 if (sc == NULL || ulp == HIPPI_ULP_802)
1151 return (ENXIO);
1152
1153 s = splnet();
1154
1155 ring = &sc->sc_send;
1156
1157 if ((sc->sc_flags & ESH_FL_INITIALIZED) == 0) {
1158 error = ENXIO;
1159 goto fpwrite_done;
1160 }
1161
1162 /* Check for validity */
1163 for (i = 0; i < uio->uio_iovcnt; i++) {
1164 if (((u_long) uio->uio_iov[i].iov_base & 3) != 0 ||
1165 (i < uio->uio_iovcnt - 1 &&
1166 (uio->uio_iov[i].iov_len & 3) != 0)) {
1167 error = EFAULT;
1168 goto fpwrite_done;
1169 }
1170 }
1171
1172 /* Lock down the pages */
1173 for (i = 0; i < uio->uio_iovcnt; i++) {
1174 iovp = &uio->uio_iov[i];
1175 error = uvm_vslock(p->p_vmspace, iovp->iov_base, iovp->iov_len,
1176 VM_PROT_READ);
1177 if (error) {
1178 /* Unlock what we've locked so far. */
1179 for (--i; i >= 0; i--) {
1180 iovp = &uio->uio_iov[i];
1181 uvm_vsunlock(p->p_vmspace, iovp->iov_base,
1182 iovp->iov_len);
1183 }
1184 goto fpwrite_done;
1185 }
1186 }
1187
1188 /*
1189 * Perform preliminary DMA mapping and throw the buffers
1190 * onto the queue to be sent.
1191 */
1192
1193 di = esh_new_dmainfo(sc);
1194 if (di == NULL) {
1195 error = ENOMEM;
1196 goto fpwrite_done;
1197 }
1198 di->ed_buf = NULL;
1199 di->ed_error = 0;
1200
1201 #ifdef ESH_PRINTF
1202 printf("esh_fpwrite: uio offset %qd, resid %d, iovcnt %d\n",
1203 uio->uio_offset, uio->uio_resid, uio->uio_iovcnt);
1204 #endif
1205
1206 error = bus_dmamap_load_uio(sc->sc_dmat, di->ed_dma,
1207 uio, BUS_DMA_WRITE|BUS_DMA_WAITOK);
1208 if (error) {
1209 aprint_error_dev(&sc->sc_dev, "esh_fpwrite: bus_dmamap_load_uio "
1210 "failed\terror code %d\n",
1211 error);
1212 error = ENOBUFS;
1213 esh_free_dmainfo(sc, di);
1214 goto fpwrite_done;
1215 }
1216
1217 bus_dmamap_sync(sc->sc_dmat, di->ed_dma,
1218 0, di->ed_dma->dm_mapsize,
1219 BUS_DMASYNC_PREWRITE);
1220
1221 #ifdef ESH_PRINTF
1222 printf("esh_fpwrite: di %p, nsegs %d, uio len %d\n",
1223 di, di->ed_dma->dm_nsegs, uio->uio_resid);
1224 #endif
1225
1226 len = di->ed_dma->dm_mapsize;
1227 di->ed_flags |= ESH_DI_BUSY;
1228
1229 TAILQ_INSERT_TAIL(&ring->ec_di_queue, di, ed_list);
1230 eshstart(&sc->sc_if);
1231
1232 while ((di->ed_flags & ESH_DI_BUSY) != 0 && error == 0) {
1233 error = tsleep((void *) di, PRIBIO, "esh_fpwrite", 0);
1234 #ifdef ESH_PRINTF
1235 printf("esh_fpwrite: tslept %d\n", error);
1236 #endif
1237 if (error) {
1238 printf("esh_fpwrite: was that a ^C!? Shouldn't be! Error %d\n",
1239 error);
1240 if (error == EINTR || error == ERESTART)
1241 error = 0;
1242 if ((di->ed_flags & ESH_DI_BUSY) != 0) {
1243 panic("interrupted eshwrite!");
1244 #if 0
1245 /* Better do *something* here! */
1246 esh_flush_send_ring(sc, di);
1247 #endif
1248 error = EINTR;
1249 break;
1250 }
1251 }
1252 }
1253
1254 if (error == 0 && di->ed_error != 0)
1255 error = EIO;
1256
1257 /*
1258 * How do we let the caller know how much has been written?
1259 * Adjust the uio_resid stuff!?
1260 */
1261
1262 uio->uio_resid -= len;
1263 uio->uio_offset += len;
1264
1265 for (i = 0; i < uio->uio_iovcnt; i++) {
1266 iovp = &uio->uio_iov[i];
1267 uvm_vsunlock(p->p_vmspace, iovp->iov_base, iovp->iov_len);
1268 }
1269
1270 esh_free_dmainfo(sc, di);
1271
1272 fpwrite_done:
1273 #ifdef ESH_PRINTF
1274 printf("esh_fpwrite: error %d\n", error);
1275 #endif
1276 splx(s);
1277 return error;
1278 }
1279
1280 void
1281 esh_fpstrategy(struct buf *bp)
1282 {
1283 struct esh_softc *sc;
1284 int ulp = ESHULP(bp->b_dev);
1285 int error = 0;
1286 int s;
1287
1288 #ifdef ESH_PRINTF
1289 printf("esh_fpstrategy: starting, bcount %ld, flags %lx, dev %x\n"
1290 "\tunit %x, ulp %d\n",
1291 bp->b_bcount, bp->b_flags, bp->b_dev, unit, ulp);
1292 #endif
1293
1294 sc = device_lookup_private(&esh_cd, ESHUNIT(bp->b_dev));
1295
1296 s = splnet();
1297 if (sc == NULL || ulp == HIPPI_ULP_802) {
1298 bp->b_error = ENXIO;
1299 goto done;
1300 }
1301
1302 if (bp->b_bcount == 0)
1303 goto done;
1304
1305 #define UP_FLAGS (ESH_FL_INITIALIZED | ESH_FL_RUNCODE_UP)
1306
1307 if ((sc->sc_flags & UP_FLAGS) != UP_FLAGS) {
1308 bp->b_error = EBUSY;
1309 goto done;
1310 }
1311 #undef UP_FLAGS
1312
1313 if (bp->b_flags & B_READ) {
1314 /*
1315 * Perform preliminary DMA mapping and throw the buffers
1316 * onto the queue to be sent.
1317 */
1318
1319 struct esh_fp_ring_ctl *ring = sc->sc_fp_recv[ulp];
1320 struct esh_dmainfo *di = esh_new_dmainfo(sc);
1321
1322 if (di == NULL) {
1323 bp->b_error = ENOMEM;
1324 goto done;
1325 }
1326 di->ed_buf = bp;
1327 error = bus_dmamap_load(sc->sc_dmat, di->ed_dma,
1328 bp->b_data, bp->b_bcount,
1329 bp->b_proc,
1330 BUS_DMA_READ|BUS_DMA_WAITOK);
1331 if (error) {
1332 aprint_error_dev(&sc->sc_dev, "esh_fpstrategy: "
1333 "bus_dmamap_load "
1334 "failed\terror code %d\n",
1335 error);
1336 bp->b_error = ENOBUFS;
1337 esh_free_dmainfo(sc, di);
1338 goto done;
1339 }
1340
1341 bus_dmamap_sync(sc->sc_dmat, di->ed_dma,
1342 0, di->ed_dma->dm_mapsize,
1343 BUS_DMASYNC_PREREAD);
1344
1345 #ifdef ESH_PRINTF
1346 printf("fpstrategy: di %p\n", di);
1347 #endif
1348
1349 TAILQ_INSERT_TAIL(&ring->ec_queue, di, ed_list);
1350 esh_fill_fp_ring(sc, ring);
1351 } else {
1352 /*
1353 * Queue up the buffer for future sending. If the card
1354 * isn't already transmitting, give it a kick.
1355 */
1356
1357 struct esh_send_ring_ctl *ring = &sc->sc_send;
1358 bufq_put(ring->ec_buf_queue, bp);
1359 #ifdef ESH_PRINTF
1360 printf("esh_fpstrategy: ready to call eshstart to write!\n");
1361 #endif
1362 eshstart(&sc->sc_if);
1363 }
1364 splx(s);
1365 return;
1366
1367 done:
1368 splx(s);
1369 #ifdef ESH_PRINTF
1370 printf("esh_fpstrategy: failing, bp->b_error %d!\n",
1371 bp->b_error);
1372 #endif
1373 biodone(bp);
1374 }
1375
1376 /*
1377 * Handle interrupts. This is basicly event handling code; version two
1378 * firmware tries to speed things up by just telling us the location
1379 * of the producer and consumer indices, rather than sending us an event.
1380 */
1381
1382 int
1383 eshintr(void *arg)
1384 {
1385 struct esh_softc *sc = arg;
1386 bus_space_tag_t iot = sc->sc_iot;
1387 bus_space_handle_t ioh = sc->sc_ioh;
1388 struct ifnet *ifp = &sc->sc_if;
1389 u_int32_t rc_offsets;
1390 u_int32_t misc_host_ctl;
1391 int rc_send_consumer = 0; /* shut up compiler */
1392 int rc_snap_ring_consumer = 0; /* ditto */
1393 u_int8_t fp_ring_consumer[RR_MAX_RECV_RING];
1394 int start_consumer;
1395 int ret = 0;
1396
1397 int okay = 0;
1398 int blah = 0;
1399 char sbuf[100];
1400 char t[100];
1401
1402
1403 /* Check to see if this is our interrupt. */
1404
1405 misc_host_ctl = bus_space_read_4(iot, ioh, RR_MISC_HOST_CTL);
1406 if ((misc_host_ctl & RR_MH_INTERRUPT) == 0)
1407 return 0;
1408
1409 /* If we can't do anything with the interrupt, just drop it */
1410
1411 if (sc->sc_flags == 0)
1412 return 1;
1413
1414 rc_offsets = bus_space_read_4(iot, ioh, RR_EVENT_PRODUCER);
1415 sc->sc_event_producer = rc_offsets & 0xff;
1416 if (sc->sc_version == 2) {
1417 int i;
1418
1419 sbuf[0] = '\0';
1420 strlcat(sbuf, "rc: ", sizeof(sbuf));
1421 rc_send_consumer = (rc_offsets >> 8) & 0xff;
1422 rc_snap_ring_consumer = (rc_offsets >> 16) & 0xff;
1423 for (i = 0; i < RR_MAX_RECV_RING; i += 4) {
1424 rc_offsets =
1425 bus_space_read_4(iot, ioh,
1426 RR_RUNCODE_RECV_CONS + i);
1427 /* XXX: should do this right! */
1428 NTOHL(rc_offsets);
1429 *((u_int32_t *) &fp_ring_consumer[i]) = rc_offsets;
1430 snprintf(t, sizeof(t), "%.8x|", rc_offsets);
1431 strlcat(sbuf, t, sizeof(sbuf));
1432 }
1433 }
1434 start_consumer = sc->sc_event_consumer;
1435
1436 /* Take care of synchronizing DMA with entries we read... */
1437
1438 esh_dma_sync(sc, sc->sc_event_ring,
1439 start_consumer, sc->sc_event_producer,
1440 RR_EVENT_RING_SIZE, sizeof(struct rr_event), 0,
1441 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1442
1443 while (sc->sc_event_consumer != sc->sc_event_producer) {
1444 struct rr_event *event =
1445 &sc->sc_event_ring[sc->sc_event_consumer];
1446
1447 #ifdef ESH_PRINTF
1448 if (event->re_code != RR_EC_WATCHDOG &&
1449 event->re_code != RR_EC_STATS_UPDATE &&
1450 event->re_code != RR_EC_SET_CMD_CONSUMER) {
1451 printf("%s: event code %x, ring %d, index %d\n",
1452 device_xname(&sc->sc_dev), event->re_code,
1453 event->re_ring, event->re_index);
1454 if (okay == 0)
1455 printf("%s\n", sbuf);
1456 okay = 1;
1457 }
1458 #endif
1459 ret = 1; /* some action was taken by card */
1460
1461 switch(event->re_code) {
1462 case RR_EC_RUNCODE_UP:
1463 printf("%s: firmware up\n", device_xname(&sc->sc_dev));
1464 sc->sc_flags |= ESH_FL_RUNCODE_UP;
1465 esh_send_cmd(sc, RR_CC_WATCHDOG, 0, 0);
1466 esh_send_cmd(sc, RR_CC_UPDATE_STATS, 0, 0);
1467 #ifdef ESH_PRINTF
1468 eshstatus(sc);
1469 #endif
1470 if ((ifp->if_flags & IFF_UP) != 0)
1471 esh_init_snap_ring(sc);
1472 if (sc->sc_fp_rings > 0)
1473 esh_init_fp_rings(sc);
1474
1475 /*
1476 * XXX: crank up FP rings that might be
1477 * in use after a reset!
1478 */
1479 wakeup((void *) sc);
1480 break;
1481
1482 case RR_EC_WATCHDOG:
1483 /*
1484 * Record the watchdog event.
1485 * This is checked by eshwatchdog
1486 */
1487
1488 sc->sc_watchdog = 1;
1489 break;
1490
1491 case RR_EC_SET_CMD_CONSUMER:
1492 sc->sc_cmd_consumer = event->re_index;
1493 break;
1494
1495 case RR_EC_LINK_ON:
1496 printf("%s: link up\n", device_xname(&sc->sc_dev));
1497 sc->sc_flags |= ESH_FL_LINK_UP;
1498
1499 esh_send_cmd(sc, RR_CC_WATCHDOG, 0, 0);
1500 esh_send_cmd(sc, RR_CC_UPDATE_STATS, 0, 0);
1501 if ((sc->sc_flags & ESH_FL_SNAP_RING_UP) != 0) {
1502 /*
1503 * Interface is now `running', with no
1504 * output active.
1505 */
1506 ifp->if_flags |= IFF_RUNNING;
1507 ifp->if_flags &= ~IFF_OACTIVE;
1508
1509 /* Attempt to start output, if any. */
1510 }
1511 eshstart(ifp);
1512 break;
1513
1514 case RR_EC_LINK_OFF:
1515 sc->sc_flags &= ~ESH_FL_LINK_UP;
1516 printf("%s: link down\n", device_xname(&sc->sc_dev));
1517 break;
1518
1519 /*
1520 * These are all unexpected. We need to handle all
1521 * of them, though.
1522 */
1523
1524 case RR_EC_INVALID_CMD:
1525 case RR_EC_INTERNAL_ERROR:
1526 case RR2_EC_INTERNAL_ERROR:
1527 case RR_EC_BAD_SEND_RING:
1528 case RR_EC_BAD_SEND_BUF:
1529 case RR_EC_BAD_SEND_DESC:
1530 case RR_EC_RECV_RING_FLUSH:
1531 case RR_EC_RECV_ERROR_INFO:
1532 case RR_EC_BAD_RECV_BUF:
1533 case RR_EC_BAD_RECV_DESC:
1534 case RR_EC_BAD_RECV_RING:
1535 case RR_EC_UNIMPLEMENTED:
1536 aprint_error_dev(&sc->sc_dev, "unexpected event %x;"
1537 "shutting down interface\n",
1538 event->re_code);
1539 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1540 sc->sc_flags = ESH_FL_CRASHED;
1541 #ifdef ESH_PRINTF
1542 eshstatus(sc);
1543 #endif
1544 break;
1545
1546 #define CALLOUT(a) case a: \
1547 printf("%s: Event " #a " received -- " \
1548 "ring %d index %d timestamp %x\n", \
1549 device_xname(&sc->sc_dev), event->re_ring, event->re_index, \
1550 event->re_timestamp); \
1551 break;
1552
1553 CALLOUT(RR_EC_NO_RING_FOR_ULP);
1554 CALLOUT(RR_EC_REJECTING); /* dropping packets */
1555 #undef CALLOUT
1556
1557 /* Send events */
1558
1559 case RR_EC_PACKET_SENT: /* not used in firmware 2.x */
1560 ifp->if_opackets++;
1561 /* FALLTHROUGH */
1562
1563 case RR_EC_SET_SND_CONSUMER:
1564 assert(sc->sc_version == 1);
1565 /* FALLTHROUGH */
1566
1567 case RR_EC_SEND_RING_LOW:
1568 eshstart_cleanup(sc, event->re_index, 0);
1569 break;
1570
1571
1572 case RR_EC_CONN_REJECT:
1573 case RR_EC_CAMPON_TIMEOUT:
1574 case RR_EC_CONN_TIMEOUT:
1575 case RR_EC_DISCONN_ERR:
1576 case RR_EC_INTERNAL_PARITY:
1577 case RR_EC_TX_IDLE:
1578 case RR_EC_SEND_LINK_OFF:
1579 eshstart_cleanup(sc, event->re_index, event->re_code);
1580 break;
1581
1582 /* Receive events */
1583
1584 case RR_EC_RING_ENABLED:
1585 if (event->re_ring == HIPPI_ULP_802) {
1586 rc_snap_ring_consumer = 0; /* prevent read */
1587 sc->sc_flags |= ESH_FL_SNAP_RING_UP;
1588 esh_fill_snap_ring(sc);
1589
1590 if (sc->sc_flags & ESH_FL_LINK_UP) {
1591 /*
1592 * Interface is now `running', with no
1593 * output active.
1594 */
1595 ifp->if_flags |= IFF_RUNNING;
1596 ifp->if_flags &= ~IFF_OACTIVE;
1597
1598 /* Attempt to start output, if any. */
1599
1600 eshstart(ifp);
1601 }
1602 #ifdef ESH_PRINTF
1603 if (event->re_index != 0)
1604 printf("ENABLE snap ring -- index %d instead of 0!\n",
1605 event->re_index);
1606 #endif
1607 } else {
1608 struct esh_fp_ring_ctl *ring =
1609 sc->sc_fp_recv[event->re_ring];
1610
1611 sc->sc_flags |= ESH_FL_FP_RING_UP;
1612 #ifdef ESH_PRINTF
1613 printf("eshintr: FP ring %d up\n",
1614 event->re_ring);
1615 #endif
1616
1617 sc->sc_fp_recv_index[event->re_index] = ring;
1618 ring->ec_index = event->re_index;
1619 wakeup((void *) &ring->ec_ulp);
1620 }
1621 break;
1622
1623 case RR_EC_RING_DISABLED:
1624 #ifdef ESH_PRINTF
1625 printf("eshintr: disabling ring %d\n",
1626 event->re_ring);
1627 #endif
1628 if (event->re_ring == HIPPI_ULP_802) {
1629 struct rr_ring_ctl *ring =
1630 sc->sc_recv_ring_table + HIPPI_ULP_802;
1631 memset(ring, 0, sizeof(*ring));
1632 sc->sc_flags &= ~ESH_FL_CLOSING_SNAP;
1633 sc->sc_flags &= ~ESH_FL_SNAP_RING_UP;
1634 while (sc->sc_snap_recv.ec_consumer
1635 != sc->sc_snap_recv.ec_producer) {
1636 struct mbuf *m0;
1637 u_int16_t offset = sc->sc_snap_recv.ec_consumer;
1638
1639 bus_dmamap_unload(sc->sc_dmat,
1640 sc->sc_snap_recv.ec_dma[offset]);
1641 MFREE(sc->sc_snap_recv.ec_m[offset], m0);
1642 sc->sc_snap_recv.ec_m[offset] = NULL;
1643 sc->sc_snap_recv.ec_consumer =
1644 NEXT_RECV(sc->sc_snap_recv.ec_consumer);
1645 }
1646 sc->sc_snap_recv.ec_consumer =
1647 rc_snap_ring_consumer;
1648 sc->sc_snap_recv.ec_producer =
1649 rc_snap_ring_consumer;
1650 wakeup((void *) &sc->sc_snap_recv);
1651 } else {
1652 struct esh_fp_ring_ctl *recv =
1653 sc->sc_fp_recv[event->re_ring];
1654 assert(recv != NULL);
1655 recv->ec_consumer = recv->ec_producer =
1656 fp_ring_consumer[recv->ec_index];
1657 recv->ec_index = -1;
1658 wakeup((void *) &recv->ec_index);
1659 }
1660 break;
1661
1662 case RR_EC_RING_ENABLE_ERR:
1663 if (event->re_ring == HIPPI_ULP_802) {
1664 aprint_error_dev(&sc->sc_dev, "unable to enable SNAP ring!?\n\t"
1665 "shutting down interface\n");
1666 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1667 #ifdef ESH_PRINTF
1668 eshstatus(sc);
1669 #endif
1670 } else {
1671 /*
1672 * If we just leave the ring index as-is,
1673 * the driver will figure out that
1674 * we failed to open the ring.
1675 */
1676 wakeup((void *) &(sc->sc_fp_recv[event->re_ring]->ec_ulp));
1677 }
1678 break;
1679
1680 case RR_EC_PACKET_DISCARDED:
1681 /*
1682 * Determine the dmainfo for the current packet
1683 * we just discarded and wake up the waiting
1684 * process.
1685 *
1686 * This should never happen on the network ring!
1687 */
1688
1689 if (event->re_ring == HIPPI_ULP_802) {
1690 aprint_error_dev(&sc->sc_dev, "discard on SNAP ring!?\n\t"
1691 "shutting down interface\n");
1692 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1693 sc->sc_flags = ESH_FL_CRASHED;
1694 } else {
1695 struct esh_fp_ring_ctl *ring =
1696 sc->sc_fp_recv[event->re_ring];
1697 struct esh_dmainfo *di =
1698 ring->ec_cur_dmainfo;
1699
1700 if (di == NULL)
1701 di = ring->ec_dmainfo[ring->ec_producer];
1702 printf("eshintr: DISCARD: index %d,"
1703 "ring prod %d, di %p, ring[index] %p\n",
1704 event->re_index, ring->ec_producer, di,
1705 ring->ec_dmainfo[event->re_index]);
1706
1707 if (di == NULL)
1708 di = ring->ec_dmainfo[event->re_index];
1709
1710 if (di == NULL) {
1711 printf("eshintr: DISCARD: NULL di, skipping...\n");
1712 break;
1713 }
1714
1715 di->ed_flags &=
1716 ~(ESH_DI_READING | ESH_DI_BUSY);
1717 wakeup((void *) &di->ed_flags);
1718 }
1719 break;
1720
1721 case RR_EC_OUT_OF_BUF:
1722 case RR_EC_RECV_RING_OUT:
1723 case RR_EC_RECV_RING_LOW:
1724 break;
1725
1726 case RR_EC_SET_RECV_CONSUMER:
1727 case RR_EC_PACKET_RECVED:
1728 if (event->re_ring == HIPPI_ULP_802)
1729 esh_read_snap_ring(sc, event->re_index, 0);
1730 else if (sc->sc_fp_recv[event->re_ring] != NULL)
1731 esh_read_fp_ring(sc, event->re_index, 0,
1732 event->re_ring);
1733 break;
1734
1735 case RR_EC_RECV_IDLE:
1736 case RR_EC_PARITY_ERR:
1737 case RR_EC_LLRC_ERR:
1738 case RR_EC_PKT_LENGTH_ERR:
1739 case RR_EC_IP_HDR_CKSUM_ERR:
1740 case RR_EC_DATA_CKSUM_ERR:
1741 case RR_EC_SHORT_BURST_ERR:
1742 case RR_EC_RECV_LINK_OFF:
1743 case RR_EC_FLAG_SYNC_ERR:
1744 case RR_EC_FRAME_ERR:
1745 case RR_EC_STATE_TRANS_ERR:
1746 case RR_EC_NO_READY_PULSE:
1747 if (event->re_ring == HIPPI_ULP_802) {
1748 esh_read_snap_ring(sc, event->re_index,
1749 event->re_code);
1750 } else {
1751 struct esh_fp_ring_ctl *r;
1752
1753 r = sc->sc_fp_recv[event->re_ring];
1754 if (r)
1755 r->ec_error = event->re_code;
1756 }
1757 break;
1758
1759 /*
1760 * Statistics events can be ignored for now. They might become
1761 * necessary if we have to deliver stats on demand, rather than
1762 * just returning the statistics block of memory.
1763 */
1764
1765 case RR_EC_STATS_UPDATE:
1766 case RR_EC_STATS_RETRIEVED:
1767 case RR_EC_TRACE:
1768 break;
1769
1770 default:
1771 aprint_error_dev(&sc->sc_dev, "Bogus event code %x, "
1772 "ring %d, index %d, timestamp %x\n",
1773 event->re_code,
1774 event->re_ring, event->re_index,
1775 event->re_timestamp);
1776 break;
1777 }
1778
1779 sc->sc_event_consumer = NEXT_EVENT(sc->sc_event_consumer);
1780 }
1781
1782 /* Do the receive and send ring processing for version 2 RunCode */
1783
1784 if (sc->sc_version == 2) {
1785 int i;
1786 if (sc->sc_send.ec_consumer != rc_send_consumer) {
1787 eshstart_cleanup(sc, rc_send_consumer, 0);
1788 ret = 1;
1789 blah++;
1790 }
1791 if (sc->sc_snap_recv.ec_consumer != rc_snap_ring_consumer &&
1792 (sc->sc_flags & ESH_FL_SNAP_RING_UP) != 0) {
1793 esh_read_snap_ring(sc, rc_snap_ring_consumer, 0);
1794 ret = 1;
1795 blah++;
1796 }
1797 for (i = 0; i < RR_MAX_RECV_RING; i++) {
1798 struct esh_fp_ring_ctl *r = sc->sc_fp_recv_index[i];
1799
1800 if (r != NULL &&
1801 r->ec_consumer != fp_ring_consumer[i]) {
1802 #ifdef ESH_PRINTF
1803 printf("eshintr: performed read on ring %d, index %d\n",
1804 r->ec_ulp, i);
1805 #endif
1806 blah++;
1807 esh_read_fp_ring(sc, fp_ring_consumer[i],
1808 0, r->ec_ulp);
1809 fp_ring_consumer[i] = r->ec_consumer;
1810 }
1811 }
1812 if (blah != 0 && okay == 0) {
1813 okay = 1;
1814 #ifdef ESH_PRINTF
1815 printf("%s\n", sbuf);
1816 #endif
1817 }
1818 rc_offsets = (sc->sc_snap_recv.ec_consumer << 16) |
1819 (sc->sc_send.ec_consumer << 8) | sc->sc_event_consumer;
1820 } else {
1821 rc_offsets = sc->sc_event_consumer;
1822 }
1823
1824 esh_dma_sync(sc, sc->sc_event_ring,
1825 start_consumer, sc->sc_event_producer,
1826 RR_EVENT_RING_SIZE, sizeof(struct rr_event), 0,
1827 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1828
1829 /* Write out new values for the FP segments... */
1830
1831 if (sc->sc_version == 2) {
1832 int i;
1833 u_int32_t u;
1834
1835 sbuf[0] = '\0';
1836 strlcat(sbuf, "drv: ", sizeof(sbuf));
1837 for (i = 0; i < RR_MAX_RECV_RING; i += 4) {
1838 /* XXX: should do this right! */
1839 u = *((u_int32_t *) &fp_ring_consumer[i]);
1840 snprintf(t, sizeof(t), "%.8x|", u);
1841 strlcat(sbuf, t, sizeof(sbuf));
1842 NTOHL(u);
1843 bus_space_write_4(iot, ioh,
1844 RR_DRIVER_RECV_CONS + i, u);
1845 }
1846 #ifdef ESH_PRINTF
1847 if (okay == 1)
1848 printf("%s\n", sbuf);
1849 #endif
1850
1851 sbuf[0] = '\0';
1852 strlcat(sbuf, "rcn: ", sizeof(sbuf));
1853 for (i = 0; i < RR_MAX_RECV_RING; i += 4) {
1854 u = bus_space_read_4(iot, ioh,
1855 RR_RUNCODE_RECV_CONS + i);
1856 /* XXX: should do this right! */
1857 NTOHL(u);
1858 snprintf(t, sizeof(t), "%.8x|", u);
1859 strlcat(sbuf, t, sizeof(sbuf));
1860 }
1861 #ifdef ESH_PRINTF
1862 if (okay == 1)
1863 printf("%s\n", sbuf);
1864 #endif
1865 }
1866
1867 /* Clear interrupt */
1868 bus_space_write_4(iot, ioh, RR_EVENT_CONSUMER, rc_offsets);
1869
1870 return (ret);
1871 }
1872
1873
1874 /*
1875 * Start output on the interface. Always called at splnet().
1876 * Check to see if there are any mbufs that didn't get sent the
1877 * last time this was called. If there are none, get more mbufs
1878 * and send 'em.
1879 *
1880 * For now, we only send one packet at a time.
1881 */
1882
1883 void
1884 eshstart(struct ifnet *ifp)
1885 {
1886 struct esh_softc *sc = ifp->if_softc;
1887 struct esh_send_ring_ctl *send = &sc->sc_send;
1888 struct mbuf *m = NULL;
1889 int error;
1890
1891 /* Don't transmit if interface is busy or not running */
1892
1893 #ifdef ESH_PRINTF
1894 printf("eshstart: ready to look; flags %x\n", sc->sc_flags);
1895 #endif
1896
1897 #define LINK_UP_FLAGS (ESH_FL_LINK_UP | ESH_FL_INITIALIZED | ESH_FL_RUNCODE_UP)
1898 if ((sc->sc_flags & LINK_UP_FLAGS) != LINK_UP_FLAGS)
1899 return;
1900 #undef LINK_UP_FLAGS
1901
1902 #ifdef ESH_PRINTF
1903 if (esh_check(sc))
1904 return;
1905 #endif
1906
1907 /* If we have sent the current packet, get another */
1908
1909 while ((sc->sc_flags & ESH_FL_SNAP_RING_UP) != 0 &&
1910 (m = send->ec_cur_mbuf) == NULL && send->ec_cur_buf == NULL &&
1911 send->ec_cur_dmainfo == NULL) {
1912 IFQ_DEQUEUE(&ifp->if_snd, m);
1913 if (m == 0) /* not really needed */
1914 break;
1915
1916 #if NBPFILTER > 0
1917 if (ifp->if_bpf) {
1918 /*
1919 * On output, the raw packet has a eight-byte CCI
1920 * field prepended. On input, there is no such field.
1921 * The bpf expects the packet to look the same in both
1922 * places, so we temporarily lop off the prepended CCI
1923 * field here, then replace it. Ugh.
1924 *
1925 * XXX: Need to use standard mbuf manipulation
1926 * functions, first mbuf may be less than
1927 * 8 bytes long.
1928 */
1929
1930 m->m_len -= 8;
1931 m->m_data += 8;
1932 m->m_pkthdr.len -= 8;
1933 bpf_mtap(ifp->if_bpf, m);
1934 m->m_len += 8;
1935 m->m_data -= 8;
1936 m->m_pkthdr.len += 8;
1937 }
1938 #endif
1939
1940 send->ec_len = m->m_pkthdr.len;
1941 m = send->ec_cur_mbuf = esh_adjust_mbufs(sc, m);
1942 if (m == NULL)
1943 continue;
1944
1945 error = bus_dmamap_load_mbuf(sc->sc_dmat, send->ec_dma,
1946 m, BUS_DMA_WRITE|BUS_DMA_NOWAIT);
1947 if (error)
1948 panic("%s: eshstart: "
1949 "bus_dmamap_load_mbuf failed err %d\n",
1950 device_xname(&sc->sc_dev), error);
1951 send->ec_offset = 0;
1952 }
1953
1954 /*
1955 * If there are no network packets to send, see if there
1956 * are any FP packets to send.
1957 *
1958 * XXX: Some users may disagree with these priorities;
1959 * this reduces network latency by increasing FP latency...
1960 * Note that it also means that FP packets can get
1961 * locked out so that they *never* get sent, if the
1962 * network constantly fills up the pipe. Not good!
1963 */
1964
1965 if ((sc->sc_flags & ESH_FL_FP_RING_UP) != 0 &&
1966 send->ec_cur_mbuf == NULL && send->ec_cur_buf == NULL &&
1967 send->ec_cur_dmainfo == NULL &&
1968 bufq_peek(send->ec_buf_queue) != NULL) {
1969 struct buf *bp;
1970
1971 #ifdef ESH_PRINTF
1972 printf("eshstart: getting a buf from send->ec_queue %p\n",
1973 send->ec_queue);
1974 #endif
1975
1976 bp = send->ec_cur_buf = bufq_get(send->ec_buf_queue);
1977 send->ec_offset = 0;
1978 send->ec_len = bp->b_bcount;
1979
1980 /*
1981 * Determine the DMA mapping for the buffer.
1982 * If this is too large, what do we do!?
1983 */
1984
1985 error = bus_dmamap_load(sc->sc_dmat, send->ec_dma,
1986 bp->b_data, bp->b_bcount,
1987 bp->b_proc,
1988 BUS_DMA_WRITE|BUS_DMA_NOWAIT);
1989
1990 if (error)
1991 panic("%s: eshstart: "
1992 "bus_dmamap_load failed err %d\n",
1993 device_xname(&sc->sc_dev), error);
1994 }
1995
1996 /*
1997 * If there are no packets from strategy to send, see if there
1998 * are any FP packets to send from fpwrite.
1999 */
2000
2001 if ((sc->sc_flags & ESH_FL_FP_RING_UP) != 0 &&
2002 send->ec_cur_mbuf == NULL && send->ec_cur_buf == NULL &&
2003 send->ec_cur_dmainfo == NULL) {
2004 struct esh_dmainfo *di;
2005
2006 di = TAILQ_FIRST(&send->ec_di_queue);
2007 if (di == NULL)
2008 return;
2009 TAILQ_REMOVE(&send->ec_di_queue, di, ed_list);
2010
2011 #ifdef ESH_PRINTF
2012 printf("eshstart: getting a di from send->ec_di_queue %p\n",
2013 &send->ec_di_queue);
2014 #endif
2015
2016 send->ec_cur_dmainfo = di;
2017 send->ec_offset = 0;
2018 send->ec_len = di->ed_dma->dm_mapsize;
2019 }
2020
2021 if (send->ec_cur_mbuf == NULL && send->ec_cur_buf == NULL &&
2022 send->ec_cur_dmainfo == NULL)
2023 return;
2024
2025 assert(send->ec_len);
2026 assert(send->ec_dma->dm_nsegs ||
2027 send->ec_cur_dmainfo->ed_dma->dm_nsegs);
2028 assert(send->ec_cur_mbuf || send->ec_cur_buf || send->ec_cur_dmainfo);
2029
2030 esh_send(sc);
2031 return;
2032 }
2033
2034
2035 /*
2036 * Put the buffers from the send dmamap into the descriptors and
2037 * send 'em off...
2038 */
2039
2040 static void
2041 esh_send(struct esh_softc *sc)
2042 {
2043 struct esh_send_ring_ctl *send = &sc->sc_send;
2044 u_int start_producer = send->ec_producer;
2045 bus_dmamap_t dma;
2046
2047 if (send->ec_cur_dmainfo != NULL)
2048 dma = send->ec_cur_dmainfo->ed_dma;
2049 else
2050 dma = send->ec_dma;
2051
2052 #ifdef ESH_PRINTF
2053 printf("esh_send: producer %x consumer %x nsegs %d\n",
2054 send->ec_producer, send->ec_consumer, dma->dm_nsegs);
2055 #endif
2056
2057 esh_dma_sync(sc, send->ec_descr, send->ec_producer, send->ec_consumer,
2058 RR_SEND_RING_SIZE, sizeof(struct rr_descr), 1,
2059 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2060
2061 while (NEXT_SEND(send->ec_producer) != send->ec_consumer &&
2062 send->ec_offset < dma->dm_nsegs) {
2063 int offset = send->ec_producer;
2064
2065 send->ec_descr[offset].rd_buffer_addr =
2066 dma->dm_segs[send->ec_offset].ds_addr;
2067 send->ec_descr[offset].rd_length =
2068 dma->dm_segs[send->ec_offset].ds_len;
2069 send->ec_descr[offset].rd_control = 0;
2070
2071 if (send->ec_offset == 0) {
2072 /* Start of the dmamap... */
2073 send->ec_descr[offset].rd_control |=
2074 RR_CT_PACKET_START;
2075 }
2076
2077 if (send->ec_offset + 1 == dma->dm_nsegs) {
2078 send->ec_descr[offset].rd_control |= RR_CT_PACKET_END;
2079 }
2080
2081 send->ec_offset++;
2082 send->ec_producer = NEXT_SEND(send->ec_producer);
2083 }
2084
2085 /*
2086 * XXX: we could optimize the dmamap_sync to just get what we've
2087 * just set up, rather than the whole buffer...
2088 */
2089
2090 bus_dmamap_sync(sc->sc_dmat, dma, 0, dma->dm_mapsize,
2091 BUS_DMASYNC_PREWRITE);
2092 esh_dma_sync(sc, send->ec_descr,
2093 start_producer, send->ec_consumer,
2094 RR_SEND_RING_SIZE, sizeof(struct rr_descr), 1,
2095 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2096
2097 #ifdef ESH_PRINTF
2098 if (send->ec_offset != dma->dm_nsegs)
2099 printf("eshstart: couldn't fit packet in send ring!\n");
2100 #endif
2101
2102 if (sc->sc_version == 1) {
2103 esh_send_cmd(sc, RR_CC_SET_SEND_PRODUCER,
2104 0, send->ec_producer);
2105 } else {
2106 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
2107 RR_SEND_PRODUCER, send->ec_producer);
2108 }
2109 return;
2110 }
2111
2112
2113 /*
2114 * Cleanup for the send routine. When the NIC sends us an event to
2115 * let us know that it has consumed our buffers, we need to free the
2116 * buffers, and possibly send another packet.
2117 */
2118
2119 static void
2120 eshstart_cleanup(struct esh_softc *sc, u_int16_t consumer, int error)
2121 {
2122 struct esh_send_ring_ctl *send = &sc->sc_send;
2123 int start_consumer = send->ec_consumer;
2124 bus_dmamap_t dma;
2125
2126 if (send->ec_cur_dmainfo != NULL)
2127 dma = send->ec_cur_dmainfo->ed_dma;
2128 else
2129 dma = send->ec_dma;
2130
2131 #ifdef ESH_PRINTF
2132 printf("eshstart_cleanup: consumer %x, send->consumer %x\n",
2133 consumer, send->ec_consumer);
2134 #endif
2135
2136 esh_dma_sync(sc, send->ec_descr,
2137 send->ec_consumer, consumer,
2138 RR_SEND_RING_SIZE, sizeof(struct rr_descr), 0,
2139 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2140
2141 while (send->ec_consumer != consumer) {
2142 assert(dma->dm_nsegs);
2143 assert(send->ec_cur_mbuf || send->ec_cur_buf ||
2144 send->ec_cur_dmainfo);
2145
2146 if (send->ec_descr[send->ec_consumer].rd_control &
2147 RR_CT_PACKET_END) {
2148 #ifdef ESH_PRINT
2149 printf("eshstart_cleanup: dmamap_sync mapsize %d\n",
2150 send->ec_dma->dm_mapsize);
2151 #endif
2152 bus_dmamap_sync(sc->sc_dmat, dma, 0, dma->dm_mapsize,
2153 BUS_DMASYNC_POSTWRITE);
2154 bus_dmamap_unload(sc->sc_dmat, dma);
2155 if (send->ec_cur_mbuf) {
2156 m_freem(send->ec_cur_mbuf);
2157 send->ec_cur_mbuf = NULL;
2158 } else if (send->ec_cur_dmainfo) {
2159 send->ec_cur_dmainfo->ed_flags &= ~ESH_DI_BUSY;
2160 send->ec_cur_dmainfo->ed_error =
2161 (send->ec_error ? send->ec_error : error);
2162 send->ec_error = 0;
2163 wakeup((void *) send->ec_cur_dmainfo);
2164 send->ec_cur_dmainfo = NULL;
2165 } else if (send->ec_cur_buf) {
2166 biodone(send->ec_cur_buf);
2167 send->ec_cur_buf = NULL;
2168 } else {
2169 panic("%s: eshstart_cleanup: "
2170 "no current mbuf, buf, or dmainfo!\n",
2171 device_xname(&sc->sc_dev));
2172 }
2173
2174 /*
2175 * Version 1 of the firmware sent an event each
2176 * time it sent out a packet. Later versions do not
2177 * (which results in a considerable speedup), so we
2178 * have to keep track here.
2179 */
2180
2181 if (sc->sc_version != 1)
2182 sc->sc_if.if_opackets++;
2183 }
2184 if (error != 0)
2185 send->ec_error = error;
2186
2187 send->ec_consumer = NEXT_SEND(send->ec_consumer);
2188 }
2189
2190 esh_dma_sync(sc, send->ec_descr,
2191 start_consumer, consumer,
2192 RR_SEND_RING_SIZE, sizeof(struct rr_descr), 0,
2193 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2194
2195 eshstart(&sc->sc_if);
2196 }
2197
2198
2199 /*
2200 * XXX: Ouch: The NIC can only send word-aligned buffers, and only
2201 * the last buffer in the packet can have a length that is not
2202 * a multiple of four!
2203 *
2204 * Here we traverse the packet, pick out the bogus mbufs, and fix 'em
2205 * if possible. The fix is amazingly expensive, so we sure hope that
2206 * this is a rare occurance (it seems to be).
2207 */
2208
2209 static struct mbuf *
2210 esh_adjust_mbufs(struct esh_softc *sc, struct mbuf *m)
2211 {
2212 struct mbuf *m0, *n, *n0;
2213 u_int32_t write_len;
2214
2215 write_len = m->m_pkthdr.len;
2216 #ifdef DIAGNOSTIC
2217 if (write_len > max_write_len)
2218 max_write_len = write_len;
2219 #endif
2220
2221 for (n0 = n = m; n; n = n->m_next) {
2222 while (n && n->m_len == 0) {
2223 MFREE(n, m0);
2224 if (n == m)
2225 n = n0 = m = m0;
2226 else
2227 n = n0->m_next = m0;
2228 }
2229 if (n == NULL)
2230 break;
2231
2232 if (mtod(n, long) & 3 || (n->m_next && n->m_len & 3)) {
2233 /* Gotta clean it up */
2234 struct mbuf *o;
2235 u_int32_t len;
2236
2237 sc->sc_misaligned_bufs++;
2238 MGETHDR(o, M_DONTWAIT, MT_DATA);
2239 if (!o)
2240 goto bogosity;
2241
2242 MCLGET(o, M_DONTWAIT);
2243 if (!(o->m_flags & M_EXT)) {
2244 MFREE(o, m0);
2245 goto bogosity;
2246 }
2247
2248 /*
2249 * XXX: Copy as much as we can into the
2250 * cluster. For now we can't have more
2251 * than a cluster in there. May change.
2252 * I'd prefer not to get this
2253 * down-n-dirty, but we have to be able
2254 * to do this kind of funky copy.
2255 */
2256
2257 len = min(MCLBYTES, write_len);
2258 #ifdef DIAGNOSTIC
2259 assert(n->m_len <= len);
2260 assert(len <= MCLBYTES);
2261 #endif
2262
2263 m_copydata(n, 0, len, mtod(o, void *));
2264 o->m_pkthdr.len = len;
2265 m_adj(n, len);
2266 o->m_len = len;
2267 o->m_next = n;
2268
2269 if (n == m)
2270 m = o;
2271 else
2272 n0->m_next = o;
2273 n = o;
2274 }
2275 n0 = n;
2276 write_len -= n->m_len;
2277 }
2278 return m;
2279
2280 bogosity:
2281 aprint_error_dev(&sc->sc_dev, "esh_adjust_mbuf: unable to allocate cluster for "
2282 "mbuf %p, len %x\n",
2283 mtod(m, void *), m->m_len);
2284 m_freem(m);
2285 return NULL;
2286 }
2287
2288
2289 /*
2290 * Read in the current valid entries from the ring and forward
2291 * them to the upper layer protocols. It is possible that we
2292 * haven't received the whole packet yet, in which case we just
2293 * add each of the buffers into the packet until we have the whole
2294 * thing.
2295 */
2296
2297 static void
2298 esh_read_snap_ring(struct esh_softc *sc, u_int16_t consumer, int error)
2299 {
2300 struct ifnet *ifp = &sc->sc_if;
2301 struct esh_snap_ring_ctl *recv = &sc->sc_snap_recv;
2302 int start_consumer = recv->ec_consumer;
2303 u_int16_t control;
2304
2305 if ((sc->sc_flags & ESH_FL_SNAP_RING_UP) == 0)
2306 return;
2307
2308 if (error)
2309 recv->ec_error = error;
2310
2311 esh_dma_sync(sc, recv->ec_descr,
2312 start_consumer, consumer,
2313 RR_SNAP_RECV_RING_SIZE,
2314 sizeof(struct rr_descr), 0,
2315 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2316
2317 while (recv->ec_consumer != consumer) {
2318 u_int16_t offset = recv->ec_consumer;
2319 struct mbuf *m;
2320
2321 m = recv->ec_m[offset];
2322 m->m_len = recv->ec_descr[offset].rd_length;
2323 control = recv->ec_descr[offset].rd_control;
2324 bus_dmamap_sync(sc->sc_dmat, recv->ec_dma[offset], 0, m->m_len,
2325 BUS_DMASYNC_POSTREAD);
2326 bus_dmamap_unload(sc->sc_dmat, recv->ec_dma[offset]);
2327
2328 #ifdef ESH_PRINTF
2329 printf("esh_read_snap_ring: offset %x addr %p len %x flags %x\n",
2330 offset, mtod(m, void *), m->m_len, control);
2331 #endif
2332 if (control & RR_CT_PACKET_START || !recv->ec_cur_mbuf) {
2333 if (recv->ec_cur_pkt) {
2334 m_freem(recv->ec_cur_pkt);
2335 recv->ec_cur_pkt = NULL;
2336 printf("%s: possible skipped packet!\n",
2337 device_xname(&sc->sc_dev));
2338 }
2339 recv->ec_cur_pkt = recv->ec_cur_mbuf = m;
2340 /* allocated buffers all have pkthdrs... */
2341 m->m_pkthdr.rcvif = ifp;
2342 m->m_pkthdr.len = m->m_len;
2343 } else {
2344 if (!recv->ec_cur_pkt)
2345 panic("esh_read_snap_ring: no cur_pkt");
2346
2347 recv->ec_cur_mbuf->m_next = m;
2348 recv->ec_cur_mbuf = m;
2349 recv->ec_cur_pkt->m_pkthdr.len += m->m_len;
2350 }
2351
2352 recv->ec_m[offset] = NULL;
2353 recv->ec_descr[offset].rd_length = 0;
2354 recv->ec_descr[offset].rd_buffer_addr = 0;
2355
2356 /* Note that we can START and END on the same buffer */
2357
2358 if (control & RR_CT_PACKET_END) { /* XXX: RR2_ matches */
2359 m = recv->ec_cur_pkt;
2360 if (!error && !recv->ec_error) {
2361 /*
2362 * We have a complete packet, send it up
2363 * the stack...
2364 */
2365 ifp->if_ipackets++;
2366
2367 #if NBPFILTER > 0
2368 /*
2369 * Check if there's a BPF listener on this
2370 * interface. If so, hand off the raw packet
2371 * to BPF.
2372 */
2373 if (ifp->if_bpf) {
2374 /*
2375 * Incoming packets start with the FP
2376 * data, so no alignment problems
2377 * here...
2378 */
2379 bpf_mtap(ifp->if_bpf, m);
2380 }
2381 #endif
2382 if ((ifp->if_flags & IFF_RUNNING) == 0) {
2383 m_freem(m);
2384 } else {
2385 m = m_pullup(m,
2386 sizeof(struct hippi_header));
2387 (*ifp->if_input)(ifp, m);
2388 }
2389 } else {
2390 ifp->if_ierrors++;
2391 recv->ec_error = 0;
2392 m_freem(m);
2393 }
2394 recv->ec_cur_pkt = recv->ec_cur_mbuf = NULL;
2395 }
2396
2397 recv->ec_descr[offset].rd_control = 0;
2398 recv->ec_consumer = NEXT_RECV(recv->ec_consumer);
2399 }
2400
2401 esh_dma_sync(sc, recv->ec_descr,
2402 start_consumer, consumer,
2403 RR_SNAP_RECV_RING_SIZE,
2404 sizeof(struct rr_descr), 0,
2405 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2406
2407 esh_fill_snap_ring(sc);
2408 }
2409
2410
2411 /*
2412 * Add the SNAP (IEEE 802) receive ring to the NIC. It is possible
2413 * that we are doing this after resetting the card, in which case
2414 * the structures have already been filled in and we may need to
2415 * resume sending data.
2416 */
2417
2418 static void
2419 esh_init_snap_ring(struct esh_softc *sc)
2420 {
2421 struct rr_ring_ctl *ring = sc->sc_recv_ring_table + HIPPI_ULP_802;
2422
2423 if ((sc->sc_flags & ESH_FL_CLOSING_SNAP) != 0) {
2424 aprint_error_dev(&sc->sc_dev, "can't reopen SNAP ring until ring disable is completed\n");
2425 return;
2426 }
2427
2428 if (ring->rr_entry_size == 0) {
2429 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma,
2430 (char *) ring - (char *) sc->sc_dma_addr,
2431 sizeof(*ring),
2432 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2433
2434 ring->rr_ring_addr = sc->sc_snap_recv_ring_dma;
2435 ring->rr_free_bufs = RR_SNAP_RECV_RING_SIZE / 4;
2436 ring->rr_entries = RR_SNAP_RECV_RING_SIZE;
2437 ring->rr_entry_size = sizeof(struct rr_descr);
2438 ring->rr_prod_index = 0;
2439 sc->sc_snap_recv.ec_producer = 0;
2440 sc->sc_snap_recv.ec_consumer = 0;
2441 ring->rr_mode = RR_RR_IP;
2442
2443 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma,
2444 (char *) ring - (char *) sc->sc_dma_addr,
2445 sizeof(ring),
2446 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2447 esh_send_cmd(sc, RR_CC_ENABLE_RING, HIPPI_ULP_802,
2448 sc->sc_snap_recv.ec_producer);
2449 } else {
2450 printf("%s: snap receive ring already initialized!\n",
2451 device_xname(&sc->sc_dev));
2452 }
2453 }
2454
2455 static void
2456 esh_close_snap_ring(struct esh_softc *sc)
2457 {
2458 #ifdef ESH_PRINTF
2459 printf("esh_close_snap_ring: starting\n");
2460 #endif
2461
2462 if ((sc->sc_flags & ESH_FL_SNAP_RING_UP) == 0)
2463 return;
2464
2465 sc->sc_flags |= ESH_FL_CLOSING_SNAP;
2466 esh_send_cmd(sc, RR_CC_DISABLE_RING, HIPPI_ULP_802, 0);
2467
2468 /* Disable event will trigger the rest of the cleanup. */
2469 }
2470
2471 /*
2472 * Fill in the snap ring with more mbuf buffers so that we can
2473 * receive traffic.
2474 */
2475
2476 static void
2477 esh_fill_snap_ring(struct esh_softc *sc)
2478 {
2479 struct esh_snap_ring_ctl *recv = &sc->sc_snap_recv;
2480 int start_producer = recv->ec_producer;
2481 int error;
2482
2483 esh_dma_sync(sc, recv->ec_descr,
2484 recv->ec_producer, recv->ec_consumer,
2485 RR_SNAP_RECV_RING_SIZE,
2486 sizeof(struct rr_descr), 1,
2487 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2488
2489 while (NEXT_RECV(recv->ec_producer) != recv->ec_consumer) {
2490 int offset = recv->ec_producer;
2491 struct mbuf *m, *m0;
2492
2493 MGETHDR(m, M_DONTWAIT, MT_DATA);
2494 if (!m)
2495 break;
2496 MCLGET(m, M_DONTWAIT);
2497 if ((m->m_flags & M_EXT) == 0) {
2498 MFREE(m, m0);
2499 break;
2500 }
2501
2502 error = bus_dmamap_load(sc->sc_dmat, recv->ec_dma[offset],
2503 mtod(m, void *), MCLBYTES,
2504 NULL, BUS_DMA_READ|BUS_DMA_NOWAIT);
2505 if (error) {
2506 printf("%s: esh_fill_recv_ring: bus_dmamap_load "
2507 "failed\toffset %x, error code %d\n",
2508 device_xname(&sc->sc_dev), offset, error);
2509 MFREE(m, m0);
2510 break;
2511 }
2512
2513 /*
2514 * In this implementation, we should only see one segment
2515 * per DMA.
2516 */
2517
2518 assert(recv->ec_dma[offset]->dm_nsegs == 1);
2519
2520 /*
2521 * Load into the descriptors.
2522 */
2523
2524 recv->ec_descr[offset].rd_ring =
2525 (sc->sc_version == 1) ? HIPPI_ULP_802 : 0;
2526 recv->ec_descr[offset].rd_buffer_addr =
2527 recv->ec_dma[offset]->dm_segs->ds_addr;
2528 recv->ec_descr[offset].rd_length =
2529 recv->ec_dma[offset]->dm_segs->ds_len;
2530 recv->ec_descr[offset].rd_control = 0;
2531
2532 bus_dmamap_sync(sc->sc_dmat, recv->ec_dma[offset], 0, MCLBYTES,
2533 BUS_DMASYNC_PREREAD);
2534
2535 recv->ec_m[offset] = m;
2536
2537 recv->ec_producer = NEXT_RECV(recv->ec_producer);
2538 }
2539
2540 esh_dma_sync(sc, recv->ec_descr,
2541 start_producer, recv->ec_consumer,
2542 RR_SNAP_RECV_RING_SIZE,
2543 sizeof(struct rr_descr), 1,
2544 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2545
2546 if (sc->sc_version == 1)
2547 esh_send_cmd(sc, RR_CC_SET_RECV_PRODUCER, HIPPI_ULP_802,
2548 recv->ec_producer);
2549 else
2550 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
2551 RR_SNAP_RECV_PRODUCER, recv->ec_producer);
2552 }
2553
2554 static void
2555 esh_init_fp_rings(struct esh_softc *sc)
2556 {
2557 struct esh_fp_ring_ctl *recv;
2558 struct rr_ring_ctl *ring_ctl;
2559 int ulp;
2560
2561 for (ulp = 0; ulp < RR_ULP_COUNT; ulp++) {
2562 ring_ctl = &sc->sc_recv_ring_table[ulp];
2563 recv = sc->sc_fp_recv[ulp];
2564
2565 if (recv == NULL)
2566 continue;
2567
2568 ring_ctl->rr_ring_addr = recv->ec_dma->dm_segs->ds_addr;
2569 ring_ctl->rr_free_bufs = RR_FP_RECV_RING_SIZE / 4;
2570 ring_ctl->rr_entries = RR_FP_RECV_RING_SIZE;
2571 ring_ctl->rr_entry_size = sizeof(struct rr_descr);
2572 ring_ctl->rr_prod_index = 0;
2573 ring_ctl->rr_mode = RR_RR_CHARACTER;
2574 recv->ec_producer = 0;
2575 recv->ec_consumer = 0;
2576 recv->ec_index = -1;
2577
2578 esh_send_cmd(sc, RR_CC_ENABLE_RING, ulp, recv->ec_producer);
2579 }
2580 }
2581
2582 static void
2583 esh_read_fp_ring(struct esh_softc *sc, u_int16_t consumer, int error, int ulp)
2584 {
2585 struct esh_fp_ring_ctl *recv = sc->sc_fp_recv[ulp];
2586 int start_consumer = recv->ec_consumer;
2587 u_int16_t control;
2588
2589 #ifdef ESH_PRINTF
2590 printf("esh_read_fp_ring: ulp %d, consumer %d, producer %d, old consumer %d\n",
2591 recv->ec_ulp, consumer, recv->ec_producer, recv->ec_consumer);
2592 #endif
2593 if ((sc->sc_flags & ESH_FL_FP_RING_UP) == 0)
2594 return;
2595
2596 if (error != 0)
2597 recv->ec_error = error;
2598
2599 esh_dma_sync(sc, recv->ec_descr,
2600 start_consumer, consumer,
2601 RR_FP_RECV_RING_SIZE,
2602 sizeof(struct rr_descr), 0,
2603 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2604
2605 while (recv->ec_consumer != consumer) {
2606 u_int16_t offset = recv->ec_consumer;
2607
2608 control = recv->ec_descr[offset].rd_control;
2609
2610 if (control & RR_CT_PACKET_START) {
2611 if (recv->ec_read_len) {
2612 recv->ec_error = 0;
2613 printf("%s: ulp %d: possible skipped FP packet!\n",
2614 device_xname(&sc->sc_dev), recv->ec_ulp);
2615 }
2616 recv->ec_seen_end = 0;
2617 recv->ec_read_len = 0;
2618 }
2619 if (recv->ec_seen_end == 0)
2620 recv->ec_read_len += recv->ec_descr[offset].rd_length;
2621
2622 #if NOT_LAME
2623 recv->ec_descr[offset].rd_length = 0;
2624 recv->ec_descr[offset].rd_buffer_addr = 0;
2625 #endif
2626
2627 #ifdef ESH_PRINTF
2628 printf("esh_read_fp_ring: offset %d addr %d len %d flags %x, total %d\n",
2629 offset, recv->ec_descr[offset].rd_buffer_addr,
2630 recv->ec_descr[offset].rd_length, control, recv->ec_read_len);
2631 #endif
2632 /* Note that we can START and END on the same buffer */
2633
2634 if ((control & RR_CT_PACKET_END) == RR_CT_PACKET_END) {
2635 if (recv->ec_dmainfo[offset] != NULL) {
2636 struct esh_dmainfo *di =
2637 recv->ec_dmainfo[offset];
2638
2639 recv->ec_dmainfo[offset] = NULL;
2640 bus_dmamap_sync(sc->sc_dmat, di->ed_dma,
2641 0, recv->ec_read_len,
2642 BUS_DMASYNC_POSTREAD);
2643 bus_dmamap_unload(sc->sc_dmat, di->ed_dma);
2644
2645 if (!error && !recv->ec_error) {
2646 /*
2647 * XXX: we oughta do this right, with full
2648 * BPF support and the rest...
2649 */
2650 if (di->ed_buf != NULL) {
2651 di->ed_buf->b_resid =
2652 di->ed_buf->b_bcount -
2653 recv->ec_read_len;
2654 } else {
2655 di->ed_read_len =
2656 recv->ec_read_len;
2657 }
2658 } else {
2659 if (di->ed_buf != NULL) {
2660 di->ed_buf->b_resid =
2661 di->ed_buf->b_bcount;
2662 di->ed_buf->b_error = EIO;
2663 } else {
2664 di->ed_error = EIO;
2665 recv->ec_error = 0;
2666 }
2667 }
2668
2669 #ifdef ESH_PRINTF
2670 printf("esh_read_fp_ring: ulp %d, read %d, resid %ld\n",
2671 recv->ec_ulp, recv->ec_read_len, (di->ed_buf ? di->ed_buf->b_resid : di->ed_read_len));
2672 #endif
2673 di->ed_flags &=
2674 ~(ESH_DI_BUSY | ESH_DI_READING);
2675 if (di->ed_buf != NULL)
2676 biodone(di->ed_buf);
2677 else
2678 wakeup((void *) di);
2679 recv->ec_read_len = 0;
2680 } else {
2681 #ifdef ESH_PRINTF
2682 printf("esh_read_fp_ring: ulp %d, seen end at %d\n",
2683 recv->ec_ulp, offset);
2684 #endif
2685 recv->ec_seen_end = 1;
2686 }
2687 }
2688
2689 #if NOT_LAME
2690 recv->ec_descr[offset].rd_control = 0;
2691 #endif
2692 recv->ec_consumer = NEXT_RECV(recv->ec_consumer);
2693 }
2694
2695 esh_dma_sync(sc, recv->ec_descr,
2696 start_consumer, consumer,
2697 RR_SNAP_RECV_RING_SIZE,
2698 sizeof(struct rr_descr), 0,
2699 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2700
2701 esh_fill_fp_ring(sc, recv);
2702 }
2703
2704
2705 static void
2706 esh_fill_fp_ring(struct esh_softc *sc, struct esh_fp_ring_ctl *recv)
2707 {
2708 struct esh_dmainfo *di = recv->ec_cur_dmainfo;
2709 int start_producer = recv->ec_producer;
2710
2711 #ifdef ESH_PRINTF
2712 printf("esh_fill_fp_ring: ulp %d, di %p, producer %d\n",
2713 recv->ec_ulp, di, start_producer);
2714 #endif
2715
2716 esh_dma_sync(sc, recv->ec_descr,
2717 recv->ec_producer, recv->ec_consumer,
2718 RR_SNAP_RECV_RING_SIZE,
2719 sizeof(struct rr_descr), 1,
2720 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2721
2722 while (NEXT_RECV(recv->ec_producer) != recv->ec_consumer) {
2723 int offset = recv->ec_producer;
2724
2725 if (di == NULL) {
2726 /*
2727 * Must allow only one reader at a time; see
2728 * esh_flush_fp_ring().
2729 */
2730
2731 if (offset != start_producer)
2732 goto fp_fill_done;
2733
2734 di = TAILQ_FIRST(&recv->ec_queue);
2735 if (di == NULL)
2736 goto fp_fill_done;
2737 TAILQ_REMOVE(&recv->ec_queue, di, ed_list);
2738 recv->ec_offset = 0;
2739 recv->ec_cur_dmainfo = di;
2740 di->ed_flags |= ESH_DI_READING;
2741 #ifdef ESH_PRINTF
2742 printf("\toffset %d nsegs %d\n",
2743 recv->ec_offset, di->ed_dma->dm_nsegs);
2744 #endif
2745 }
2746
2747 /*
2748 * Load into the descriptors.
2749 */
2750
2751 recv->ec_descr[offset].rd_ring = 0;
2752 recv->ec_descr[offset].rd_buffer_addr =
2753 di->ed_dma->dm_segs[recv->ec_offset].ds_addr;
2754 recv->ec_descr[offset].rd_length =
2755 di->ed_dma->dm_segs[recv->ec_offset].ds_len;
2756 recv->ec_descr[offset].rd_control = 0;
2757 recv->ec_dmainfo[offset] = NULL;
2758
2759 if (recv->ec_offset == 0) {
2760 /* Start of the dmamap... */
2761 recv->ec_descr[offset].rd_control |=
2762 RR_CT_PACKET_START;
2763 }
2764
2765 assert(recv->ec_offset < di->ed_dma->dm_nsegs);
2766
2767 recv->ec_offset++;
2768 if (recv->ec_offset == di->ed_dma->dm_nsegs) {
2769 recv->ec_descr[offset].rd_control |= RR_CT_PACKET_END;
2770 recv->ec_dmainfo[offset] = di;
2771 di = NULL;
2772 recv->ec_offset = 0;
2773 recv->ec_cur_dmainfo = NULL;
2774 }
2775
2776 recv->ec_producer = NEXT_RECV(recv->ec_producer);
2777 }
2778
2779 fp_fill_done:
2780 esh_dma_sync(sc, recv->ec_descr,
2781 start_producer, recv->ec_consumer,
2782 RR_SNAP_RECV_RING_SIZE,
2783 sizeof(struct rr_descr), 1,
2784 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2785
2786
2787 if (sc->sc_version == 1) {
2788 esh_send_cmd(sc, RR_CC_SET_RECV_PRODUCER, recv->ec_ulp,
2789 recv->ec_producer);
2790 } else {
2791 union {
2792 u_int32_t producer;
2793 u_int8_t indices[4];
2794 } v;
2795 int which;
2796 int i;
2797 struct esh_fp_ring_ctl *r;
2798
2799 which = (recv->ec_index / 4) * 4;
2800 #if BAD_PRODUCER
2801 v.producer = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
2802 RR_RECVS_PRODUCER + which);
2803 NTOHL(v.producer);
2804 #endif
2805 for (i = 0; i < 4; i++) {
2806 r = sc->sc_fp_recv_index[i + which];
2807 if (r != NULL)
2808 v.indices[i] = r->ec_producer;
2809 else
2810 v.indices[i] = 0;
2811 }
2812 #ifdef ESH_PRINTF
2813 printf("esh_fill_fp_ring: ulp %d, updating producer %d: %.8x\n",
2814 recv->ec_ulp, which, v.producer);
2815 #endif
2816 HTONL(v.producer);
2817 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
2818 RR_RECVS_PRODUCER + which, v.producer);
2819 }
2820 #ifdef ESH_PRINTF
2821 printf("esh_fill_fp_ring: ulp %d, final producer %d\n",
2822 recv->ec_ulp, recv->ec_producer);
2823 #endif
2824 }
2825
2826 /*
2827 * When a read is interrupted, we need to flush the buffers out of
2828 * the ring; otherwise, a driver error could lock a process up,
2829 * with no way to exit.
2830 */
2831
2832 static void
2833 esh_flush_fp_ring(struct esh_softc *sc, struct esh_fp_ring_ctl *recv, struct esh_dmainfo *di)
2834 {
2835 int error = 0;
2836
2837 /*
2838 * If the read request hasn't yet made it to the top of the queue,
2839 * just remove it from the queue, and return.
2840 */
2841
2842 if ((di->ed_flags & ESH_DI_READING) != ESH_DI_READING) {
2843 TAILQ_REMOVE(&recv->ec_queue, di, ed_list);
2844 return;
2845 }
2846
2847 #ifdef ESH_PRINTF
2848 printf("esh_flush_fp_ring: di->ed_flags %x, ulp %d, producer %x\n",
2849 di->ed_flags, recv->ec_ulp, recv->ec_producer);
2850 #endif
2851
2852 /* Now we gotta get tough. Issue a discard packet command */
2853
2854 esh_send_cmd(sc, RR_CC_DISCARD_PKT, recv->ec_ulp,
2855 recv->ec_producer - 1);
2856
2857 /* Wait for it to finish */
2858
2859 while ((di->ed_flags & ESH_DI_READING) != ESH_DI_READING &&
2860 error == 0) {
2861 error = tsleep((void *) &di->ed_flags, PRIBIO,
2862 "esh_flush_fp_ring", hz);
2863 printf("esh_flush_fp_ring: di->ed_flags %x, error %d\n",
2864 di->ed_flags, error);
2865 /*
2866 * What do I do if this times out or gets interrupted?
2867 * Reset the card? I could get an interrupt before
2868 * giving it a chance to check. Perhaps I oughta wait
2869 * awhile? What about not giving the user a chance
2870 * to interrupt, and just expecting a quick answer?
2871 * That way I could reset the card if it doesn't
2872 * come back right away!
2873 */
2874 if (error != 0) {
2875 eshreset(sc);
2876 break;
2877 }
2878 }
2879
2880 /* XXX: Do we need to clear out the dmainfo pointers */
2881 }
2882
2883
2884 int
2885 eshioctl(struct ifnet *ifp, u_long cmd, void *data)
2886 {
2887 int error = 0;
2888 struct esh_softc *sc = ifp->if_softc;
2889 struct ifaddr *ifa = (struct ifaddr *)data;
2890 struct ifdrv *ifd = (struct ifdrv *) data;
2891 u_long len;
2892 int s;
2893
2894 s = splnet();
2895
2896 while (sc->sc_flags & ESH_FL_EEPROM_BUSY) {
2897 error = tsleep(&sc->sc_flags, PCATCH | PRIBIO,
2898 "esheeprom", 0);
2899 if (error != 0)
2900 goto ioctl_done;
2901 }
2902
2903 switch (cmd) {
2904
2905 case SIOCINITIFADDR:
2906 ifp->if_flags |= IFF_UP;
2907 if ((sc->sc_flags & ESH_FL_INITIALIZED) == 0) {
2908 eshinit(sc);
2909 if ((sc->sc_flags & ESH_FL_INITIALIZED) == 0) {
2910 error = EIO;
2911 goto ioctl_done;
2912 }
2913 }
2914
2915 if ((sc->sc_flags & (ESH_FL_RUNCODE_UP | ESH_FL_SNAP_RING_UP))
2916 == ESH_FL_RUNCODE_UP) {
2917 while (sc->sc_flags & ESH_FL_CLOSING_SNAP) {
2918 error = tsleep((void *) &sc->sc_snap_recv,
2919 PRIBIO, "esh_closing_fp_ring",
2920 hz);
2921 if (error != 0)
2922 goto ioctl_done;
2923 }
2924 esh_init_snap_ring(sc);
2925 }
2926
2927 switch (ifa->ifa_addr->sa_family) {
2928 #ifdef INET
2929 case AF_INET:
2930 /* The driver doesn't really care about IP addresses */
2931 break;
2932 #endif
2933 default:
2934 break;
2935 }
2936 break;
2937
2938 case SIOCSIFFLAGS:
2939 if ((error = ifioctl_common(ifp, cmd, data)) != 0)
2940 break;
2941 if ((ifp->if_flags & IFF_UP) == 0 &&
2942 (ifp->if_flags & IFF_RUNNING) != 0) {
2943 /*
2944 * If interface is marked down and it is running, then
2945 * stop it.
2946 */
2947
2948 ifp->if_flags &= ~IFF_RUNNING;
2949 esh_close_snap_ring(sc);
2950 while (sc->sc_flags & ESH_FL_CLOSING_SNAP) {
2951 error = tsleep((void *) &sc->sc_snap_recv,
2952 PRIBIO, "esh_closing_fp_ring",
2953 hz);
2954 if (error != 0)
2955 goto ioctl_done;
2956 }
2957
2958 } else if ((ifp->if_flags & IFF_UP) != 0 &&
2959 (ifp->if_flags & IFF_RUNNING) == 0) {
2960
2961 if ((sc->sc_flags & ESH_FL_INITIALIZED) == 0) {
2962 eshinit(sc);
2963 if ((sc->sc_flags & ESH_FL_INITIALIZED) == 0) {
2964 error = EIO;
2965 goto ioctl_done;
2966 }
2967 }
2968
2969 if ((sc->sc_flags & (ESH_FL_RUNCODE_UP | ESH_FL_SNAP_RING_UP)) == ESH_FL_RUNCODE_UP) {
2970 while (sc->sc_flags & ESH_FL_CLOSING_SNAP) {
2971 error = tsleep((void *) &sc->sc_snap_recv, PRIBIO, "esh_closing_fp_ring", hz);
2972 if (error != 0)
2973 goto ioctl_done;
2974 }
2975 esh_init_snap_ring(sc);
2976 }
2977 }
2978 break;
2979
2980 case SIOCSDRVSPEC: /* Driver-specific configuration calls */
2981 cmd = ifd->ifd_cmd;
2982 len = ifd->ifd_len;
2983 data = ifd->ifd_data;
2984
2985 esh_generic_ioctl(sc, cmd, data, len, NULL);
2986 break;
2987
2988 default:
2989 error = ether_ioctl(ifp, cmd, data);
2990 break;
2991 }
2992
2993 ioctl_done:
2994 splx(s);
2995 return (error);
2996 }
2997
2998
2999 static int
3000 esh_generic_ioctl(struct esh_softc *sc, u_long cmd, void *data,
3001 u_long len, struct lwp *l)
3002 {
3003 struct ifnet *ifp = &sc->sc_if;
3004 struct rr_eeprom rr_eeprom;
3005 bus_space_tag_t iot = sc->sc_iot;
3006 bus_space_handle_t ioh = sc->sc_ioh;
3007 u_int32_t misc_host_ctl;
3008 u_int32_t misc_local_ctl;
3009 u_int32_t address;
3010 u_int32_t value;
3011 u_int32_t offset;
3012 u_int32_t length;
3013 int error = 0;
3014 int i;
3015
3016 /*
3017 * If we have a LWP pointer, check to make sure that the
3018 * user is privileged before performing any destruction operations.
3019 */
3020
3021 if (l != NULL) {
3022 switch (cmd) {
3023 case EIOCGTUNE:
3024 case EIOCGEEPROM:
3025 case EIOCGSTATS:
3026 break;
3027
3028 default:
3029 error = kauth_authorize_network(l->l_cred,
3030 KAUTH_NETWORK_INTERFACE,
3031 KAUTH_REQ_NETWORK_INTERFACE_SETPRIV,
3032 ifp, KAUTH_ARG(cmd), NULL);
3033 if (error)
3034 return (error);
3035 }
3036 }
3037
3038 switch (cmd) {
3039 case EIOCGTUNE:
3040 if (len != sizeof(struct rr_tuning))
3041 error = EMSGSIZE;
3042 else {
3043 error = copyout((void *) &sc->sc_tune, data,
3044 sizeof(struct rr_tuning));
3045 }
3046 break;
3047
3048 case EIOCSTUNE:
3049 if ((ifp->if_flags & IFF_UP) == 0) {
3050 if (len != sizeof(struct rr_tuning)) {
3051 error = EMSGSIZE;
3052 } else {
3053 error = copyin(data, (void *) &sc->sc_tune,
3054 sizeof(struct rr_tuning));
3055 }
3056 } else {
3057 error = EBUSY;
3058 }
3059 break;
3060
3061 case EIOCGSTATS:
3062 if (len != sizeof(struct rr_stats))
3063 error = EMSGSIZE;
3064 else
3065 error = copyout((void *) &sc->sc_gen_info->ri_stats,
3066 data, sizeof(struct rr_stats));
3067 break;
3068
3069 case EIOCGEEPROM:
3070 case EIOCSEEPROM:
3071 if ((ifp->if_flags & IFF_UP) != 0) {
3072 error = EBUSY;
3073 break;
3074 }
3075
3076 if (len != sizeof(struct rr_eeprom)) {
3077 error = EMSGSIZE;
3078 break;
3079 }
3080
3081 error = copyin(data, (void *) &rr_eeprom, sizeof(rr_eeprom));
3082 if (error != 0)
3083 break;
3084
3085 offset = rr_eeprom.ifr_offset;
3086 length = rr_eeprom.ifr_length;
3087
3088 if (length > RR_EE_MAX_LEN * sizeof(u_int32_t)) {
3089 error = EFBIG;
3090 break;
3091 }
3092
3093 if (offset + length > RR_EE_MAX_LEN * sizeof(u_int32_t)) {
3094 error = EFAULT;
3095 break;
3096 }
3097
3098 if (offset % 4 || length % 4) {
3099 error = EIO;
3100 break;
3101 }
3102
3103 /* Halt the processor (preserve NO_SWAP, if set) */
3104
3105 misc_host_ctl = bus_space_read_4(iot, ioh, RR_MISC_HOST_CTL);
3106 bus_space_write_4(iot, ioh, RR_MISC_HOST_CTL,
3107 (misc_host_ctl & RR_MH_NO_SWAP) |
3108 RR_MH_HALT_PROC);
3109
3110 /* Make the EEPROM accessible */
3111
3112 misc_local_ctl = bus_space_read_4(iot, ioh, RR_MISC_LOCAL_CTL);
3113 value = misc_local_ctl &
3114 ~(RR_LC_FAST_PROM | RR_LC_ADD_SRAM | RR_LC_PARITY_ON);
3115 if (cmd == EIOCSEEPROM) /* make writable! */
3116 value |= RR_LC_WRITE_PROM;
3117 bus_space_write_4(iot, ioh, RR_MISC_LOCAL_CTL, value);
3118
3119 if (cmd == EIOCSEEPROM) {
3120 printf("%s: writing EEPROM\n", device_xname(&sc->sc_dev));
3121 sc->sc_flags |= ESH_FL_EEPROM_BUSY;
3122 }
3123
3124 /* Do that EEPROM voodoo that you do so well... */
3125
3126 address = offset * RR_EE_BYTE_LEN;
3127 for (i = 0; i < length; i += 4) {
3128 if (cmd == EIOCGEEPROM) {
3129 value = esh_read_eeprom(sc, address);
3130 address += RR_EE_WORD_LEN;
3131 if (copyout(&value,
3132 (char *) rr_eeprom.ifr_buffer + i,
3133 sizeof(u_int32_t)) != 0) {
3134 error = EFAULT;
3135 break;
3136 }
3137 } else {
3138 if (copyin((char *) rr_eeprom.ifr_buffer + i,
3139 &value, sizeof(u_int32_t)) != 0) {
3140 error = EFAULT;
3141 break;
3142 }
3143 if (esh_write_eeprom(sc, address,
3144 value) != 0) {
3145 error = EIO;
3146 break;
3147 }
3148
3149 /*
3150 * Have to give up control now and
3151 * then, so sleep for a clock tick.
3152 * Might be good to figure out how
3153 * long a tick is, so that we could
3154 * intelligently chose the frequency
3155 * of these pauses.
3156 */
3157
3158 if (i % 40 == 0) {
3159 tsleep(&sc->sc_flags,
3160 PRIBIO, "eshweeprom", 1);
3161 }
3162
3163 address += RR_EE_WORD_LEN;
3164 }
3165 }
3166
3167 bus_space_write_4(iot, ioh, RR_MISC_LOCAL_CTL, misc_local_ctl);
3168 if (cmd == EIOCSEEPROM) {
3169 sc->sc_flags &= ~ESH_FL_EEPROM_BUSY;
3170 wakeup(&sc->sc_flags);
3171 printf("%s: done writing EEPROM\n",
3172 device_xname(&sc->sc_dev));
3173 }
3174 break;
3175
3176 case EIOCRESET:
3177 eshreset(sc);
3178 break;
3179
3180 default:
3181 error = EINVAL;
3182 break;
3183 }
3184
3185 return error;
3186 }
3187
3188
3189 void
3190 eshreset(struct esh_softc *sc)
3191 {
3192 int s;
3193
3194 s = splnet();
3195 eshstop(sc);
3196 eshinit(sc);
3197 splx(s);
3198 }
3199
3200 /*
3201 * The NIC expects a watchdog command every 10 seconds. If it doesn't
3202 * get the watchdog, it figures the host is dead and stops. When it does
3203 * get the command, it'll generate a watchdog event to let the host know
3204 * that it is still alive. We watch for this.
3205 */
3206
3207 void
3208 eshwatchdog(struct ifnet *ifp)
3209 {
3210 struct esh_softc *sc = ifp->if_softc;
3211
3212 if (!sc->sc_watchdog) {
3213 printf("%s: watchdog timer expired. "
3214 "Should reset interface!\n",
3215 device_xname(&sc->sc_dev));
3216 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
3217 eshstatus(sc);
3218 #if 0
3219 eshstop(sc); /* DON'T DO THIS, it'll clear data we
3220 could use to debug it! */
3221 #endif
3222 } else {
3223 sc->sc_watchdog = 0;
3224
3225 esh_send_cmd(sc, RR_CC_WATCHDOG, 0, 0);
3226 ifp->if_timer = 5;
3227 }
3228 }
3229
3230
3231 /*
3232 * Stop the NIC and throw away packets that have started to be sent,
3233 * but didn't make it all the way. Re-adjust the various queue
3234 * pointers to account for this.
3235 */
3236
3237 void
3238 eshstop(struct esh_softc *sc)
3239 {
3240 struct ifnet *ifp = &sc->sc_if;
3241 bus_space_tag_t iot = sc->sc_iot;
3242 bus_space_handle_t ioh = sc->sc_ioh;
3243 u_int32_t misc_host_ctl;
3244 int i;
3245
3246 if (!(sc->sc_flags & ESH_FL_INITIALIZED))
3247 return;
3248
3249 /* Just shut it all down. This isn't pretty, but it works */
3250
3251 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma, 0, sc->sc_dma_size,
3252 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
3253
3254 misc_host_ctl = bus_space_read_4(iot, ioh, RR_MISC_HOST_CTL);
3255 bus_space_write_4(iot, ioh, RR_MISC_HOST_CTL,
3256 (misc_host_ctl & RR_MH_NO_SWAP) | RR_MH_HALT_PROC);
3257 sc->sc_flags = 0;
3258 ifp->if_timer = 0; /* turn off watchdog timer */
3259
3260 while (sc->sc_snap_recv.ec_consumer
3261 != sc->sc_snap_recv.ec_producer) {
3262 struct mbuf *m0;
3263 u_int16_t offset = sc->sc_snap_recv.ec_consumer;
3264
3265 bus_dmamap_unload(sc->sc_dmat,
3266 sc->sc_snap_recv.ec_dma[offset]);
3267 MFREE(sc->sc_snap_recv.ec_m[offset], m0);
3268 sc->sc_snap_recv.ec_m[offset] = NULL;
3269 sc->sc_snap_recv.ec_consumer =
3270 NEXT_RECV(sc->sc_snap_recv.ec_consumer);
3271 wakeup((void *) &sc->sc_snap_recv);
3272 }
3273
3274 /* Handle FP rings */
3275
3276 for (i = 0; i < RR_ULP_COUNT; i++) {
3277 struct esh_fp_ring_ctl *ring = sc->sc_fp_recv[i];
3278 struct esh_dmainfo *di = NULL;
3279
3280 if (ring == NULL)
3281 continue;
3282
3283 /* Get rid of outstanding buffers */
3284
3285 esh_dma_sync(sc, ring->ec_descr,
3286 ring->ec_consumer, ring->ec_producer,
3287 RR_FP_RECV_RING_SIZE, sizeof(struct rr_descr), 0,
3288 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
3289
3290 while (ring->ec_consumer != ring->ec_producer) {
3291 di = ring->ec_dmainfo[ring->ec_consumer];
3292 if (di != NULL)
3293 break;
3294 ring->ec_consumer = NEXT_RECV(ring->ec_consumer);
3295 }
3296 if (di == NULL)
3297 di = ring->ec_cur_dmainfo;
3298
3299 if (di != NULL) {
3300 bus_dmamap_unload(sc->sc_dmat, di->ed_dma);
3301 di->ed_error = EIO;
3302 di->ed_flags = 0;
3303 wakeup((void *) &di->ed_flags); /* packet discard */
3304 wakeup((void *) di); /* wait on read */
3305 }
3306 wakeup((void *) &ring->ec_ulp); /* ring create */
3307 wakeup((void *) &ring->ec_index); /* ring disable */
3308 }
3309
3310 /* XXX: doesn't clear bufs being sent */
3311
3312 bus_dmamap_unload(sc->sc_dmat, sc->sc_send.ec_dma);
3313 if (sc->sc_send.ec_cur_mbuf) {
3314 m_freem(sc->sc_send.ec_cur_mbuf);
3315 } else if (sc->sc_send.ec_cur_buf) {
3316 struct buf *bp = sc->sc_send.ec_cur_buf;
3317
3318 bp->b_resid = bp->b_bcount;
3319 bp->b_error = EIO;
3320 biodone(bp);
3321 } else if (sc->sc_send.ec_cur_dmainfo) {
3322 struct esh_dmainfo *di = sc->sc_send.ec_cur_dmainfo;
3323
3324 di->ed_flags &= ~ESH_DI_BUSY;
3325 di->ed_error = EIO;
3326 wakeup((void *) di);
3327 }
3328 sc->sc_send.ec_cur_mbuf = NULL;
3329 sc->sc_send.ec_cur_buf = NULL;
3330 sc->sc_send.ec_cur_dmainfo = NULL;
3331
3332 /*
3333 * Clear out the index values, since they'll be useless
3334 * when we restart.
3335 */
3336
3337 memset(sc->sc_fp_recv_index, 0,
3338 sizeof(struct esh_fp_ring_ctl *) * RR_MAX_RECV_RING);
3339
3340 /* Be sure to wake up any other processes waiting on driver action. */
3341
3342 wakeup(sc); /* Wait on initialization */
3343 wakeup(&sc->sc_flags); /* Wait on EEPROM write */
3344
3345 /*
3346 * XXX: I have to come up with a way to avoid handling interrupts
3347 * received before this shuts down the card, but processed
3348 * afterwards!
3349 */
3350 }
3351
3352 /*
3353 * Read a value from the eeprom. This expects that the NIC has already
3354 * been tweaked to put it into the right state for reading from the
3355 * EEPROM -- the HALT bit is set in the MISC_HOST_CTL register,
3356 * and the FAST_PROM, ADD_SRAM, and PARITY flags have been cleared
3357 * in the MISC_LOCAL_CTL register.
3358 *
3359 * The EEPROM layout is a little weird. There is a valid byte every
3360 * eight bytes. Words are then smeared out over 32 bytes.
3361 * All addresses listed here are the actual starting addresses.
3362 */
3363
3364 static u_int32_t
3365 esh_read_eeprom(struct esh_softc *sc, u_int32_t addr)
3366 {
3367 int i;
3368 u_int32_t tmp;
3369 u_int32_t value = 0;
3370
3371 /* If the offset hasn't been added, add it. Otherwise pass through */
3372
3373 if (!(addr & RR_EE_OFFSET))
3374 addr += RR_EE_OFFSET;
3375
3376 for (i = 0; i < 4; i++, addr += RR_EE_BYTE_LEN) {
3377 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
3378 RR_WINDOW_BASE, addr);
3379 tmp = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
3380 RR_WINDOW_DATA);
3381 value = (value << 8) | ((tmp >> 24) & 0xff);
3382 }
3383 return value;
3384 }
3385
3386
3387 /*
3388 * Write a value to the eeprom. Just like esh_read_eeprom, this routine
3389 * expects that the NIC has already been tweaked to put it into the right
3390 * state for reading from the EEPROM. Things are further complicated
3391 * in that we need to read each byte after we write it to ensure that
3392 * the new value has been successfully written. It can take as long
3393 * as 1ms (!) to write a byte.
3394 */
3395
3396 static int
3397 esh_write_eeprom(struct esh_softc *sc, u_int32_t addr, u_int32_t value)
3398 {
3399 int i, j;
3400 u_int32_t shifted_value, tmp = 0;
3401
3402 /* If the offset hasn't been added, add it. Otherwise pass through */
3403
3404 if (!(addr & RR_EE_OFFSET))
3405 addr += RR_EE_OFFSET;
3406
3407 for (i = 0; i < 4; i++, addr += RR_EE_BYTE_LEN) {
3408 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
3409 RR_WINDOW_BASE, addr);
3410
3411 /*
3412 * Get the byte out of value, starting with the top, and
3413 * put it into the top byte of the word to write.
3414 */
3415
3416 shifted_value = ((value >> ((3 - i) * 8)) & 0xff) << 24;
3417 bus_space_write_4(sc->sc_iot, sc->sc_ioh, RR_WINDOW_DATA,
3418 shifted_value);
3419 for (j = 0; j < 50; j++) {
3420 tmp = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
3421 RR_WINDOW_DATA);
3422 if (tmp == shifted_value)
3423 break;
3424 delay(500); /* 50us break * 20 = 1ms */
3425 }
3426 if (tmp != shifted_value)
3427 return -1;
3428 }
3429
3430 return 0;
3431 }
3432
3433
3434 /*
3435 * Send a command to the NIC. If there is no room in the command ring,
3436 * panic.
3437 */
3438
3439 static void
3440 esh_send_cmd(struct esh_softc *sc, u_int8_t cmd, u_int8_t ring, u_int8_t index)
3441 {
3442 union rr_cmd c;
3443
3444 #define NEXT_CMD(i) (((i) + 0x10 - 1) & 0x0f)
3445
3446 c.l = 0;
3447 c.b.rc_code = cmd;
3448 c.b.rc_ring = ring;
3449 c.b.rc_index = index;
3450
3451 bus_space_write_4(sc->sc_iot, sc->sc_ioh,
3452 RR_COMMAND_RING + sizeof(c) * sc->sc_cmd_producer,
3453 c.l);
3454
3455 #ifdef ESH_PRINTF
3456 /* avoid annoying messages when possible */
3457 if (cmd != RR_CC_WATCHDOG)
3458 printf("esh_send_cmd: cmd %x ring %d index %d slot %x\n",
3459 cmd, ring, index, sc->sc_cmd_producer);
3460 #endif
3461
3462 sc->sc_cmd_producer = NEXT_CMD(sc->sc_cmd_producer);
3463 }
3464
3465
3466 /*
3467 * Write an address to the device.
3468 * XXX: This belongs in bus-dependent land!
3469 */
3470
3471 static void
3472 esh_write_addr(bus_space_tag_t iot, bus_space_handle_t ioh, bus_addr_t addr, bus_addr_t value)
3473 {
3474 bus_space_write_4(iot, ioh, addr, 0);
3475 bus_space_write_4(iot, ioh, addr + sizeof(u_int32_t), value);
3476 }
3477
3478
3479 /* Copy the RunCode from EEPROM to SRAM. Ughly. */
3480
3481 static void
3482 esh_reset_runcode(struct esh_softc *sc)
3483 {
3484 bus_space_tag_t iot = sc->sc_iot;
3485 bus_space_handle_t ioh = sc->sc_ioh;
3486 u_int32_t value;
3487 u_int32_t len;
3488 u_int32_t i;
3489 u_int32_t segments;
3490 u_int32_t ee_addr;
3491 u_int32_t rc_addr;
3492 u_int32_t sram_addr;
3493
3494 /* Zero the SRAM */
3495
3496 for (i = 0; i < sc->sc_sram_size; i += 4) {
3497 bus_space_write_4(iot, ioh, RR_WINDOW_BASE, i);
3498 bus_space_write_4(iot, ioh, RR_WINDOW_DATA, 0);
3499 }
3500
3501 /* Find the address of the segment description section */
3502
3503 rc_addr = esh_read_eeprom(sc, RR_EE_RUNCODE_SEGMENTS);
3504 segments = esh_read_eeprom(sc, rc_addr);
3505
3506 for (i = 0; i < segments; i++) {
3507 rc_addr += RR_EE_WORD_LEN;
3508 sram_addr = esh_read_eeprom(sc, rc_addr);
3509 rc_addr += RR_EE_WORD_LEN;
3510 len = esh_read_eeprom(sc, rc_addr);
3511 rc_addr += RR_EE_WORD_LEN;
3512 ee_addr = esh_read_eeprom(sc, rc_addr);
3513
3514 while (len--) {
3515 value = esh_read_eeprom(sc, ee_addr);
3516 bus_space_write_4(iot, ioh, RR_WINDOW_BASE, sram_addr);
3517 bus_space_write_4(iot, ioh, RR_WINDOW_DATA, value);
3518
3519 ee_addr += RR_EE_WORD_LEN;
3520 sram_addr += 4;
3521 }
3522 }
3523 }
3524
3525
3526 /*
3527 * Perform bus DMA syncing operations on various rings.
3528 * We have to worry about our relative position in the ring,
3529 * and whether the ring has wrapped. All of this code should take
3530 * care of those worries.
3531 */
3532
3533 static void
3534 esh_dma_sync(struct esh_softc *sc, void *mem, int start, int end, int entries, int size, int do_equal, int ops)
3535 {
3536 int offset = (char *)mem - (char *)sc->sc_dma_addr;
3537
3538 if (start < end) {
3539 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma,
3540 offset + start * size,
3541 (end - start) * size, ops);
3542 } else if (do_equal || start != end) {
3543 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma,
3544 offset,
3545 end * size, ops);
3546 bus_dmamap_sync(sc->sc_dmat, sc->sc_dma,
3547 offset + start * size,
3548 (entries - start) * size, ops);
3549 }
3550 }
3551
3552
3553 static struct esh_dmainfo *
3554 esh_new_dmainfo(struct esh_softc *sc)
3555 {
3556 struct esh_dmainfo *di;
3557 int s;
3558
3559 s = splnet();
3560
3561 di = TAILQ_FIRST(&sc->sc_dmainfo_freelist);
3562 if (di != NULL) {
3563 TAILQ_REMOVE(&sc->sc_dmainfo_freelist, di, ed_list);
3564 sc->sc_dmainfo_freelist_count--;
3565 splx(s);
3566 return di;
3567 }
3568
3569 /* None sitting around, so build one now... */
3570
3571 di = (struct esh_dmainfo *) malloc(sizeof(*di), M_DEVBUF,
3572 M_WAITOK|M_ZERO);
3573 assert(di != NULL);
3574
3575 if (bus_dmamap_create(sc->sc_dmat, ESH_MAX_NSEGS * RR_DMA_MAX,
3576 ESH_MAX_NSEGS, RR_DMA_MAX, RR_DMA_BOUNDARY,
3577 BUS_DMA_ALLOCNOW | BUS_DMA_WAITOK,
3578 &di->ed_dma)) {
3579 printf("%s: failed dmainfo bus_dmamap_create\n",
3580 device_xname(&sc->sc_dev));
3581 free(di, M_DEVBUF);
3582 di = NULL;
3583 }
3584
3585 splx(s);
3586 return di;
3587 }
3588
3589 static void
3590 esh_free_dmainfo(struct esh_softc *sc, struct esh_dmainfo *di)
3591 {
3592 int s = splnet();
3593
3594 assert(di != NULL);
3595 di->ed_buf = NULL;
3596 TAILQ_INSERT_TAIL(&sc->sc_dmainfo_freelist, di, ed_list);
3597 sc->sc_dmainfo_freelist_count++;
3598 #ifdef ESH_PRINTF
3599 printf("esh_free_dmainfo: freelist count %d\n", sc->sc_dmainfo_freelist_count);
3600 #endif
3601
3602 splx(s);
3603 }
3604
3605
3606 /* ------------------------- debugging functions --------------------------- */
3607
3608 /*
3609 * Print out status information about the NIC and the driver.
3610 */
3611
3612 static int
3613 eshstatus(struct esh_softc *sc)
3614 {
3615 bus_space_tag_t iot = sc->sc_iot;
3616 bus_space_handle_t ioh = sc->sc_ioh;
3617 int i;
3618
3619 /* XXX: This looks pathetic, and should be improved! */
3620
3621 printf("%s: status -- fail1 %x fail2 %x\n",
3622 device_xname(&sc->sc_dev),
3623 bus_space_read_4(iot, ioh, RR_RUNCODE_FAIL1),
3624 bus_space_read_4(iot, ioh, RR_RUNCODE_FAIL2));
3625 printf("\tmisc host ctl %x misc local ctl %x\n",
3626 bus_space_read_4(iot, ioh, RR_MISC_HOST_CTL),
3627 bus_space_read_4(iot, ioh, RR_MISC_LOCAL_CTL));
3628 printf("\toperating mode %x event producer %x\n",
3629 bus_space_read_4(iot, ioh, RR_MODE_AND_STATUS),
3630 bus_space_read_4(iot, ioh, RR_EVENT_PRODUCER));
3631 printf("\tPC %x max rings %x\n",
3632 bus_space_read_4(iot, ioh, RR_PROC_PC),
3633 bus_space_read_4(iot, ioh, RR_MAX_RECV_RINGS));
3634 printf("\tHIPPI tx state %x rx state %x\n",
3635 bus_space_read_4(iot, ioh, RR_TX_STATE),
3636 bus_space_read_4(iot, ioh, RR_RX_STATE));
3637 printf("\tDMA write state %x read state %x\n",
3638 bus_space_read_4(iot, ioh, RR_DMA_WRITE_STATE),
3639 bus_space_read_4(iot, ioh, RR_DMA_READ_STATE));
3640 printf("\tDMA write addr %x%x read addr %x%x\n",
3641 bus_space_read_4(iot, ioh, RR_WRITE_HOST),
3642 bus_space_read_4(iot, ioh, RR_WRITE_HOST + 4),
3643 bus_space_read_4(iot, ioh, RR_READ_HOST),
3644 bus_space_read_4(iot, ioh, RR_READ_HOST + 4));
3645
3646 for (i = 0; i < 64; i++)
3647 if (sc->sc_gen_info->ri_stats.rs_stats[i])
3648 printf("stat %x is %x\n", i * 4,
3649 sc->sc_gen_info->ri_stats.rs_stats[i]);
3650
3651 return 0;
3652 }
3653
3654
3655 #ifdef ESH_PRINTF
3656
3657 /* Check to make sure that the NIC is still running */
3658
3659 static int
3660 esh_check(struct esh_softc *sc)
3661 {
3662 bus_space_tag_t iot = sc->sc_iot;
3663 bus_space_handle_t ioh = sc->sc_ioh;
3664
3665 if (bus_space_read_4(iot, ioh, RR_MISC_HOST_CTL) & RR_MH_HALT_PROC) {
3666 printf("esh_check: NIC stopped\n");
3667 eshstatus(sc);
3668 return 1;
3669 } else {
3670 return 0;
3671 }
3672 }
3673 #endif
3674
NetBSD on the FriendlyARM MINI2440