1 /* $NetBSD: dpt_isa.c,v 1.19 2009/05/12 08:44:19 cegger Exp $ */
4 * Copyright (c) 1999, 2000, 2001 Andrew Doran <ad@NetBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * ISA front-end for DPT EATA SCSI driver.
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: dpt_isa.c,v 1.19 2009/05/12 08:44:19 cegger Exp $");
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/device.h>
40 #include <sys/queue.h>
45 #include <dev/scsipi/scsipi_all.h>
46 #include <dev/scsipi/scsiconf.h>
48 #include <dev/isa/isareg.h>
49 #include <dev/isa/isavar.h>
51 #include <dev/isa/isadmareg.h>
52 #include <dev/isa/isadmavar.h>
54 #include <dev/ic/dptreg.h>
55 #include <dev/ic/dptvar.h>
57 #include <dev/i2o/dptivar.h>
59 #define DPT_ISA_IOSIZE 16
60 #define DPT_ISA_MAXCCBS 16
62 static void dpt_isa_attach(device_t
, device_t
, void *);
63 static int dpt_isa_match(device_t
, cfdata_t
, void *);
64 static int dpt_isa_probe(struct isa_attach_args
*, int);
65 static int dpt_isa_wait(bus_space_handle_t
, bus_space_tag_t
, u_int8_t
,
68 CFATTACH_DECL(dpt_isa
, sizeof(struct dpt_softc
),
69 dpt_isa_match
, dpt_isa_attach
, NULL
, NULL
);
71 /* Try 'less intrusive' addresses first */
72 static const int dpt_isa_iobases
[] = { 0x230, 0x330, 0x1f0, 0x170, 0 };
75 * Wait for the HBA status register to reach a specific state.
78 dpt_isa_wait(bus_space_handle_t ioh
, bus_space_tag_t iot
, u_int8_t mask
,
83 for (ms
= 2000 * 10; ms
; ms
--) {
84 if ((bus_space_read_1(iot
, ioh
, HA_STATUS
) & mask
) == state
)
93 * Match a supported board.
96 dpt_isa_match(device_t parent
, cfdata_t match
, void *aux
)
98 struct isa_attach_args
*ia
= aux
;
108 if (ISA_DIRECT_CONFIG(ia
))
111 if (ia
->ia_io
[0].ir_addr
!= ISA_UNKNOWN_PORT
)
112 return (dpt_isa_probe(ia
, ia
->ia_io
[0].ir_addr
));
114 for (i
= 0; dpt_isa_iobases
[i
] != 0; i
++) {
115 if (dpt_isa_probe(ia
, dpt_isa_iobases
[i
])) {
116 ia
->ia_io
[0].ir_addr
= dpt_isa_iobases
[i
];
125 * Probe for a supported board.
128 dpt_isa_probe(struct isa_attach_args
*ia
, int iobase
)
131 bus_space_handle_t ioh
;
133 int i
, j
, stat
, irq
, drq
;
138 if (bus_space_map(iot
, iobase
, DPT_ISA_IOSIZE
, 0, &ioh
) != 0)
142 * Assumuing the DPT BIOS reset the board, we shouldn't need to
143 * re-do it here. The tests below should weed out non-EATA devices
144 * before we start poking any registers.
146 for (i
= 1000; i
; i
--) {
147 if ((bus_space_read_1(iot
, ioh
, HA_STATUS
) & HA_ST_READY
) != 0)
155 while((((stat
= bus_space_read_1(iot
, ioh
, HA_STATUS
))
156 != (HA_ST_READY
|HA_ST_SEEK_COMPLETE
))
157 && (stat
!= (HA_ST_READY
|HA_ST_SEEK_COMPLETE
|HA_ST_ERROR
))
158 && (stat
!= (HA_ST_READY
|HA_ST_SEEK_COMPLETE
|HA_ST_ERROR
|HA_ST_DRQ
)))
159 || (dpt_isa_wait(ioh
, iot
, HA_ST_BUSY
, 0)))
160 /* RAID drives still spinning up? */
161 if (bus_space_read_1(iot
, ioh
, HA_ERROR
) != 'D' ||
162 bus_space_read_1(iot
, ioh
, HA_ERROR
+ 1) != 'P' ||
163 bus_space_read_1(iot
, ioh
, HA_ERROR
+ 2) != 'T')
167 * At this point we can be confident that we are dealing with a DPT
168 * HBA. Issue the read-config command and wait for the data to
169 * appear. XXX We shouldn't be doing this with PIO, but it makes it
170 * a lot easier as no DMA setup is required.
172 bus_space_write_1(iot
, ioh
, HA_COMMAND
, CP_PIO_GETCFG
);
173 memset(&ec
, 0, sizeof(ec
));
174 i
= ((int)&((struct eata_cfg
*)0)->ec_cfglen
+
175 sizeof(ec
.ec_cfglen
)) >> 1;
176 p
= (u_int16_t
*)&ec
;
178 if (dpt_isa_wait(ioh
, iot
, 0xFF, HA_ST_DATA_RDY
))
183 *p
++ = bus_space_read_stream_2(iot
, ioh
, HA_DATA
);
185 if ((i
= ec
.ec_cfglen
) > (sizeof(struct eata_cfg
)
186 - (int)(&(((struct eata_cfg
*)0L)->ec_cfglen
))
187 - sizeof(ec
.ec_cfglen
)))
188 i
= sizeof(struct eata_cfg
)
189 - (int)(&(((struct eata_cfg
*)0L)->ec_cfglen
))
190 - sizeof(ec
.ec_cfglen
);
192 j
= i
+ (int)(&(((struct eata_cfg
*)0L)->ec_cfglen
)) +
193 sizeof(ec
.ec_cfglen
);
197 *p
++ = bus_space_read_stream_2(iot
, ioh
, HA_DATA
);
199 /* Flush until we have read 512 bytes. */
200 i
= (512 - j
+ 1) >> 1;
202 bus_space_read_stream_2(iot
, ioh
, HA_DATA
);
204 /* Puke if we don't like the returned configuration data. */
205 if ((bus_space_read_1(iot
, ioh
, HA_STATUS
) & HA_ST_ERROR
) != 0 ||
206 memcmp(ec
.ec_eatasig
, "EATA", 4) != 0 ||
207 (ec
.ec_feat0
& (EC_F0_HBA_VALID
| EC_F0_DMA_SUPPORTED
)) !=
208 (EC_F0_HBA_VALID
| EC_F0_DMA_SUPPORTED
))
212 * Which DMA channel to use: if it was hardwired in the kernel
213 * configuration, use that value. If the HBA told us, use that
214 * value. Otherwise, puke.
216 if ((drq
= ia
->ia_drq
[0].ir_drq
) == ISA_UNKNOWN_DRQ
) {
217 int dmanum
= ((ec
.ec_feat1
& EC_F1_DMA_NUM_MASK
) >>
218 EC_F1_DMA_NUM_SHIFT
);
220 if ((ec
.ec_feat0
& EC_F0_DMA_NUM_VALID
) == 0 || dmanum
> 3)
222 drq
= "\0\7\6\5"[dmanum
];
226 * Which IRQ to use: if it was hardwired in the kernel configuration,
227 * use that value. Otherwise, use what the HBA told us.
229 if ((irq
= ia
->ia_irq
[0].ir_irq
) == ISA_UNKNOWN_IRQ
)
230 irq
= ((ec
.ec_feat1
& EC_F1_IRQ_NUM_MASK
) >>
231 EC_F1_IRQ_NUM_SHIFT
);
234 ia
->ia_io
[0].ir_size
= DPT_ISA_IOSIZE
;
237 ia
->ia_irq
[0].ir_irq
= irq
;
240 ia
->ia_drq
[0].ir_drq
= drq
;
244 bus_space_unmap(iot
, ioh
, DPT_ISA_IOSIZE
);
247 bus_space_unmap(iot
, ioh
, DPT_ISA_IOSIZE
);
252 * Attach a matched board.
255 dpt_isa_attach(device_t parent
, device_t self
, void *aux
)
257 struct isa_attach_args
*ia
;
258 isa_chipset_tag_t ic
;
259 bus_space_handle_t ioh
;
261 struct dpt_softc
*sc
;
266 sc
= (struct dpt_softc
*)self
;
272 if ((error
= bus_space_map(iot
, ia
->ia_io
[0].ir_addr
, DPT_ISA_IOSIZE
,
274 printf("can't map i/o space, error = %d\n", error
);
280 sc
->sc_dmat
= ia
->ia_dmat
;
282 if ((error
= isa_dmacascade(ic
, ia
->ia_drq
[0].ir_drq
)) != 0) {
283 printf("unable to cascade DRQ, error = %d\n", error
);
287 /* Establish the interrupt. */
288 sc
->sc_ih
= isa_intr_establish(ic
, ia
->ia_irq
[0].ir_irq
, IST_EDGE
,
289 IPL_BIO
, dpt_intr
, sc
);
290 if (sc
->sc_ih
== NULL
) {
291 printf("can't establish interrupt\n");
295 if (dpt_readcfg(sc
)) {
296 printf("readcfg failed - see dpt(4)\n");
301 * Now attach to the bus-independent code. XXX We need to force
302 * parameters that aren't filled in by some ISA boards. In
303 * particular, due to the limited amount of memory we have to play
304 * with for DMA, clamp the number of CCBs to 16.
308 if (be16toh(*(int16_t *)ec
->ec_queuedepth
) > DPT_ISA_MAXCCBS
)
309 *(int16_t *)ec
->ec_queuedepth
= htobe16(DPT_ISA_MAXCCBS
);
310 if (ec
->ec_maxlun
== 0)
312 if ((ec
->ec_feat3
& EC_F3_MAX_TARGET_MASK
) >> EC_F3_MAX_TARGET_SHIFT
314 ec
->ec_feat3
= (ec
->ec_feat3
& ~EC_F3_MAX_TARGET_MASK
) |
315 (7 << EC_F3_MAX_TARGET_SHIFT
);
317 sc
->sc_bustype
= SI_ISA_BUS
;
318 sc
->sc_isaport
= ia
->ia_io
[0].ir_addr
;
319 sc
->sc_isairq
= ia
->ia_irq
[0].ir_irq
;
320 sc
->sc_isadrq
= ia
->ia_drq
[0].ir_drq
;