2 * Copyright (c) 1997, 1999 Hellmuth Michaelis. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 *---------------------------------------------------------------------------
27 * i4b_usr_sti.c - USRobotics Sportster ISDN TA intern (Tina-pp)
28 * -------------------------------------------------------------
30 * $Id: isic_isa_usr_sti.c,v 1.8 2007/10/19 12:00:20 ad Exp $
32 * last edit-date: [Fri Jan 5 11:37:22 2001]
34 *---------------------------------------------------------------------------*/
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: isic_isa_usr_sti.c,v 1.7 2007/03/04 06:02:13 christos Exp $");
39 #include "opt_isicisa.h"
40 #ifdef ISICISA_USR_STI
42 #include <sys/param.h>
43 #if defined(__FreeBSD__) && __FreeBSD__ >= 3
44 #include <sys/ioccom.h>
46 #include <sys/ioctl.h>
48 #include <sys/kernel.h>
49 #include <sys/systm.h>
52 #if defined(__NetBSD__) && __NetBSD_Version__ >= 104230000
53 #include <sys/callout.h>
57 #include <machine/clock.h>
58 #include <i386/isa/isa_device.h>
61 #include <sys/device.h>
64 #include <sys/socket.h>
68 #include <machine/i4b_debug.h>
69 #include <machine/i4b_ioctl.h>
71 #include <netisdn/i4b_global.h>
72 #include <netisdn/i4b_debug.h>
73 #include <netisdn/i4b_ioctl.h>
74 #include <netisdn/i4b_l2.h>
75 #include <netisdn/i4b_l1l2.h>
78 #include <dev/ic/isic_l1.h>
79 #include <dev/ic/isac.h>
80 #include <dev/ic/hscx.h>
82 #include <netisdn/i4b_global.h>
84 /*---------------------------------------------------------------------------*
85 * USR Sportster TA intern special registers
86 *---------------------------------------------------------------------------*/
87 #define USR_HSCXA_OFF 0x0000
88 #define USR_HSCXB_OFF 0x4000
89 #define USR_INTL_OFF 0x8000
90 #define USR_ISAC_OFF 0xc000
92 #define USR_RES_BIT 0x80 /* 0 = normal, 1 = reset ISAC/HSCX */
93 #define USR_INTE_BIT 0x40 /* 0 = IRQ disabled, 1 = IRQ's enabled */
94 #define USR_IL_MASK 0x07 /* IRQ level config */
96 static u_char intr_no
[] = { 0, 0, 0, 0, 0, 1, 0, 2, 0, 0, 3, 4, 5, 0, 6, 7 };
101 (((reg/4) * 1024) + ((reg%4) * 2))
103 /*---------------------------------------------------------------------------*
104 * USRobotics read fifo routine
105 *---------------------------------------------------------------------------*/
107 usrtai_read_fifo(void *buf
, const void *base
, size_t len
)
109 register int offset
= 0;
111 for(;len
> 0; len
--, offset
++)
112 *((u_char
*)buf
+ offset
) = inb((int)base
+ ADDR(offset
));
115 /*---------------------------------------------------------------------------*
116 * USRobotics write fifo routine
117 *---------------------------------------------------------------------------*/
119 usrtai_write_fifo(void *base
, const void *buf
, size_t len
)
121 register int offset
= 0;
123 for(;len
> 0; len
--, offset
++)
124 outb((int)base
+ ADDR(offset
), *((u_char
*)buf
+ offset
));
127 /*---------------------------------------------------------------------------*
128 * USRobotics write register routine
129 *---------------------------------------------------------------------------*/
131 usrtai_write_reg(u_char
*base
, u_int offset
, u_int v
)
133 outb((int)base
+ ADDR(offset
), (u_char
)v
);
136 /*---------------------------------------------------------------------------*
137 * USRobotics read register routine
138 *---------------------------------------------------------------------------*/
140 usrtai_read_reg(u_char
*base
, u_int offset
)
142 return(inb((int)base
+ ADDR(offset
)));
145 /*---------------------------------------------------------------------------*
146 * isic_probe_usrtai - probe for USR
147 *---------------------------------------------------------------------------*/
149 isic_probe_usrtai(struct isa_device
*dev
)
151 struct isic_softc
*sc
= &l1_sc
[dev
->id_unit
];
153 /* check max unit range */
155 if(dev
->id_unit
>= ISIC_MAXUNIT
)
157 printf("isic%d: Error, unit %d >= MAXUNIT for USR Sportster TA!\n",
158 dev
->id_unit
, dev
->id_unit
);
161 sc
->sc_unit
= dev
->id_unit
;
163 /* check IRQ validity */
165 if((intr_no
[ffs(dev
->id_irq
) - 1]) == 0)
167 printf("isic%d: Error, invalid IRQ [%d] specified for USR Sportster TA!\n",
168 dev
->id_unit
, (ffs(dev
->id_irq
))-1);
171 sc
->sc_irq
= dev
->id_irq
;
173 /* check if memory addr specified */
177 printf("isic%d: Error, mem addr 0x%lx specified for USR Sportster TA!\n",
178 dev
->id_unit
, (u_long
)dev
->id_maddr
);
183 /* check if we got an iobase */
185 switch(dev
->id_iobase
)
206 printf("isic%d: Error, invalid iobase 0x%x specified for USR Sportster TA!\n",
207 dev
->id_unit
, dev
->id_iobase
);
211 sc
->sc_port
= dev
->id_iobase
;
213 /* setup ISAC access routines */
216 sc
->readreg
= usrtai_read_reg
;
217 sc
->writereg
= usrtai_write_reg
;
219 sc
->readfifo
= usrtai_read_fifo
;
220 sc
->writefifo
= usrtai_write_fifo
;
222 /* setup card type */
224 sc
->sc_cardtyp
= CARD_TYPEP_USRTA
;
226 /* setup IOM bus type */
228 sc
->sc_bustyp
= BUS_TYPE_IOM2
;
231 sc
->sc_bfifolen
= HSCX_FIFO_LEN
;
233 /* setup ISAC and HSCX base addr */
235 ISAC_BASE
= (void *)dev
->id_iobase
+ USR_ISAC_OFF
;
236 HSCX_A_BASE
= (void *)dev
->id_iobase
+ USR_HSCXA_OFF
;
237 HSCX_B_BASE
= (void *)dev
->id_iobase
+ USR_HSCXB_OFF
;
240 * Read HSCX A/B VSTR. Expected value for USR Sportster TA based
241 * boards is 0x05 in the least significant bits.
244 if( ((HSCX_READ(0, H_VSTR
) & 0xf) != 0x5) ||
245 ((HSCX_READ(1, H_VSTR
) & 0xf) != 0x5) )
247 printf("isic%d: HSCX VSTR test failed for USR Sportster TA\n",
249 printf("isic%d: HSC0: VSTR: %#x\n",
250 dev
->id_unit
, HSCX_READ(0, H_VSTR
));
251 printf("isic%d: HSC1: VSTR: %#x\n",
252 dev
->id_unit
, HSCX_READ(1, H_VSTR
));
259 /*---------------------------------------------------------------------------*
260 * isic_attach_usrtai - attach USR
261 *---------------------------------------------------------------------------*/
263 isic_attach_usrtai(struct isa_device
*dev
)
267 /* reset the HSCX and ISAC chips */
269 outb(dev
->id_iobase
+ USR_INTL_OFF
, USR_RES_BIT
);
270 DELAY(SEC_DELAY
/ 10);
272 outb(dev
->id_iobase
+ USR_INTL_OFF
, 0x00);
273 DELAY(SEC_DELAY
/ 10);
277 if((irq
= intr_no
[ffs(dev
->id_irq
) - 1]) == 0)
279 printf("isic%d: Attach error, invalid IRQ [%d] specified for USR Sportster TA!\n",
280 dev
->id_unit
, ffs(dev
->id_irq
)-1);
284 /* configure and enable irq */
286 outb(dev
->id_iobase
+ USR_INTL_OFF
, irq
| USR_INTE_BIT
);
287 DELAY(SEC_DELAY
/ 10);
292 #else /* end of FreeBSD, start NetBSD */
295 * Use of sc->sc_maps:
296 * 0 : config register
297 * 1 - 16 : HSCX A registers
298 * 17 - 32 : HSCX B registers
299 * 33 - 48 : ISAC registers
302 #define USR_REG_OFFS(reg) ((reg % 4) * 2)
303 #define USR_HSCXA_MAP(reg) ((reg / 4) + 1)
304 #define USR_HSCXB_MAP(reg) ((reg / 4) + 17)
305 #define USR_ISAC_MAP(reg) ((reg / 4) + 33)
307 static int map_base
[] = { 33, 1, 17, 0 }; /* ISAC, HSCX A, HSCX B */
309 /*---------------------------------------------------------------------------*
310 * USRobotics read fifo routine
311 *---------------------------------------------------------------------------*/
313 usrtai_read_fifo(struct isic_softc
*sc
, int what
, void *buf
, size_t size
)
315 int map
, off
, offset
;
318 bus_space_handle_t h
;
320 for (offset
= 0; size
> 0; size
--, offset
++) {
321 map
= map_base
[what
] + (offset
/ 4);
322 t
= sc
->sc_maps
[map
].t
;
323 h
= sc
->sc_maps
[map
].h
;
324 off
= USR_REG_OFFS(offset
);
326 *p
++ = bus_space_read_1(t
, h
, off
);
330 /*---------------------------------------------------------------------------*
331 * USRobotics write fifo routine
332 *---------------------------------------------------------------------------*/
334 usrtai_write_fifo(struct isic_softc
*sc
, int what
, const void *buf
, size_t size
)
336 int map
, off
, offset
;
337 const u_char
* p
= buf
;
339 bus_space_handle_t h
;
342 for (offset
= 0; size
> 0; size
--, offset
++) {
343 map
= map_base
[what
] + (offset
/ 4);
344 t
= sc
->sc_maps
[map
].t
;
345 h
= sc
->sc_maps
[map
].h
;
346 off
= USR_REG_OFFS(offset
);
349 bus_space_write_1(t
, h
, off
, v
);
353 /*---------------------------------------------------------------------------*
354 * USRobotics write register routine
355 *---------------------------------------------------------------------------*/
357 usrtai_write_reg(struct isic_softc
*sc
, int what
, bus_size_t offs
, u_int8_t data
)
359 int map
= map_base
[what
] + (offs
/ 4),
360 off
= USR_REG_OFFS(offs
);
361 bus_space_tag_t t
= sc
->sc_maps
[map
].t
;
362 bus_space_handle_t h
= sc
->sc_maps
[map
].h
;
364 bus_space_write_1(t
, h
, off
, data
);
367 /*---------------------------------------------------------------------------*
368 * USRobotics read register routine
369 *---------------------------------------------------------------------------*/
371 usrtai_read_reg(struct isic_softc
*sc
, int what
, bus_size_t offs
)
373 int map
= map_base
[what
] + (offs
/ 4),
374 off
= USR_REG_OFFS(offs
);
375 bus_space_tag_t t
= sc
->sc_maps
[map
].t
;
376 bus_space_handle_t h
= sc
->sc_maps
[map
].h
;
378 return bus_space_read_1(t
, h
, off
);
381 /*---------------------------------------------------------------------------*
382 * isic_probe_usrtai - probe for USR
383 *---------------------------------------------------------------------------*/
385 isic_probe_usrtai(struct isic_attach_args
*ia
)
388 * Read HSCX A/B VSTR. Expected value for IOM2 based
389 * boards is 0x05 in the least significant bits.
392 if(((bus_space_read_1(ia
->ia_maps
[USR_HSCXA_MAP(H_VSTR
)].t
, ia
->ia_maps
[USR_HSCXA_MAP(H_VSTR
)].h
, USR_REG_OFFS(H_VSTR
)) & 0x0f) != 0x05) ||
393 ((bus_space_read_1(ia
->ia_maps
[USR_HSCXB_MAP(H_VSTR
)].t
, ia
->ia_maps
[USR_HSCXB_MAP(H_VSTR
)].h
, USR_REG_OFFS(H_VSTR
)) & 0x0f) != 0x05))
399 /*---------------------------------------------------------------------------*
400 * isic_attach_usrtai - attach USR
401 *---------------------------------------------------------------------------*/
403 isic_attach_usrtai(struct isic_softc
*sc
)
405 bus_space_tag_t t
= sc
->sc_maps
[0].t
;
406 bus_space_handle_t h
= sc
->sc_maps
[0].h
;
407 u_char irq
= intr_no
[sc
->sc_irq
];
410 sc
->readreg
= usrtai_read_reg
;
411 sc
->writereg
= usrtai_write_reg
;
413 sc
->readfifo
= usrtai_read_fifo
;
414 sc
->writefifo
= usrtai_write_fifo
;
416 /* setup card type */
418 sc
->sc_cardtyp
= CARD_TYPEP_USRTA
;
420 /* setup IOM bus type */
422 sc
->sc_bustyp
= BUS_TYPE_IOM2
;
425 sc
->sc_bfifolen
= HSCX_FIFO_LEN
;
427 /* reset the HSCX and ISAC chips */
429 bus_space_write_1(t
, h
, 0, USR_RES_BIT
);
430 DELAY(SEC_DELAY
/ 10);
432 bus_space_write_1(t
, h
, 0, 0x00);
433 DELAY(SEC_DELAY
/ 10);
437 bus_space_write_1(t
, h
, 0, irq
| USR_INTE_BIT
);
438 DELAY(SEC_DELAY
/ 10);
443 #endif /* __FreeBSD__ */
445 #endif /* ISICISA_USR_STI */