1 /* $NetBSD: espreg.h,v 1.1 2001/12/04 20:47:58 jdolecek Exp $ */
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33 * MCA NCR 53C90 86C01 DMA controller registers.
35 * Information got from Tymm Twillman <tymm@computer.org>'s
36 * Linux MCA NC53c90 driver drivers/scsi/mca_53c9x.c.
39 #define N86C01_CARDID_LOW 0x00 /* CardId, lower byte */
41 #define N86C01_CARDID_HIGH 0x01 /* CardId, high byte */
43 #define N86C01_MODE_ENABLE 0x02 /* Mode enable register */
44 #define N86C01_DATA_WIDTH 0x80 /* data width - 1=16 0=8 */
45 #define N86C01_INTR_ENABLE 0x40 /* enable inrerrupts 1=enable*/
46 #define N86C01_INTR_SELECT_MSK 0x30 /* IRQ select - see ADF */
47 #define N86C01_IOADDR_MSK 0x0e /* Base Address - see ADF */
48 #define N86C01_CARD_ENABLE 0x01 /* Card enable - 1=enabled */
50 #define N86C01_DMA_CTRL 0x03 /* DMA control */
51 #define N86C01_DMA_ENABLE 0x80 /* DMA enable - 1=enabled */
52 #define N86C01_PREEMPT_CNT_MSK 0x60
53 /* Preemt Count Select - number of transfers to complete after
54 * the chip is preempted on MCA bus
60 #define N86C01_FAIRNESS_EN 0x10 /* Fairness enable 1=enable */
61 #define N86C01_DMA_ARB_MSK 0x0f /* DMA Arbitration lvl */
63 #define N86C01_GENERAL 0x04 /* General purpose register */
64 /* Bits 7,6 apply to SCSI Id selection in ADF, 5-3 user definable, 2-0 reserv*/
66 #define N86C01_PIO 0x0a /* IO-based DMA, PIO */
68 #define N86C01_STATUS 0x0c /* Status */
69 #define N86C01_DMA_PEND 0x02 /* DMA pending 1=pending */
70 #define N86C01_IRQ_PEND 0x01 /* IRQ pending 0=pending */