sys/dev/pci/n8/include_private/n8_pk_common.h

   1 /*-
   2  * Copyright (C) 2001-2003 by NBMK Encryption Technologies.
   3  * All rights reserved.
   4  *
   5  * NBMK Encryption Technologies provides no support of any kind for
   6  * this software.  Questions or concerns about it may be addressed to
   7  * the members of the relevant open-source community at
   8  * <tech-crypto@netbsd.org>.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions are
  12  * met:
  13  *
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  *
  17  * 2. Redistributions in binary form must reproduce the above
  18  *    copyright notice, this list of conditions and the following
  19  *    disclaimer in the documentation and/or other materials provided
  20  *    with the distribution.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  23  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  24  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  25  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  26  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  28  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  32  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /*****************************************************************************
  36  * @(#) n8_pk_common.h 1.17@(#)
  37  *****************************************************************************/
  38
  39 /*****************************************************************************/
  40 /** @file n8_pk_common.h
  41  *  @brief #defs and typedefs used in accessing the Public Key Handler
  42  *
  43  * #defs and typedefs used in accessing the Public Key Handler.
  44  *
  45  *****************************************************************************/
  46
  47 /*****************************************************************************
  48  * Revision history:
  49  * 05/16/03 brr   Added PK_DH_CP_Byte_Length.
  50  * 05/15/03 brr   Added masks for command & bus errors.
  51  * 02/20/02 brr   Removed references to the queue structure.
  52  * 07/30/01 bac   Changed word size macros to take a queue control pointer.
  53  * 05/30/01 bac   Changed the macro BYTES_TO_PKDIGITS to correctly compute the
  54  *                number of digits by rounding up.
  55  * 05/22/01 dws   Reversed the order of data_addr_ms and data_addr_ls in
  56  *                PK_LDST_CMD_BLOCK_t.
  57  * 04/16/01 jke   moved status and return types to n8_enqueue_common.h
  58  *                and genericized for use in EA and PK
  59  * 04/05/01 bac   Added BYTES_TO_PKDIGITS and PKDIGITS_TO_BYTES
  60  * 03/30/01 dws   Removed the typdef for PK_BIGNUM_DIGIT.
  61  * 03/29/01 dws   Removed simulator-specific declarations.
  62  *                Changed uint32 to uint32_t.
  63  * 03/28/01 jke   copied from n8_pk.h
  64  ****************************************************************************/
  65
  66 #ifndef N8_PK_COMMON_H
  67 #define N8_PK_COMMON_H
  68
  69 #include "n8_common.h"
  70
  71 /* Public Key Processor Big Number Cache */
  72 #define PK_Bytes_Per_BigNum_Digit      (SIMON_BITS_PER_DIGIT / 8)
  73
  74 #define BYTES_TO_PKDIGITS(__B)    (((__B) + PK_Bytes_Per_BigNum_Digit - 1) / PK_Bytes_Per_BigNum_Digit)
  75 #define PKDIGITS_TO_BYTES(__D)    ((__D) * PK_Bytes_Per_BigNum_Digit)
  76
  77 /* Public Key Processor command block */
  78 typedef struct {
  79     uint32_t opcode_si;                        /* word  0      */
  80     uint32_t r_offset;                         /* word  1      */
  81     uint32_t m_length_offset;                  /* word  2      */
  82     uint32_t a_length_offset;                  /* word  3      */
  83     uint32_t b_length_offset;                  /* word  4      */
  84     uint32_t c_offset;                         /* word  5      */
  85     uint32_t reserved[2];                      /* word  6 - 7  */
  86 } PK_CMD_BLOCK_t;
  87
  88 /* Public Key Processor Load/Store command block */
  89 typedef struct {
  90     uint32_t opcode_si;                        /* word  0      */
  91     uint32_t r_offset;                         /* word  1      */
  92     uint32_t data_addr_ms;                     /* word  2      */
  93     uint32_t data_addr_ls;                     /* word  3      */
  94     uint32_t data_length;                      /* word  4      */
  95     uint32_t reserved[3];                      /* word  5 - 7  */
  96 } PK_LDST_CMD_BLOCK_t;
  97
  98 /* Public Key Processor RSA & DSA command block */
  99 typedef struct {
 100     uint32_t opcode_si;                        /* word  0      */
 101     uint32_t sks;                              /* word  1      */
 102     uint32_t reserved[6];                      /* word  2 - 7  */
 103 } PK_RSA_CMD_BLOCK_t;
 104
 105 /* Field mask and shift contants */
 106 #define PK_Cmd_SI_Mask                       0x08000000
 107 #define PK_Cmd_Opcode_Mask                   0xf0000000
 108 #define PK_Cmd_Offset_Mask                   0x000000ff
 109 #define PK_Cmd_Length_Mask                   0x00ff0000
 110 #define PK_Cmd_Length_Shift                  16
 111 #define PK_Cmd_Data_Length_Mask              0x00001fff
 112 #define PK_Cmd_N_Mask                        0x01000000
 113 #define PK_Cmd_N_Shift                       24
 114 #define PK_Cmd_Key_Length_Mask               0x00ff0000
 115 #define PK_Cmd_Key_Length_Shift              16
 116 #define PK_Cmd_SKS_Offset_Mask               0x00000fff
 117
 118 /* Opcode definitions - already shifted */
 119 #define PK_Cmd_A_Mod_M                       0x00000000
 120 #define PK_Cmd_R_Mod_M                       0x10000000
 121 #define PK_Cmd_A_Plus_B_Mod_M                0x20000000
 122 #define PK_Cmd_A_Minus_B_Mod_M               0x30000000
 123 #define PK_Cmd_Minus_A_Mod_M                 0x40000000
 124 #define PK_Cmd_AB_Mod_M                      0x50000000
 125 #define PK_Cmd_Inverse_A_Mod_M               0x60000000
 126 #define PK_Cmd_Exp_G_Mod_M                   0x70000000
 127 #define PK_Cmd_Load_R                        0x80000000
 128 #define PK_Cmd_Store_R                       0x90000000
 129 #define PK_Cmd_RSA_Private_Key_Op            0xa0000000
 130 #define PK_Cmd_DSA_Sign_Op                   0xb0000000
 131 #define PK_Cmd_NOP                           0xf0000000
 132
 133
 134 /* Status values for config/status register */
 135 #define PK_Status_PKH_Enable                 0x80000000
 136 #define PK_Status_PKH_Busy                   0x40000000
 137 #define PK_Status_PKE_Go                     0x20000000
 138 #define PK_Status_PKE_Busy                   0x10000000
 139 #define PK_Status_Line_Number_Mask           0x0f000000
 140
 141 #define PK_Status_Cmd_Complete               0x00020000
 142 #define PK_Status_SKS_Write_Done             0x00010000
 143 #define PK_Status_SKS_Offset_Error           0x00008000
 144 #define PK_Status_Length_Error               0x00004000
 145 #define PK_Status_Opcode_Error               0x00002000
 146 #define PK_Status_Q_Align_Error              0x00001000
 147 #define PK_Status_Read_Data_Error            0x00000800
 148 #define PK_Status_Write_Data_Error           0x00000400
 149 #define PK_Status_Read_Opcode_Error          0x00000200
 150 #define PK_Status_Access_Error               0x00000100
 151 #define PK_Status_Reserved_Error             0x00000080
 152 #define PK_Status_Timer_Error                0x00000040
 153 #define PK_Status_Prime_Error                0x00000020
 154 #define PK_Status_Invalid_B_Error            0x00000010
 155 #define PK_Status_Invalid_A_Error            0x00000008
 156 #define PK_Status_Invalid_M_Error            0x00000004
 157 #define PK_Status_Invalid_R_Error            0x00000002
 158 #define PK_Status_PKE_Opcode_Error           0x00000001
 159
 160 #define PK_Status_Any_Condition_Mask         0x0001ffff
 161 #define PK_Status_Any_Error_Mask             0x00007fff
 162 #define PK_Status_Cmd_Error_Mask             0x0000f1ff
 163 #define PK_Status_Bus_Error_Mask             0x00000e00
 164 #define PK_Status_Halting_Error_Mask         0x00007eff
 165
 166 /* Values for interrupt enables register */
 167 #define PK_Enable_PKH_Enable                 0x80000000
 168 #define PK_Enable_Cmd_Complete_Enable        0x00020000
 169 #define PK_Enable_SKS_Write_Done_Enable      0x00010000
 170 #define PK_Enable_SKS_Offset_Error_Enable    0x00008000
 171 #define PK_Enable_Length_Error_Enable        0x00004000
 172 #define PK_Enable_Opcode_Error_Enable        0x00002000
 173 #define PK_Status_Q_Align_Error_Enable       0x00001000
 174 #define PK_Enable_Read_Data_Error_Enable     0x00000800
 175 #define PK_Enable_Write_Data_Error_Enable    0x00000400
 176 #define PK_Enable_Read_Opcode_Error_Enable   0x00000200
 177 #define PK_Enable_Access_Error_Enable        0x00000100
 178 #define PK_Enable_Reserved_Error_Enable      0x00000080
 179 #define PK_Enable_Timer_Error_Enable         0x00000040
 180 #define PK_Enable_Prime_Error_Enable         0x00000020
 181 #define PK_Enable_Invalid_B_Error_Enable     0x00000010
 182 #define PK_Enable_Invalid_A_Error_Enable     0x00000008
 183 #define PK_Enable_Invalid_M_Error_Enable     0x00000004
 184 #define PK_Enable_Invalid_R_Error_Enable     0x00000002
 185 #define PK_Enable_PKE_Opcode_Error_Enable    0x00000001
 186
 187 #define PK_Enable_All_Enable_Mask            0x0001ffff
 188 #define PK_Enable_Error_Enable_Mask          0x00007fff
 189
 190 /* Values for Secure Key Storage control register */
 191 #define PK_SKS_Go_Busy                       0x80000000
 192 #define PK_SKS_PROM_Error                    0x40000000
 193 #define PK_SKS_Access_Error                  0x20000000
 194 #define PK_SKS_Operation_Mask                0x00003000
 195 #define PK_SKS_From_PROM_Mask                0x00002000
 196 #define PK_SKS_Cache_Only_Mask               0x00001000
 197 #define PK_SKS_Address_Mask                  0x00000fff
 198 #define PK_SKS_Op_Address_Mask               0x00003fff
 199 #define PK_SKS_Any_Error_Mask                0x60000000
 200 #define PK_SKS_Max_Length                    0x00001000
 201
 202 /* RSA & DSA constants */
 203 #define PK_RSA_Min_Key_Length                2
 204 #define PK_RSA_Max_Key_Length                32
 205 #define PK_DSA_Min_Key_Length                2
 206 #define PK_DSA_Max_Key_Length                32
 207
 208 /* Diffie-Hellman constants */
 209 #define PK_DH_CP_Byte_Length                 PK_Bytes_Per_BigNum_Digit
 210
 211 #endif /* N8_PK_COMMON_H */
 212