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[netbsd-mini2440.git] / sys / dev / podulebus / acemidi.c
blob93ff39d71d9d7070f0a8132834f5f406bcc6419e
1 /* $NetBSD: acemidi.c,v 1.13 2007/10/19 12:01:07 ad Exp $ */
3 /*-
4 * Copyright (c) 2001 Ben Harris
5 * All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: acemidi.c,v 1.13 2007/10/19 12:01:07 ad Exp $");
33 #include <sys/param.h>
35 #include <sys/device.h>
36 #include <sys/systm.h>
38 #include <sys/bus.h>
40 #include <dev/podulebus/podulebus.h>
41 #include <dev/podulebus/podules.h>
42 #include <dev/podulebus/acemidireg.h>
44 #include <sys/termios.h>
45 #include <dev/ic/comvar.h>
46 #include <dev/ic/comreg.h>
48 struct com_acemidi_softc {
49 struct com_softc sc_com;
50 struct evcnt sc_intrcnt;
53 static int acemidi_match(device_t, cfdata_t , void *);
54 static void acemidi_attach(device_t, device_t, void *);
55 static int com_acemidi_match(device_t, cfdata_t, void *);
56 static void com_acemidi_attach(device_t, device_t, void *);
58 CFATTACH_DECL_NEW(acemidi, 0,
59 acemidi_match, acemidi_attach, NULL, NULL);
61 CFATTACH_DECL_NEW(com_acemidi, sizeof(struct com_acemidi_softc),
62 com_acemidi_match, com_acemidi_attach, NULL, NULL);
64 static int
65 acemidi_match(device_t parent, cfdata_t cf, void *aux)
67 struct podulebus_attach_args *pa = aux;
69 if (pa->pa_product == PODULE_MIDICONNECT)
70 return 1;
71 return 0;
74 static void
75 acemidi_attach(device_t parent, device_t self, void *aux)
77 /* struct acemidi_softc *sc = device_private(self); */
78 /* struct podulebus_attach_args *pa = aux; */
80 printf("\n");
81 config_found_ia(self, "acemidi", aux, NULL);
84 static int
85 com_acemidi_match(device_t parent, cfdata_t cf, void *aux)
88 return 1;
91 static void
92 com_acemidi_attach(device_t parent, device_t self, void *aux)
94 struct com_acemidi_softc *sc = device_private(self);
95 struct com_softc *csc = &sc->sc_com;
96 struct podulebus_attach_args *pa = aux;
97 bus_space_handle_t ioh;
98 bus_space_tag_t iot;
99 bus_addr_t iobase;
101 iot = pa->pa_fast_t;
102 iobase = pa->pa_fast_base + ACEMIDI_16550_BASE;
104 bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh);
105 COM_INIT_REGS(csc->sc_regs, iot, ioh, iobase);
107 csc->sc_frequency = ACEMIDI_16550_FREQ;
109 com_attach_subr(csc);
111 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
112 device_xname(self), "intr");
113 podulebus_irq_establish(pa->pa_ih, IPL_SERIAL, comintr, sc,
114 &sc->sc_intrcnt);
118 * Stray IRQ bug:
120 * Occasionally, when receiving, we get a stray IRQ. Sometimes, the interrupt
121 * bit on the unixbp reads as clear. In any case, comintr() gets an IIR
122 * of 0xc1 (no interrupts pending).
124 * The behaviour can be observed with a logic probe:
126 * Channel 1 to PIRQ* (pin 19 on IC3 on A540 backplane)
127 * Channel 2 to INTR on 16550
128 * trigger on ch1 low, ch2 falling
129 * 2 us/div
131 * This catches cases where the 16550 de-asserts the interrupt before
132 * irq_handler is entered and disables the interrupt at unixbp (by calling
133 * splhigh()).
135 * This gets us 5us pulses on INTR and PIRQ*. Now to work out why.
137 * Connecting channel 3 to the CS2* pin on the 16550 shows it high throughout,
138 * so the interrupt isn't being cleared by the host. MR, similarly, is low
139 * throughout, so it's not being cleared by a reset.