sys/dev/podulebus/hcide.c

   1 /*      $NetBSD: hcide.c,v 1.21 2007/10/19 12:01:07 ad Exp $    */
   2
   3 /*-
   4  * Copyright (c) 2000, 2001 Ben Harris
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. The name of the author may not be used to endorse or promote products
  16  *    derived from this software without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  */
  29 /*
  30  * hcide.c - Driver for the HCCS 16-bit IDE interface.
  31  */
  32
  33 #include <sys/cdefs.h>
  34 __KERNEL_RCSID(0, "$NetBSD: hcide.c,v 1.21 2007/10/19 12:01:07 ad Exp $");
  35
  36 #include <sys/param.h>
  37
  38 #include <sys/device.h>
  39 #include <sys/systm.h>
  40
  41 #include <sys/bus.h>
  42
  43 #include <dev/podulebus/podulebus.h>
  44 #include <dev/podulebus/podules.h>
  45 #include <dev/podulebus/hcidereg.h>
  46
  47 #include <dev/ata/atavar.h>
  48 #include <dev/ic/wdcreg.h>
  49 #include <dev/ic/wdcvar.h>
  50
  51 struct hcide_softc {
  52         struct wdc_softc sc_wdc;
  53         struct ata_channel *sc_chp[HCIDE_NCHANNELS];/* pointers to sc_chan */
  54         struct ata_channel sc_chan[HCIDE_NCHANNELS];
  55         struct ata_queue sc_chq[HCIDE_NCHANNELS];
  56         struct wdc_regs sc_wdc_regs[HCIDE_NCHANNELS];
  57 };
  58
  59 static int  hcide_match  (device_t, cfdata_t, void *);
  60 static void hcide_attach (device_t, device_t, void *);
  61
  62 CFATTACH_DECL_NEW(hcide, sizeof(struct hcide_softc),
  63     hcide_match, hcide_attach, NULL, NULL);
  64
  65 static const int hcide_cmdoffsets[] = { HCIDE_CMD0, HCIDE_CMD1, HCIDE_CMD2 };
  66 static const int hcide_ctloffsets[] = { HCIDE_CTL, HCIDE_CTL, HCIDE_CTL };
  67
  68 static int
  69 hcide_match(device_t parent, cfdata_t cf, void *aux)
  70 {
  71         struct podulebus_attach_args *pa = aux;
  72
  73         if (pa->pa_product == PODULE_HCCS_IDESCSI &&
  74             strncmp(pa->pa_descr, "IDE", 3) == 0)
  75                 return 1;
  76         return 0;
  77 }
  78
  79 static void
  80 hcide_attach(device_t parent, device_t self, void *aux)
  81 {
  82         struct hcide_softc *sc = device_private(self);
  83         struct wdc_regs *wdr;
  84         struct podulebus_attach_args *pa = aux;
  85         struct ata_channel *ch;
  86         int i, j;
  87
  88         sc->sc_wdc.sc_atac.atac_dev = self;
  89         sc->sc_wdc.regs = sc->sc_wdc_regs;
  90
  91         sc->sc_wdc.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_NOIRQ;
  92         sc->sc_wdc.sc_atac.atac_pio_cap = 0; /* XXX correct? */
  93         sc->sc_wdc.sc_atac.atac_nchannels = HCIDE_NCHANNELS;
  94         sc->sc_wdc.sc_atac.atac_channels = sc->sc_chp;
  95         aprint_normal("\n");
  96         for (i = 0; i < HCIDE_NCHANNELS; i++) {
  97                 ch = sc->sc_chp[i] = &sc->sc_chan[i];
  98                 wdr = &sc->sc_wdc_regs[i];
  99                 ch->ch_channel = i;
 100                 ch->ch_atac = &sc->sc_wdc.sc_atac;
 101                 wdr->cmd_iot = pa->pa_mod_t;
 102                 wdr->ctl_iot = pa->pa_mod_t;
 103                 ch->ch_queue = &sc->sc_chq[i];
 104                 ch->ch_ndrive = 2;
 105                 bus_space_map(pa->pa_fast_t,
 106                     pa->pa_fast_base + hcide_cmdoffsets[i], 0, 8,
 107                     &wdr->cmd_baseioh);
 108                 for (j = 0; j < WDC_NREG; j++)
 109                         bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
 110                             j, j == 0 ? 4 : 1, &wdr->cmd_iohs[j]);
 111                 wdc_init_shadow_regs(ch);
 112                 bus_space_map(pa->pa_fast_t,
 113                     pa->pa_fast_base + hcide_ctloffsets[i], 0, 8,
 114                     &wdr->ctl_ioh);
 115                 wdcattach(ch);
 116         }
 117 }