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[netbsd-mini2440.git] / sys / dev / usb / if_ural.c
blob3d8c7b769c543bffd55c9bb28a777de9dc6b20b5
1 /* $NetBSD: if_ural.c,v 1.32 2009/09/23 19:07:19 plunky Exp $ */
2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */
3
4 /*-
5 * Copyright (c) 2005, 2006
6 * Damien Bergamini <damien.bergamini@free.fr>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21 /*-
22 * Ralink Technology RT2500USB chipset driver
23 * http://www.ralinktech.com/
24 */
25
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.32 2009/09/23 19:07:19 plunky Exp $");
28
29 #include "bpfilter.h"
30
31 #include <sys/param.h>
32 #include <sys/sockio.h>
33 #include <sys/sysctl.h>
34 #include <sys/mbuf.h>
35 #include <sys/kernel.h>
36 #include <sys/socket.h>
37 #include <sys/systm.h>
38 #include <sys/malloc.h>
39 #include <sys/conf.h>
40 #include <sys/device.h>
41
42 #include <sys/bus.h>
43 #include <machine/endian.h>
44 #include <sys/intr.h>
45
46 #if NBPFILTER > 0
47 #include <net/bpf.h>
48 #endif
49 #include <net/if.h>
50 #include <net/if_arp.h>
51 #include <net/if_dl.h>
52 #include <net/if_ether.h>
53 #include <net/if_media.h>
54 #include <net/if_types.h>
55
56 #include <netinet/in.h>
57 #include <netinet/in_systm.h>
58 #include <netinet/in_var.h>
59 #include <netinet/ip.h>
60
61 #include <net80211/ieee80211_netbsd.h>
62 #include <net80211/ieee80211_var.h>
63 #include <net80211/ieee80211_amrr.h>
64 #include <net80211/ieee80211_radiotap.h>
65
66 #include <dev/usb/usb.h>
67 #include <dev/usb/usbdi.h>
68 #include <dev/usb/usbdi_util.h>
69 #include <dev/usb/usbdevs.h>
70
71 #include <dev/usb/if_uralreg.h>
72 #include <dev/usb/if_uralvar.h>
73
74 #ifdef USB_DEBUG
75 #define URAL_DEBUG
76 #endif
77
78 #ifdef URAL_DEBUG
79 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0)
80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0)
81 int ural_debug = 0;
82 #else
83 #define DPRINTF(x)
84 #define DPRINTFN(n, x)
85 #endif
86
87 /* various supported device vendors/products */
88 static const struct usb_devno ural_devs[] = {
89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G },
90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 },
91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G },
93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP },
94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS },
95 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU },
96 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
97 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
98 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
101 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
102 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI },
103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 },
104 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 },
105 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 },
106 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W },
107 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
108 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
109 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
110 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 },
111 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG },
112 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R },
113 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G },
114 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
115 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 },
116 };
117
118 Static int ural_alloc_tx_list(struct ural_softc *);
119 Static void ural_free_tx_list(struct ural_softc *);
120 Static int ural_alloc_rx_list(struct ural_softc *);
121 Static void ural_free_rx_list(struct ural_softc *);
122 Static int ural_media_change(struct ifnet *);
123 Static void ural_next_scan(void *);
124 Static void ural_task(void *);
125 Static int ural_newstate(struct ieee80211com *,
126 enum ieee80211_state, int);
127 Static int ural_rxrate(struct ural_rx_desc *);
128 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle,
129 usbd_status);
130 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle,
131 usbd_status);
132 Static int ural_ack_rate(struct ieee80211com *, int);
133 Static uint16_t ural_txtime(int, int, uint32_t);
134 Static uint8_t ural_plcp_signal(int);
135 Static void ural_setup_tx_desc(struct ural_softc *,
136 struct ural_tx_desc *, uint32_t, int, int);
137 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
138 struct ieee80211_node *);
139 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
140 struct ieee80211_node *);
141 Static int ural_tx_data(struct ural_softc *, struct mbuf *,
142 struct ieee80211_node *);
143 Static void ural_start(struct ifnet *);
144 Static void ural_watchdog(struct ifnet *);
145 Static int ural_reset(struct ifnet *);
146 Static int ural_ioctl(struct ifnet *, u_long, void *);
147 Static void ural_set_testmode(struct ural_softc *);
148 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
149 int);
150 Static uint16_t ural_read(struct ural_softc *, uint16_t);
151 Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
152 int);
153 Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
154 Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
155 int);
156 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
157 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
158 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
159 Static void ural_set_chan(struct ural_softc *,
160 struct ieee80211_channel *);
161 Static void ural_disable_rf_tune(struct ural_softc *);
162 Static void ural_enable_tsf_sync(struct ural_softc *);
163 Static void ural_update_slot(struct ifnet *);
164 Static void ural_set_txpreamble(struct ural_softc *);
165 Static void ural_set_basicrates(struct ural_softc *);
166 Static void ural_set_bssid(struct ural_softc *, uint8_t *);
167 Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
168 Static void ural_update_promisc(struct ural_softc *);
169 Static const char *ural_get_rf(int);
170 Static void ural_read_eeprom(struct ural_softc *);
171 Static int ural_bbp_init(struct ural_softc *);
172 Static void ural_set_txantenna(struct ural_softc *, int);
173 Static void ural_set_rxantenna(struct ural_softc *, int);
174 Static int ural_init(struct ifnet *);
175 Static void ural_stop(struct ifnet *, int);
176 Static void ural_amrr_start(struct ural_softc *,
177 struct ieee80211_node *);
178 Static void ural_amrr_timeout(void *);
179 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle,
180 usbd_status status);
181
182 /*
183 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
184 */
185 static const struct ieee80211_rateset ural_rateset_11a =
186 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
187
188 static const struct ieee80211_rateset ural_rateset_11b =
189 { 4, { 2, 4, 11, 22 } };
190
191 static const struct ieee80211_rateset ural_rateset_11g =
192 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
193
194 /*
195 * Default values for MAC registers; values taken from the reference driver.
196 */
197 static const struct {
198 uint16_t reg;
199 uint16_t val;
200 } ural_def_mac[] = {
201 { RAL_TXRX_CSR5, 0x8c8d },
202 { RAL_TXRX_CSR6, 0x8b8a },
203 { RAL_TXRX_CSR7, 0x8687 },
204 { RAL_TXRX_CSR8, 0x0085 },
205 { RAL_MAC_CSR13, 0x1111 },
206 { RAL_MAC_CSR14, 0x1e11 },
207 { RAL_TXRX_CSR21, 0xe78f },
208 { RAL_MAC_CSR9, 0xff1d },
209 { RAL_MAC_CSR11, 0x0002 },
210 { RAL_MAC_CSR22, 0x0053 },
211 { RAL_MAC_CSR15, 0x0000 },
212 { RAL_MAC_CSR8, 0x0780 },
213 { RAL_TXRX_CSR19, 0x0000 },
214 { RAL_TXRX_CSR18, 0x005a },
215 { RAL_PHY_CSR2, 0x0000 },
216 { RAL_TXRX_CSR0, 0x1ec0 },
217 { RAL_PHY_CSR4, 0x000f }
218 };
219
220 /*
221 * Default values for BBP registers; values taken from the reference driver.
222 */
223 static const struct {
224 uint8_t reg;
225 uint8_t val;
226 } ural_def_bbp[] = {
227 { 3, 0x02 },
228 { 4, 0x19 },
229 { 14, 0x1c },
230 { 15, 0x30 },
231 { 16, 0xac },
232 { 17, 0x48 },
233 { 18, 0x18 },
234 { 19, 0xff },
235 { 20, 0x1e },
236 { 21, 0x08 },
237 { 22, 0x08 },
238 { 23, 0x08 },
239 { 24, 0x80 },
240 { 25, 0x50 },
241 { 26, 0x08 },
242 { 27, 0x23 },
243 { 30, 0x10 },
244 { 31, 0x2b },
245 { 32, 0xb9 },
246 { 34, 0x12 },
247 { 35, 0x50 },
248 { 39, 0xc4 },
249 { 40, 0x02 },
250 { 41, 0x60 },
251 { 53, 0x10 },
252 { 54, 0x18 },
253 { 56, 0x08 },
254 { 57, 0x10 },
255 { 58, 0x08 },
256 { 61, 0x60 },
257 { 62, 0x10 },
258 { 75, 0xff }
259 };
260
261 /*
262 * Default values for RF register R2 indexed by channel numbers.
263 */
264 static const uint32_t ural_rf2522_r2[] = {
265 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
266 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
267 };
268
269 static const uint32_t ural_rf2523_r2[] = {
270 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
271 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
272 };
273
274 static const uint32_t ural_rf2524_r2[] = {
275 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
276 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
277 };
278
279 static const uint32_t ural_rf2525_r2[] = {
280 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
281 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
282 };
283
284 static const uint32_t ural_rf2525_hi_r2[] = {
285 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
286 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
287 };
288
289 static const uint32_t ural_rf2525e_r2[] = {
290 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
291 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
292 };
293
294 static const uint32_t ural_rf2526_hi_r2[] = {
295 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
296 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
297 };
298
299 static const uint32_t ural_rf2526_r2[] = {
300 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
301 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
302 };
303
304 /*
305 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
306 * values taken from the reference driver.
307 */
308 static const struct {
309 uint8_t chan;
310 uint32_t r1;
311 uint32_t r2;
312 uint32_t r4;
313 } ural_rf5222[] = {
314 { 1, 0x08808, 0x0044d, 0x00282 },
315 { 2, 0x08808, 0x0044e, 0x00282 },
316 { 3, 0x08808, 0x0044f, 0x00282 },
317 { 4, 0x08808, 0x00460, 0x00282 },
318 { 5, 0x08808, 0x00461, 0x00282 },
319 { 6, 0x08808, 0x00462, 0x00282 },
320 { 7, 0x08808, 0x00463, 0x00282 },
321 { 8, 0x08808, 0x00464, 0x00282 },
322 { 9, 0x08808, 0x00465, 0x00282 },
323 { 10, 0x08808, 0x00466, 0x00282 },
324 { 11, 0x08808, 0x00467, 0x00282 },
325 { 12, 0x08808, 0x00468, 0x00282 },
326 { 13, 0x08808, 0x00469, 0x00282 },
327 { 14, 0x08808, 0x0046b, 0x00286 },
328
329 { 36, 0x08804, 0x06225, 0x00287 },
330 { 40, 0x08804, 0x06226, 0x00287 },
331 { 44, 0x08804, 0x06227, 0x00287 },
332 { 48, 0x08804, 0x06228, 0x00287 },
333 { 52, 0x08804, 0x06229, 0x00287 },
334 { 56, 0x08804, 0x0622a, 0x00287 },
335 { 60, 0x08804, 0x0622b, 0x00287 },
336 { 64, 0x08804, 0x0622c, 0x00287 },
337
338 { 100, 0x08804, 0x02200, 0x00283 },
339 { 104, 0x08804, 0x02201, 0x00283 },
340 { 108, 0x08804, 0x02202, 0x00283 },
341 { 112, 0x08804, 0x02203, 0x00283 },
342 { 116, 0x08804, 0x02204, 0x00283 },
343 { 120, 0x08804, 0x02205, 0x00283 },
344 { 124, 0x08804, 0x02206, 0x00283 },
345 { 128, 0x08804, 0x02207, 0x00283 },
346 { 132, 0x08804, 0x02208, 0x00283 },
347 { 136, 0x08804, 0x02209, 0x00283 },
348 { 140, 0x08804, 0x0220a, 0x00283 },
349
350 { 149, 0x08808, 0x02429, 0x00281 },
351 { 153, 0x08808, 0x0242b, 0x00281 },
352 { 157, 0x08808, 0x0242d, 0x00281 },
353 { 161, 0x08808, 0x0242f, 0x00281 }
354 };
355
356 USB_DECLARE_DRIVER(ural);
357
358 USB_MATCH(ural)
359 {
360 USB_MATCH_START(ural, uaa);
361
362 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
363 UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
364 }
365
366 USB_ATTACH(ural)
367 {
368 USB_ATTACH_START(ural, sc, uaa);
369 struct ieee80211com *ic = &sc->sc_ic;
370 struct ifnet *ifp = &sc->sc_if;
371 usb_interface_descriptor_t *id;
372 usb_endpoint_descriptor_t *ed;
373 usbd_status error;
374 char *devinfop;
375 int i;
376
377 sc->sc_dev = self;
378 sc->sc_udev = uaa->device;
379
380 aprint_naive("\n");
381 aprint_normal("\n");
382
383 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
384 aprint_normal_dev(self, "%s\n", devinfop);
385 usbd_devinfo_free(devinfop);
386
387 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
388 aprint_error_dev(self, "could not set configuration no\n");
389 USB_ATTACH_ERROR_RETURN;
390 }
391
392 /* get the first interface handle */
393 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
394 &sc->sc_iface);
395 if (error != 0) {
396 aprint_error_dev(self, "could not get interface handle\n");
397 USB_ATTACH_ERROR_RETURN;
398 }
399
400 /*
401 * Find endpoints.
402 */
403 id = usbd_get_interface_descriptor(sc->sc_iface);
404
405 sc->sc_rx_no = sc->sc_tx_no = -1;
406 for (i = 0; i < id->bNumEndpoints; i++) {
407 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
408 if (ed == NULL) {
409 aprint_error_dev(self,
410 "no endpoint descriptor for %d\n", i);
411 USB_ATTACH_ERROR_RETURN;
412 }
413
414 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
415 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
416 sc->sc_rx_no = ed->bEndpointAddress;
417 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
418 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
419 sc->sc_tx_no = ed->bEndpointAddress;
420 }
421 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
422 aprint_error_dev(self, "missing endpoint\n");
423 USB_ATTACH_ERROR_RETURN;
424 }
425
426 usb_init_task(&sc->sc_task, ural_task, sc);
427 usb_callout_init(sc->sc_scan_ch);
428 sc->amrr.amrr_min_success_threshold = 1;
429 sc->amrr.amrr_max_success_threshold = 15;
430 usb_callout_init(sc->sc_amrr_ch);
431
432 /* retrieve RT2570 rev. no */
433 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
434
435 /* retrieve MAC address and various other things from EEPROM */
436 ural_read_eeprom(sc);
437
438 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
439 sc->asic_rev, ural_get_rf(sc->rf_rev));
440
441 ifp->if_softc = sc;
442 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ);
443 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
444 ifp->if_init = ural_init;
445 ifp->if_ioctl = ural_ioctl;
446 ifp->if_start = ural_start;
447 ifp->if_watchdog = ural_watchdog;
448 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
449 IFQ_SET_READY(&ifp->if_snd);
450
451 ic->ic_ifp = ifp;
452 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
453 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
454 ic->ic_state = IEEE80211_S_INIT;
455
456 /* set device capabilities */
457 ic->ic_caps =
458 IEEE80211_C_IBSS | /* IBSS mode supported */
459 IEEE80211_C_MONITOR | /* monitor mode supported */
460 IEEE80211_C_HOSTAP | /* HostAp mode supported */
461 IEEE80211_C_TXPMGT | /* tx power management */
462 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
463 IEEE80211_C_SHSLOT | /* short slot time supported */
464 IEEE80211_C_WPA; /* 802.11i */
465
466 if (sc->rf_rev == RAL_RF_5222) {
467 /* set supported .11a rates */
468 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a;
469
470 /* set supported .11a channels */
471 for (i = 36; i <= 64; i += 4) {
472 ic->ic_channels[i].ic_freq =
473 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
474 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
475 }
476 for (i = 100; i <= 140; i += 4) {
477 ic->ic_channels[i].ic_freq =
478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
480 }
481 for (i = 149; i <= 161; i += 4) {
482 ic->ic_channels[i].ic_freq =
483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
485 }
486 }
487
488 /* set supported .11b and .11g rates */
489 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b;
490 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g;
491
492 /* set supported .11b and .11g channels (1 through 14) */
493 for (i = 1; i <= 14; i++) {
494 ic->ic_channels[i].ic_freq =
495 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
496 ic->ic_channels[i].ic_flags =
497 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
498 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
499 }
500
501 if_attach(ifp);
502 ieee80211_ifattach(ic);
503 ic->ic_reset = ural_reset;
504
505 /* override state transition machine */
506 sc->sc_newstate = ic->ic_newstate;
507 ic->ic_newstate = ural_newstate;
508 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
509
510 #if NBPFILTER > 0
511 bpfattach2(ifp, DLT_IEEE802_11_RADIO,
512 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
513
514 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
515 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
516 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
517
518 sc->sc_txtap_len = sizeof sc->sc_txtapu;
519 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
520 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
521 #endif
522
523 ieee80211_announce(ic);
524
525 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
526 USBDEV(sc->sc_dev));
527
528 USB_ATTACH_SUCCESS_RETURN;
529 }
530
531 USB_DETACH(ural)
532 {
533 USB_DETACH_START(ural, sc);
534 struct ieee80211com *ic = &sc->sc_ic;
535 struct ifnet *ifp = &sc->sc_if;
536 int s;
537
538 s = splusb();
539
540 ural_stop(ifp, 1);
541 usb_rem_task(sc->sc_udev, &sc->sc_task);
542 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc);
543 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc);
544
545 if (sc->amrr_xfer != NULL) {
546 usbd_free_xfer(sc->amrr_xfer);
547 sc->amrr_xfer = NULL;
548 }
549
550 if (sc->sc_rx_pipeh != NULL) {
551 usbd_abort_pipe(sc->sc_rx_pipeh);
552 usbd_close_pipe(sc->sc_rx_pipeh);
553 }
554
555 if (sc->sc_tx_pipeh != NULL) {
556 usbd_abort_pipe(sc->sc_tx_pipeh);
557 usbd_close_pipe(sc->sc_tx_pipeh);
558 }
559
560 #if NBPFILTER > 0
561 bpfdetach(ifp);
562 #endif
563 ieee80211_ifdetach(ic);
564 if_detach(ifp);
565
566 splx(s);
567
568 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
569 USBDEV(sc->sc_dev));
570
571 return 0;
572 }
573
574 Static int
575 ural_alloc_tx_list(struct ural_softc *sc)
576 {
577 struct ural_tx_data *data;
578 int i, error;
579
580 sc->tx_queued = 0;
581
582 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
583 data = &sc->tx_data[i];
584
585 data->sc = sc;
586
587 data->xfer = usbd_alloc_xfer(sc->sc_udev);
588 if (data->xfer == NULL) {
589 printf("%s: could not allocate tx xfer\n",
590 USBDEVNAME(sc->sc_dev));
591 error = ENOMEM;
592 goto fail;
593 }
594
595 data->buf = usbd_alloc_buffer(data->xfer,
596 RAL_TX_DESC_SIZE + MCLBYTES);
597 if (data->buf == NULL) {
598 printf("%s: could not allocate tx buffer\n",
599 USBDEVNAME(sc->sc_dev));
600 error = ENOMEM;
601 goto fail;
602 }
603 }
604
605 return 0;
606
607 fail: ural_free_tx_list(sc);
608 return error;
609 }
610
611 Static void
612 ural_free_tx_list(struct ural_softc *sc)
613 {
614 struct ural_tx_data *data;
615 int i;
616
617 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
618 data = &sc->tx_data[i];
619
620 if (data->xfer != NULL) {
621 usbd_free_xfer(data->xfer);
622 data->xfer = NULL;
623 }
624
625 if (data->ni != NULL) {
626 ieee80211_free_node(data->ni);
627 data->ni = NULL;
628 }
629 }
630 }
631
632 Static int
633 ural_alloc_rx_list(struct ural_softc *sc)
634 {
635 struct ural_rx_data *data;
636 int i, error;
637
638 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
639 data = &sc->rx_data[i];
640
641 data->sc = sc;
642
643 data->xfer = usbd_alloc_xfer(sc->sc_udev);
644 if (data->xfer == NULL) {
645 printf("%s: could not allocate rx xfer\n",
646 USBDEVNAME(sc->sc_dev));
647 error = ENOMEM;
648 goto fail;
649 }
650
651 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
652 printf("%s: could not allocate rx buffer\n",
653 USBDEVNAME(sc->sc_dev));
654 error = ENOMEM;
655 goto fail;
656 }
657
658 MGETHDR(data->m, M_DONTWAIT, MT_DATA);
659 if (data->m == NULL) {
660 printf("%s: could not allocate rx mbuf\n",
661 USBDEVNAME(sc->sc_dev));
662 error = ENOMEM;
663 goto fail;
664 }
665
666 MCLGET(data->m, M_DONTWAIT);
667 if (!(data->m->m_flags & M_EXT)) {
668 printf("%s: could not allocate rx mbuf cluster\n",
669 USBDEVNAME(sc->sc_dev));
670 error = ENOMEM;
671 goto fail;
672 }
673
674 data->buf = mtod(data->m, uint8_t *);
675 }
676
677 return 0;
678
679 fail: ural_free_tx_list(sc);
680 return error;
681 }
682
683 Static void
684 ural_free_rx_list(struct ural_softc *sc)
685 {
686 struct ural_rx_data *data;
687 int i;
688
689 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
690 data = &sc->rx_data[i];
691
692 if (data->xfer != NULL) {
693 usbd_free_xfer(data->xfer);
694 data->xfer = NULL;
695 }
696
697 if (data->m != NULL) {
698 m_freem(data->m);
699 data->m = NULL;
700 }
701 }
702 }
703
704 Static int
705 ural_media_change(struct ifnet *ifp)
706 {
707 int error;
708
709 error = ieee80211_media_change(ifp);
710 if (error != ENETRESET)
711 return error;
712
713 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
714 ural_init(ifp);
715
716 return 0;
717 }
718
719 /*
720 * This function is called periodically (every 200ms) during scanning to
721 * switch from one channel to another.
722 */
723 Static void
724 ural_next_scan(void *arg)
725 {
726 struct ural_softc *sc = arg;
727 struct ieee80211com *ic = &sc->sc_ic;
728
729 if (ic->ic_state == IEEE80211_S_SCAN)
730 ieee80211_next_scan(ic);
731 }
732
733 Static void
734 ural_task(void *arg)
735 {
736 struct ural_softc *sc = arg;
737 struct ieee80211com *ic = &sc->sc_ic;
738 enum ieee80211_state ostate;
739 struct ieee80211_node *ni;
740 struct mbuf *m;
741
742 ostate = ic->ic_state;
743
744 switch (sc->sc_state) {
745 case IEEE80211_S_INIT:
746 if (ostate == IEEE80211_S_RUN) {
747 /* abort TSF synchronization */
748 ural_write(sc, RAL_TXRX_CSR19, 0);
749
750 /* force tx led to stop blinking */
751 ural_write(sc, RAL_MAC_CSR20, 0);
752 }
753 break;
754
755 case IEEE80211_S_SCAN:
756 ural_set_chan(sc, ic->ic_curchan);
757 usb_callout(sc->sc_scan_ch, hz / 5, ural_next_scan, sc);
758 break;
759
760 case IEEE80211_S_AUTH:
761 ural_set_chan(sc, ic->ic_curchan);
762 break;
763
764 case IEEE80211_S_ASSOC:
765 ural_set_chan(sc, ic->ic_curchan);
766 break;
767
768 case IEEE80211_S_RUN:
769 ural_set_chan(sc, ic->ic_curchan);
770
771 ni = ic->ic_bss;
772
773 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
774 ural_update_slot(ic->ic_ifp);
775 ural_set_txpreamble(sc);
776 ural_set_basicrates(sc);
777 ural_set_bssid(sc, ni->ni_bssid);
778 }
779
780 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
781 ic->ic_opmode == IEEE80211_M_IBSS) {
782 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
783 if (m == NULL) {
784 printf("%s: could not allocate beacon\n",
785 USBDEVNAME(sc->sc_dev));
786 return;
787 }
788
789 if (ural_tx_bcn(sc, m, ni) != 0) {
790 m_freem(m);
791 printf("%s: could not send beacon\n",
792 USBDEVNAME(sc->sc_dev));
793 return;
794 }
795
796 /* beacon is no longer needed */
797 m_freem(m);
798 }
799
800 /* make tx led blink on tx (controlled by ASIC) */
801 ural_write(sc, RAL_MAC_CSR20, 1);
802
803 if (ic->ic_opmode != IEEE80211_M_MONITOR)
804 ural_enable_tsf_sync(sc);
805
806 /* enable automatic rate adaptation in STA mode */
807 if (ic->ic_opmode == IEEE80211_M_STA &&
808 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE)
809 ural_amrr_start(sc, ni);
810
811 break;
812 }
813
814 sc->sc_newstate(ic, sc->sc_state, -1);
815 }
816
817 Static int
818 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate,
819 int arg)
820 {
821 struct ural_softc *sc = ic->ic_ifp->if_softc;
822
823 usb_rem_task(sc->sc_udev, &sc->sc_task);
824 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc);
825 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc);
826
827 /* do it in a process context */
828 sc->sc_state = nstate;
829 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
830
831 return 0;
832 }
833
834 /* quickly determine if a given rate is CCK or OFDM */
835 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
836
837 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
838 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
839
840 #define RAL_SIFS 10 /* us */
841
842 #define RAL_RXTX_TURNAROUND 5 /* us */
843
844 /*
845 * This function is only used by the Rx radiotap code.
846 */
847 Static int
848 ural_rxrate(struct ural_rx_desc *desc)
849 {
850 if (le32toh(desc->flags) & RAL_RX_OFDM) {
851 /* reverse function of ural_plcp_signal */
852 switch (desc->rate) {
853 case 0xb: return 12;
854 case 0xf: return 18;
855 case 0xa: return 24;
856 case 0xe: return 36;
857 case 0x9: return 48;
858 case 0xd: return 72;
859 case 0x8: return 96;
860 case 0xc: return 108;
861 }
862 } else {
863 if (desc->rate == 10)
864 return 2;
865 if (desc->rate == 20)
866 return 4;
867 if (desc->rate == 55)
868 return 11;
869 if (desc->rate == 110)
870 return 22;
871 }
872 return 2; /* should not get there */
873 }
874
875 Static void
876 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv,
877 usbd_status status)
878 {
879 struct ural_tx_data *data = priv;
880 struct ural_softc *sc = data->sc;
881 struct ifnet *ifp = &sc->sc_if;
882 int s;
883
884 if (status != USBD_NORMAL_COMPLETION) {
885 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
886 return;
887
888 printf("%s: could not transmit buffer: %s\n",
889 USBDEVNAME(sc->sc_dev), usbd_errstr(status));
890
891 if (status == USBD_STALLED)
892 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
893
894 ifp->if_oerrors++;
895 return;
896 }
897
898 s = splnet();
899
900 m_freem(data->m);
901 data->m = NULL;
902 ieee80211_free_node(data->ni);
903 data->ni = NULL;
904
905 sc->tx_queued--;
906 ifp->if_opackets++;
907
908 DPRINTFN(10, ("tx done\n"));
909
910 sc->sc_tx_timer = 0;
911 ifp->if_flags &= ~IFF_OACTIVE;
912 ural_start(ifp);
913
914 splx(s);
915 }
916
917 Static void
918 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
919 {
920 struct ural_rx_data *data = priv;
921 struct ural_softc *sc = data->sc;
922 struct ieee80211com *ic = &sc->sc_ic;
923 struct ifnet *ifp = &sc->sc_if;
924 struct ural_rx_desc *desc;
925 struct ieee80211_frame *wh;
926 struct ieee80211_node *ni;
927 struct mbuf *mnew, *m;
928 int s, len;
929
930 if (status != USBD_NORMAL_COMPLETION) {
931 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
932 return;
933
934 if (status == USBD_STALLED)
935 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
936 goto skip;
937 }
938
939 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
940
941 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
942 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev),
943 len));
944 ifp->if_ierrors++;
945 goto skip;
946 }
947
948 /* rx descriptor is located at the end */
949 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
950
951 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) ||
952 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) {
953 /*
954 * This should not happen since we did not request to receive
955 * those frames when we filled RAL_TXRX_CSR2.
956 */
957 DPRINTFN(5, ("PHY or CRC error\n"));
958 ifp->if_ierrors++;
959 goto skip;
960 }
961
962 MGETHDR(mnew, M_DONTWAIT, MT_DATA);
963 if (mnew == NULL) {
964 ifp->if_ierrors++;
965 goto skip;
966 }
967
968 MCLGET(mnew, M_DONTWAIT);
969 if (!(mnew->m_flags & M_EXT)) {
970 ifp->if_ierrors++;
971 m_freem(mnew);
972 goto skip;
973 }
974
975 m = data->m;
976 data->m = mnew;
977 data->buf = mtod(data->m, uint8_t *);
978
979 /* finalize mbuf */
980 m->m_pkthdr.rcvif = ifp;
981 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
982 m->m_flags |= M_HASFCS; /* h/w leaves FCS */
983
984 s = splnet();
985
986 #if NBPFILTER > 0
987 if (sc->sc_drvbpf != NULL) {
988 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
989
990 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS;
991 tap->wr_rate = ural_rxrate(desc);
992 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
993 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
994 tap->wr_antenna = sc->rx_ant;
995 tap->wr_antsignal = desc->rssi;
996
997 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
998 }
999 #endif
1000
1001 wh = mtod(m, struct ieee80211_frame *);
1002 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1003
1004 /* send the frame to the 802.11 layer */
1005 ieee80211_input(ic, m, ni, desc->rssi, 0);
1006
1007 /* node is no longer needed */
1008 ieee80211_free_node(ni);
1009
1010 splx(s);
1011
1012 DPRINTFN(15, ("rx done\n"));
1013
1014 skip: /* setup a new transfer */
1015 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
1016 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
1017 usbd_transfer(xfer);
1018 }
1019
1020 /*
1021 * Return the expected ack rate for a frame transmitted at rate `rate'.
1022 * XXX: this should depend on the destination node basic rate set.
1023 */
1024 Static int
1025 ural_ack_rate(struct ieee80211com *ic, int rate)
1026 {
1027 switch (rate) {
1028 /* CCK rates */
1029 case 2:
1030 return 2;
1031 case 4:
1032 case 11:
1033 case 22:
1034 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1035
1036 /* OFDM rates */
1037 case 12:
1038 case 18:
1039 return 12;
1040 case 24:
1041 case 36:
1042 return 24;
1043 case 48:
1044 case 72:
1045 case 96:
1046 case 108:
1047 return 48;
1048 }
1049
1050 /* default to 1Mbps */
1051 return 2;
1052 }
1053
1054 /*
1055 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1056 * The function automatically determines the operating mode depending on the
1057 * given rate. `flags' indicates whether short preamble is in use or not.
1058 */
1059 Static uint16_t
1060 ural_txtime(int len, int rate, uint32_t flags)
1061 {
1062 uint16_t txtime;
1063
1064 if (RAL_RATE_IS_OFDM(rate)) {
1065 /* IEEE Std 802.11g-2003, pp. 37 */
1066 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1067 txtime = 16 + 4 + 4 * txtime + 6;
1068 } else {
1069 /* IEEE Std 802.11b-1999, pp. 28 */
1070 txtime = (16 * len + rate - 1) / rate;
1071 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1072 txtime += 72 + 24;
1073 else
1074 txtime += 144 + 48;
1075 }
1076 return txtime;
1077 }
1078
1079 Static uint8_t
1080 ural_plcp_signal(int rate)
1081 {
1082 switch (rate) {
1083 /* CCK rates (returned values are device-dependent) */
1084 case 2: return 0x0;
1085 case 4: return 0x1;
1086 case 11: return 0x2;
1087 case 22: return 0x3;
1088
1089 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1090 case 12: return 0xb;
1091 case 18: return 0xf;
1092 case 24: return 0xa;
1093 case 36: return 0xe;
1094 case 48: return 0x9;
1095 case 72: return 0xd;
1096 case 96: return 0x8;
1097 case 108: return 0xc;
1098
1099 /* unsupported rates (should not get there) */
1100 default: return 0xff;
1101 }
1102 }
1103
1104 Static void
1105 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1106 uint32_t flags, int len, int rate)
1107 {
1108 struct ieee80211com *ic = &sc->sc_ic;
1109 uint16_t plcp_length;
1110 int remainder;
1111
1112 desc->flags = htole32(flags);
1113 desc->flags |= htole32(RAL_TX_NEWSEQ);
1114 desc->flags |= htole32(len << 16);
1115
1116 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1117 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1118
1119 /* setup PLCP fields */
1120 desc->plcp_signal = ural_plcp_signal(rate);
1121 desc->plcp_service = 4;
1122
1123 len += IEEE80211_CRC_LEN;
1124 if (RAL_RATE_IS_OFDM(rate)) {
1125 desc->flags |= htole32(RAL_TX_OFDM);
1126
1127 plcp_length = len & 0xfff;
1128 desc->plcp_length_hi = plcp_length >> 6;
1129 desc->plcp_length_lo = plcp_length & 0x3f;
1130 } else {
1131 plcp_length = (16 * len + rate - 1) / rate;
1132 if (rate == 22) {
1133 remainder = (16 * len) % 22;
1134 if (remainder != 0 && remainder < 7)
1135 desc->plcp_service |= RAL_PLCP_LENGEXT;
1136 }
1137 desc->plcp_length_hi = plcp_length >> 8;
1138 desc->plcp_length_lo = plcp_length & 0xff;
1139
1140 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1141 desc->plcp_signal |= 0x08;
1142 }
1143
1144 desc->iv = 0;
1145 desc->eiv = 0;
1146 }
1147
1148 #define RAL_TX_TIMEOUT 5000
1149
1150 Static int
1151 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1152 {
1153 struct ural_tx_desc *desc;
1154 usbd_xfer_handle xfer;
1155 uint8_t cmd = 0;
1156 usbd_status error;
1157 uint8_t *buf;
1158 int xferlen, rate;
1159
1160 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1161
1162 xfer = usbd_alloc_xfer(sc->sc_udev);
1163 if (xfer == NULL)
1164 return ENOMEM;
1165
1166 /* xfer length needs to be a multiple of two! */
1167 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1168
1169 buf = usbd_alloc_buffer(xfer, xferlen);
1170 if (buf == NULL) {
1171 usbd_free_xfer(xfer);
1172 return ENOMEM;
1173 }
1174
1175 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1176 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1177
1178 error = usbd_sync_transfer(xfer);
1179 if (error != 0) {
1180 usbd_free_xfer(xfer);
1181 return error;
1182 }
1183
1184 desc = (struct ural_tx_desc *)buf;
1185
1186 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1187 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1188 m0->m_pkthdr.len, rate);
1189
1190 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1191 m0->m_pkthdr.len, rate, xferlen));
1192
1193 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
1194 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1195
1196 error = usbd_sync_transfer(xfer);
1197 usbd_free_xfer(xfer);
1198
1199 return error;
1200 }
1201
1202 Static int
1203 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1204 {
1205 struct ieee80211com *ic = &sc->sc_ic;
1206 struct ural_tx_desc *desc;
1207 struct ural_tx_data *data;
1208 struct ieee80211_frame *wh;
1209 struct ieee80211_key *k;
1210 uint32_t flags = 0;
1211 uint16_t dur;
1212 usbd_status error;
1213 int xferlen, rate;
1214
1215 data = &sc->tx_data[0];
1216 desc = (struct ural_tx_desc *)data->buf;
1217
1218 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1219
1220 wh = mtod(m0, struct ieee80211_frame *);
1221
1222 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1223 k = ieee80211_crypto_encap(ic, ni, m0);
1224 if (k == NULL) {
1225 m_freem(m0);
1226 return ENOBUFS;
1227 }
1228 }
1229
1230 data->m = m0;
1231 data->ni = ni;
1232
1233 wh = mtod(m0, struct ieee80211_frame *);
1234
1235 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1236 flags |= RAL_TX_ACK;
1237
1238 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS;
1239 *(uint16_t *)wh->i_dur = htole16(dur);
1240
1241 /* tell hardware to add timestamp for probe responses */
1242 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1243 IEEE80211_FC0_TYPE_MGT &&
1244 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1245 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1246 flags |= RAL_TX_TIMESTAMP;
1247 }
1248
1249 #if NBPFILTER > 0
1250 if (sc->sc_drvbpf != NULL) {
1251 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1252
1253 tap->wt_flags = 0;
1254 tap->wt_rate = rate;
1255 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1256 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1257 tap->wt_antenna = sc->tx_ant;
1258
1259 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1260 }
1261 #endif
1262
1263 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1264 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1265
1266 /* align end on a 2-bytes boundary */
1267 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1268
1269 /*
1270 * No space left in the last URB to store the extra 2 bytes, force
1271 * sending of another URB.
1272 */
1273 if ((xferlen % 64) == 0)
1274 xferlen += 2;
1275
1276 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1277 m0->m_pkthdr.len, rate, xferlen));
1278
1279 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1280 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1281 ural_txeof);
1282
1283 error = usbd_transfer(data->xfer);
1284 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1285 m_freem(m0);
1286 return error;
1287 }
1288
1289 sc->tx_queued++;
1290
1291 return 0;
1292 }
1293
1294 Static int
1295 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1296 {
1297 struct ieee80211com *ic = &sc->sc_ic;
1298 struct ural_tx_desc *desc;
1299 struct ural_tx_data *data;
1300 struct ieee80211_frame *wh;
1301 struct ieee80211_key *k;
1302 uint32_t flags = 0;
1303 uint16_t dur;
1304 usbd_status error;
1305 int xferlen, rate;
1306
1307 wh = mtod(m0, struct ieee80211_frame *);
1308
1309 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE)
1310 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate];
1311 else
1312 rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1313
1314 rate &= IEEE80211_RATE_VAL;
1315
1316 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1317 k = ieee80211_crypto_encap(ic, ni, m0);
1318 if (k == NULL) {
1319 m_freem(m0);
1320 return ENOBUFS;
1321 }
1322
1323 /* packet header may have moved, reset our local pointer */
1324 wh = mtod(m0, struct ieee80211_frame *);
1325 }
1326
1327 data = &sc->tx_data[0];
1328 desc = (struct ural_tx_desc *)data->buf;
1329
1330 data->m = m0;
1331 data->ni = ni;
1332
1333 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1334 flags |= RAL_TX_ACK;
1335 flags |= RAL_TX_RETRY(7);
1336
1337 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate),
1338 ic->ic_flags) + RAL_SIFS;
1339 *(uint16_t *)wh->i_dur = htole16(dur);
1340 }
1341
1342 #if NBPFILTER > 0
1343 if (sc->sc_drvbpf != NULL) {
1344 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1345
1346 tap->wt_flags = 0;
1347 tap->wt_rate = rate;
1348 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1349 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1350 tap->wt_antenna = sc->tx_ant;
1351
1352 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1353 }
1354 #endif
1355
1356 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1357 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1358
1359 /* align end on a 2-bytes boundary */
1360 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1361
1362 /*
1363 * No space left in the last URB to store the extra 2 bytes, force
1364 * sending of another URB.
1365 */
1366 if ((xferlen % 64) == 0)
1367 xferlen += 2;
1368
1369 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1370 m0->m_pkthdr.len, rate, xferlen));
1371
1372 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1373 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1374 ural_txeof);
1375
1376 error = usbd_transfer(data->xfer);
1377 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1378 return error;
1379
1380 sc->tx_queued++;
1381
1382 return 0;
1383 }
1384
1385 Static void
1386 ural_start(struct ifnet *ifp)
1387 {
1388 struct ural_softc *sc = ifp->if_softc;
1389 struct ieee80211com *ic = &sc->sc_ic;
1390 struct mbuf *m0;
1391 struct ether_header *eh;
1392 struct ieee80211_node *ni;
1393
1394 for (;;) {
1395 IF_POLL(&ic->ic_mgtq, m0);
1396 if (m0 != NULL) {
1397 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1398 ifp->if_flags |= IFF_OACTIVE;
1399 break;
1400 }
1401 IF_DEQUEUE(&ic->ic_mgtq, m0);
1402
1403 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1404 m0->m_pkthdr.rcvif = NULL;
1405 #if NBPFILTER > 0
1406 if (ic->ic_rawbpf != NULL)
1407 bpf_mtap(ic->ic_rawbpf, m0);
1408 #endif
1409 if (ural_tx_mgt(sc, m0, ni) != 0)
1410 break;
1411
1412 } else {
1413 if (ic->ic_state != IEEE80211_S_RUN)
1414 break;
1415 IFQ_DEQUEUE(&ifp->if_snd, m0);
1416 if (m0 == NULL)
1417 break;
1418 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1419 IF_PREPEND(&ifp->if_snd, m0);
1420 ifp->if_flags |= IFF_OACTIVE;
1421 break;
1422 }
1423
1424 if (m0->m_len < sizeof (struct ether_header) &&
1425 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1426 continue;
1427
1428 eh = mtod(m0, struct ether_header *);
1429 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1430 if (ni == NULL) {
1431 m_freem(m0);
1432 continue;
1433 }
1434 #if NBPFILTER > 0
1435 if (ifp->if_bpf != NULL)
1436 bpf_mtap(ifp->if_bpf, m0);
1437 #endif
1438 m0 = ieee80211_encap(ic, m0, ni);
1439 if (m0 == NULL) {
1440 ieee80211_free_node(ni);
1441 continue;
1442 }
1443 #if NBPFILTER > 0
1444 if (ic->ic_rawbpf != NULL)
1445 bpf_mtap(ic->ic_rawbpf, m0);
1446 #endif
1447 if (ural_tx_data(sc, m0, ni) != 0) {
1448 ieee80211_free_node(ni);
1449 ifp->if_oerrors++;
1450 break;
1451 }
1452 }
1453
1454 sc->sc_tx_timer = 5;
1455 ifp->if_timer = 1;
1456 }
1457 }
1458
1459 Static void
1460 ural_watchdog(struct ifnet *ifp)
1461 {
1462 struct ural_softc *sc = ifp->if_softc;
1463 struct ieee80211com *ic = &sc->sc_ic;
1464
1465 ifp->if_timer = 0;
1466
1467 if (sc->sc_tx_timer > 0) {
1468 if (--sc->sc_tx_timer == 0) {
1469 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev));
1470 /*ural_init(sc); XXX needs a process context! */
1471 ifp->if_oerrors++;
1472 return;
1473 }
1474 ifp->if_timer = 1;
1475 }
1476
1477 ieee80211_watchdog(ic);
1478 }
1479
1480 /*
1481 * This function allows for fast channel switching in monitor mode (used by
1482 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1483 * generate a new beacon frame.
1484 */
1485 Static int
1486 ural_reset(struct ifnet *ifp)
1487 {
1488 struct ural_softc *sc = ifp->if_softc;
1489 struct ieee80211com *ic = &sc->sc_ic;
1490
1491 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1492 return ENETRESET;
1493
1494 ural_set_chan(sc, ic->ic_curchan);
1495
1496 return 0;
1497 }
1498
1499 Static int
1500 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1501 {
1502 struct ural_softc *sc = ifp->if_softc;
1503 struct ieee80211com *ic = &sc->sc_ic;
1504 int s, error = 0;
1505
1506 s = splnet();
1507
1508 switch (cmd) {
1509 case SIOCSIFFLAGS:
1510 if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1511 break;
1512 /* XXX re-use ether_ioctl() */
1513 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
1514 case IFF_UP|IFF_RUNNING:
1515 ural_update_promisc(sc);
1516 break;
1517 case IFF_UP:
1518 ural_init(ifp);
1519 break;
1520 case IFF_RUNNING:
1521 ural_stop(ifp, 1);
1522 break;
1523 case 0:
1524 break;
1525 }
1526 break;
1527
1528 default:
1529 error = ieee80211_ioctl(ic, cmd, data);
1530 }
1531
1532 if (error == ENETRESET) {
1533 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1534 (IFF_UP | IFF_RUNNING))
1535 ural_init(ifp);
1536 error = 0;
1537 }
1538
1539 splx(s);
1540
1541 return error;
1542 }
1543
1544 Static void
1545 ural_set_testmode(struct ural_softc *sc)
1546 {
1547 usb_device_request_t req;
1548 usbd_status error;
1549
1550 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1551 req.bRequest = RAL_VENDOR_REQUEST;
1552 USETW(req.wValue, 4);
1553 USETW(req.wIndex, 1);
1554 USETW(req.wLength, 0);
1555
1556 error = usbd_do_request(sc->sc_udev, &req, NULL);
1557 if (error != 0) {
1558 printf("%s: could not set test mode: %s\n",
1559 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1560 }
1561 }
1562
1563 Static void
1564 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1565 {
1566 usb_device_request_t req;
1567 usbd_status error;
1568
1569 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1570 req.bRequest = RAL_READ_EEPROM;
1571 USETW(req.wValue, 0);
1572 USETW(req.wIndex, addr);
1573 USETW(req.wLength, len);
1574
1575 error = usbd_do_request(sc->sc_udev, &req, buf);
1576 if (error != 0) {
1577 printf("%s: could not read EEPROM: %s\n",
1578 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1579 }
1580 }
1581
1582 Static uint16_t
1583 ural_read(struct ural_softc *sc, uint16_t reg)
1584 {
1585 usb_device_request_t req;
1586 usbd_status error;
1587 uint16_t val;
1588
1589 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1590 req.bRequest = RAL_READ_MAC;
1591 USETW(req.wValue, 0);
1592 USETW(req.wIndex, reg);
1593 USETW(req.wLength, sizeof (uint16_t));
1594
1595 error = usbd_do_request(sc->sc_udev, &req, &val);
1596 if (error != 0) {
1597 printf("%s: could not read MAC register: %s\n",
1598 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1599 return 0;
1600 }
1601
1602 return le16toh(val);
1603 }
1604
1605 Static void
1606 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1607 {
1608 usb_device_request_t req;
1609 usbd_status error;
1610
1611 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1612 req.bRequest = RAL_READ_MULTI_MAC;
1613 USETW(req.wValue, 0);
1614 USETW(req.wIndex, reg);
1615 USETW(req.wLength, len);
1616
1617 error = usbd_do_request(sc->sc_udev, &req, buf);
1618 if (error != 0) {
1619 printf("%s: could not read MAC register: %s\n",
1620 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1621 }
1622 }
1623
1624 Static void
1625 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1626 {
1627 usb_device_request_t req;
1628 usbd_status error;
1629
1630 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1631 req.bRequest = RAL_WRITE_MAC;
1632 USETW(req.wValue, val);
1633 USETW(req.wIndex, reg);
1634 USETW(req.wLength, 0);
1635
1636 error = usbd_do_request(sc->sc_udev, &req, NULL);
1637 if (error != 0) {
1638 printf("%s: could not write MAC register: %s\n",
1639 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1640 }
1641 }
1642
1643 Static void
1644 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1645 {
1646 usb_device_request_t req;
1647 usbd_status error;
1648
1649 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1650 req.bRequest = RAL_WRITE_MULTI_MAC;
1651 USETW(req.wValue, 0);
1652 USETW(req.wIndex, reg);
1653 USETW(req.wLength, len);
1654
1655 error = usbd_do_request(sc->sc_udev, &req, buf);
1656 if (error != 0) {
1657 printf("%s: could not write MAC register: %s\n",
1658 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1659 }
1660 }
1661
1662 Static void
1663 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1664 {
1665 uint16_t tmp;
1666 int ntries;
1667
1668 for (ntries = 0; ntries < 5; ntries++) {
1669 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1670 break;
1671 }
1672 if (ntries == 5) {
1673 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev));
1674 return;
1675 }
1676
1677 tmp = reg << 8 | val;
1678 ural_write(sc, RAL_PHY_CSR7, tmp);
1679 }
1680
1681 Static uint8_t
1682 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1683 {
1684 uint16_t val;
1685 int ntries;
1686
1687 val = RAL_BBP_WRITE | reg << 8;
1688 ural_write(sc, RAL_PHY_CSR7, val);
1689
1690 for (ntries = 0; ntries < 5; ntries++) {
1691 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1692 break;
1693 }
1694 if (ntries == 5) {
1695 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev));
1696 return 0;
1697 }
1698
1699 return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1700 }
1701
1702 Static void
1703 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1704 {
1705 uint32_t tmp;
1706 int ntries;
1707
1708 for (ntries = 0; ntries < 5; ntries++) {
1709 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1710 break;
1711 }
1712 if (ntries == 5) {
1713 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev));
1714 return;
1715 }
1716
1717 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1718 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1719 ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1720
1721 /* remember last written value in sc */
1722 sc->rf_regs[reg] = val;
1723
1724 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1725 }
1726
1727 Static void
1728 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1729 {
1730 struct ieee80211com *ic = &sc->sc_ic;
1731 uint8_t power, tmp;
1732 u_int i, chan;
1733
1734 chan = ieee80211_chan2ieee(ic, c);
1735 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1736 return;
1737
1738 if (IEEE80211_IS_CHAN_2GHZ(c))
1739 power = min(sc->txpow[chan - 1], 31);
1740 else
1741 power = 31;
1742
1743 /* adjust txpower using ifconfig settings */
1744 power -= (100 - ic->ic_txpowlimit) / 8;
1745
1746 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1747
1748 switch (sc->rf_rev) {
1749 case RAL_RF_2522:
1750 ural_rf_write(sc, RAL_RF1, 0x00814);
1751 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1752 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1753 break;
1754
1755 case RAL_RF_2523:
1756 ural_rf_write(sc, RAL_RF1, 0x08804);
1757 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1758 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1759 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1760 break;
1761
1762 case RAL_RF_2524:
1763 ural_rf_write(sc, RAL_RF1, 0x0c808);
1764 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1765 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1766 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1767 break;
1768
1769 case RAL_RF_2525:
1770 ural_rf_write(sc, RAL_RF1, 0x08808);
1771 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1772 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1773 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1774
1775 ural_rf_write(sc, RAL_RF1, 0x08808);
1776 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1777 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1778 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1779 break;
1780
1781 case RAL_RF_2525E:
1782 ural_rf_write(sc, RAL_RF1, 0x08808);
1783 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1784 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1785 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1786 break;
1787
1788 case RAL_RF_2526:
1789 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1790 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1791 ural_rf_write(sc, RAL_RF1, 0x08804);
1792
1793 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1794 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1795 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1796 break;
1797
1798 /* dual-band RF */
1799 case RAL_RF_5222:
1800 for (i = 0; ural_rf5222[i].chan != chan; i++);
1801
1802 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1803 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1804 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1805 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1806 break;
1807 }
1808
1809 if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1810 ic->ic_state != IEEE80211_S_SCAN) {
1811 /* set Japan filter bit for channel 14 */
1812 tmp = ural_bbp_read(sc, 70);
1813
1814 tmp &= ~RAL_JAPAN_FILTER;
1815 if (chan == 14)
1816 tmp |= RAL_JAPAN_FILTER;
1817
1818 ural_bbp_write(sc, 70, tmp);
1819
1820 /* clear CRC errors */
1821 ural_read(sc, RAL_STA_CSR0);
1822
1823 DELAY(10000);
1824 ural_disable_rf_tune(sc);
1825 }
1826 }
1827
1828 /*
1829 * Disable RF auto-tuning.
1830 */
1831 Static void
1832 ural_disable_rf_tune(struct ural_softc *sc)
1833 {
1834 uint32_t tmp;
1835
1836 if (sc->rf_rev != RAL_RF_2523) {
1837 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1838 ural_rf_write(sc, RAL_RF1, tmp);
1839 }
1840
1841 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1842 ural_rf_write(sc, RAL_RF3, tmp);
1843
1844 DPRINTFN(2, ("disabling RF autotune\n"));
1845 }
1846
1847 /*
1848 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1849 * synchronization.
1850 */
1851 Static void
1852 ural_enable_tsf_sync(struct ural_softc *sc)
1853 {
1854 struct ieee80211com *ic = &sc->sc_ic;
1855 uint16_t logcwmin, preload, tmp;
1856
1857 /* first, disable TSF synchronization */
1858 ural_write(sc, RAL_TXRX_CSR19, 0);
1859
1860 tmp = (16 * ic->ic_bss->ni_intval) << 4;
1861 ural_write(sc, RAL_TXRX_CSR18, tmp);
1862
1863 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1864 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1865 tmp = logcwmin << 12 | preload;
1866 ural_write(sc, RAL_TXRX_CSR20, tmp);
1867
1868 /* finally, enable TSF synchronization */
1869 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1870 if (ic->ic_opmode == IEEE80211_M_STA)
1871 tmp |= RAL_ENABLE_TSF_SYNC(1);
1872 else
1873 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1874 ural_write(sc, RAL_TXRX_CSR19, tmp);
1875
1876 DPRINTF(("enabling TSF synchronization\n"));
1877 }
1878
1879 Static void
1880 ural_update_slot(struct ifnet *ifp)
1881 {
1882 struct ural_softc *sc = ifp->if_softc;
1883 struct ieee80211com *ic = &sc->sc_ic;
1884 uint16_t slottime, sifs, eifs;
1885
1886 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1887
1888 /*
1889 * These settings may sound a bit inconsistent but this is what the
1890 * reference driver does.
1891 */
1892 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1893 sifs = 16 - RAL_RXTX_TURNAROUND;
1894 eifs = 364;
1895 } else {
1896 sifs = 10 - RAL_RXTX_TURNAROUND;
1897 eifs = 64;
1898 }
1899
1900 ural_write(sc, RAL_MAC_CSR10, slottime);
1901 ural_write(sc, RAL_MAC_CSR11, sifs);
1902 ural_write(sc, RAL_MAC_CSR12, eifs);
1903 }
1904
1905 Static void
1906 ural_set_txpreamble(struct ural_softc *sc)
1907 {
1908 uint16_t tmp;
1909
1910 tmp = ural_read(sc, RAL_TXRX_CSR10);
1911
1912 tmp &= ~RAL_SHORT_PREAMBLE;
1913 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1914 tmp |= RAL_SHORT_PREAMBLE;
1915
1916 ural_write(sc, RAL_TXRX_CSR10, tmp);
1917 }
1918
1919 Static void
1920 ural_set_basicrates(struct ural_softc *sc)
1921 {
1922 struct ieee80211com *ic = &sc->sc_ic;
1923
1924 /* update basic rate set */
1925 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1926 /* 11b basic rates: 1, 2Mbps */
1927 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1928 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1929 /* 11a basic rates: 6, 12, 24Mbps */
1930 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1931 } else {
1932 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1933 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1934 }
1935 }
1936
1937 Static void
1938 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1939 {
1940 uint16_t tmp;
1941
1942 tmp = bssid[0] | bssid[1] << 8;
1943 ural_write(sc, RAL_MAC_CSR5, tmp);
1944
1945 tmp = bssid[2] | bssid[3] << 8;
1946 ural_write(sc, RAL_MAC_CSR6, tmp);
1947
1948 tmp = bssid[4] | bssid[5] << 8;
1949 ural_write(sc, RAL_MAC_CSR7, tmp);
1950
1951 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
1952 }
1953
1954 Static void
1955 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1956 {
1957 uint16_t tmp;
1958
1959 tmp = addr[0] | addr[1] << 8;
1960 ural_write(sc, RAL_MAC_CSR2, tmp);
1961
1962 tmp = addr[2] | addr[3] << 8;
1963 ural_write(sc, RAL_MAC_CSR3, tmp);
1964
1965 tmp = addr[4] | addr[5] << 8;
1966 ural_write(sc, RAL_MAC_CSR4, tmp);
1967
1968 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
1969 }
1970
1971 Static void
1972 ural_update_promisc(struct ural_softc *sc)
1973 {
1974 struct ifnet *ifp = sc->sc_ic.ic_ifp;
1975 uint32_t tmp;
1976
1977 tmp = ural_read(sc, RAL_TXRX_CSR2);
1978
1979 tmp &= ~RAL_DROP_NOT_TO_ME;
1980 if (!(ifp->if_flags & IFF_PROMISC))
1981 tmp |= RAL_DROP_NOT_TO_ME;
1982
1983 ural_write(sc, RAL_TXRX_CSR2, tmp);
1984
1985 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1986 "entering" : "leaving"));
1987 }
1988
1989 Static const char *
1990 ural_get_rf(int rev)
1991 {
1992 switch (rev) {
1993 case RAL_RF_2522: return "RT2522";
1994 case RAL_RF_2523: return "RT2523";
1995 case RAL_RF_2524: return "RT2524";
1996 case RAL_RF_2525: return "RT2525";
1997 case RAL_RF_2525E: return "RT2525e";
1998 case RAL_RF_2526: return "RT2526";
1999 case RAL_RF_5222: return "RT5222";
2000 default: return "unknown";
2001 }
2002 }
2003
2004 Static void
2005 ural_read_eeprom(struct ural_softc *sc)
2006 {
2007 struct ieee80211com *ic = &sc->sc_ic;
2008 uint16_t val;
2009
2010 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
2011 val = le16toh(val);
2012 sc->rf_rev = (val >> 11) & 0x7;
2013 sc->hw_radio = (val >> 10) & 0x1;
2014 sc->led_mode = (val >> 6) & 0x7;
2015 sc->rx_ant = (val >> 4) & 0x3;
2016 sc->tx_ant = (val >> 2) & 0x3;
2017 sc->nb_ant = val & 0x3;
2018
2019 /* read MAC address */
2020 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
2021
2022 /* read default values for BBP registers */
2023 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
2024
2025 /* read Tx power for all b/g channels */
2026 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
2027 }
2028
2029 Static int
2030 ural_bbp_init(struct ural_softc *sc)
2031 {
2032 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2033 int i, ntries;
2034
2035 /* wait for BBP to be ready */
2036 for (ntries = 0; ntries < 100; ntries++) {
2037 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
2038 break;
2039 DELAY(1000);
2040 }
2041 if (ntries == 100) {
2042 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev));
2043 return EIO;
2044 }
2045
2046 /* initialize BBP registers to default values */
2047 for (i = 0; i < N(ural_def_bbp); i++)
2048 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
2049
2050 #if 0
2051 /* initialize BBP registers to values stored in EEPROM */
2052 for (i = 0; i < 16; i++) {
2053 if (sc->bbp_prom[i].reg == 0xff)
2054 continue;
2055 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2056 }
2057 #endif
2058
2059 return 0;
2060 #undef N
2061 }
2062
2063 Static void
2064 ural_set_txantenna(struct ural_softc *sc, int antenna)
2065 {
2066 uint16_t tmp;
2067 uint8_t tx;
2068
2069 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2070 if (antenna == 1)
2071 tx |= RAL_BBP_ANTA;
2072 else if (antenna == 2)
2073 tx |= RAL_BBP_ANTB;
2074 else
2075 tx |= RAL_BBP_DIVERSITY;
2076
2077 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2078 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2079 sc->rf_rev == RAL_RF_5222)
2080 tx |= RAL_BBP_FLIPIQ;
2081
2082 ural_bbp_write(sc, RAL_BBP_TX, tx);
2083
2084 /* update values in PHY_CSR5 and PHY_CSR6 */
2085 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2086 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2087
2088 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2089 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2090 }
2091
2092 Static void
2093 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2094 {
2095 uint8_t rx;
2096
2097 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2098 if (antenna == 1)
2099 rx |= RAL_BBP_ANTA;
2100 else if (antenna == 2)
2101 rx |= RAL_BBP_ANTB;
2102 else
2103 rx |= RAL_BBP_DIVERSITY;
2104
2105 /* need to force no I/Q flip for RF 2525e and 2526 */
2106 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2107 rx &= ~RAL_BBP_FLIPIQ;
2108
2109 ural_bbp_write(sc, RAL_BBP_RX, rx);
2110 }
2111
2112 Static int
2113 ural_init(struct ifnet *ifp)
2114 {
2115 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2116 struct ural_softc *sc = ifp->if_softc;
2117 struct ieee80211com *ic = &sc->sc_ic;
2118 struct ieee80211_key *wk;
2119 struct ural_rx_data *data;
2120 uint16_t tmp;
2121 usbd_status error;
2122 int i, ntries;
2123
2124 ural_set_testmode(sc);
2125 ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2126
2127 ural_stop(ifp, 0);
2128
2129 /* initialize MAC registers to default values */
2130 for (i = 0; i < N(ural_def_mac); i++)
2131 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2132
2133 /* wait for BBP and RF to wake up (this can take a long time!) */
2134 for (ntries = 0; ntries < 100; ntries++) {
2135 tmp = ural_read(sc, RAL_MAC_CSR17);
2136 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2137 (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2138 break;
2139 DELAY(1000);
2140 }
2141 if (ntries == 100) {
2142 printf("%s: timeout waiting for BBP/RF to wakeup\n",
2143 USBDEVNAME(sc->sc_dev));
2144 error = EIO;
2145 goto fail;
2146 }
2147
2148 /* we're ready! */
2149 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2150
2151 /* set basic rate set (will be updated later) */
2152 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2153
2154 error = ural_bbp_init(sc);
2155 if (error != 0)
2156 goto fail;
2157
2158 /* set default BSS channel */
2159 ural_set_chan(sc, ic->ic_curchan);
2160
2161 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2162 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2163
2164 ural_set_txantenna(sc, sc->tx_ant);
2165 ural_set_rxantenna(sc, sc->rx_ant);
2166
2167 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
2168 ural_set_macaddr(sc, ic->ic_myaddr);
2169
2170 /*
2171 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
2172 */
2173 for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2174 wk = &ic->ic_crypto.cs_nw_keys[i];
2175 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE +
2176 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE);
2177 }
2178
2179 /*
2180 * Allocate xfer for AMRR statistics requests.
2181 */
2182 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev);
2183 if (sc->amrr_xfer == NULL) {
2184 printf("%s: could not allocate AMRR xfer\n",
2185 USBDEVNAME(sc->sc_dev));
2186 goto fail;
2187 }
2188
2189 /*
2190 * Open Tx and Rx USB bulk pipes.
2191 */
2192 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2193 &sc->sc_tx_pipeh);
2194 if (error != 0) {
2195 printf("%s: could not open Tx pipe: %s\n",
2196 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2197 goto fail;
2198 }
2199
2200 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2201 &sc->sc_rx_pipeh);
2202 if (error != 0) {
2203 printf("%s: could not open Rx pipe: %s\n",
2204 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2205 goto fail;
2206 }
2207
2208 /*
2209 * Allocate Tx and Rx xfer queues.
2210 */
2211 error = ural_alloc_tx_list(sc);
2212 if (error != 0) {
2213 printf("%s: could not allocate Tx list\n",
2214 USBDEVNAME(sc->sc_dev));
2215 goto fail;
2216 }
2217
2218 error = ural_alloc_rx_list(sc);
2219 if (error != 0) {
2220 printf("%s: could not allocate Rx list\n",
2221 USBDEVNAME(sc->sc_dev));
2222 goto fail;
2223 }
2224
2225 /*
2226 * Start up the receive pipe.
2227 */
2228 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2229 data = &sc->rx_data[i];
2230
2231 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2232 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2233 usbd_transfer(data->xfer);
2234 }
2235
2236 /* kick Rx */
2237 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
2238 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2239 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
2240 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2241 tmp |= RAL_DROP_TODS;
2242 if (!(ifp->if_flags & IFF_PROMISC))
2243 tmp |= RAL_DROP_NOT_TO_ME;
2244 }
2245 ural_write(sc, RAL_TXRX_CSR2, tmp);
2246
2247 ifp->if_flags &= ~IFF_OACTIVE;
2248 ifp->if_flags |= IFF_RUNNING;
2249
2250 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2251 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2252 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2253 } else
2254 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2255
2256 return 0;
2257
2258 fail: ural_stop(ifp, 1);
2259 return error;
2260 #undef N
2261 }
2262
2263 Static void
2264 ural_stop(struct ifnet *ifp, int disable)
2265 {
2266 struct ural_softc *sc = ifp->if_softc;
2267 struct ieee80211com *ic = &sc->sc_ic;
2268
2269 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2270
2271 sc->sc_tx_timer = 0;
2272 ifp->if_timer = 0;
2273 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2274
2275 /* disable Rx */
2276 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2277
2278 /* reset ASIC and BBP (but won't reset MAC registers!) */
2279 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2280 ural_write(sc, RAL_MAC_CSR1, 0);
2281
2282 if (sc->amrr_xfer != NULL) {
2283 usbd_free_xfer(sc->amrr_xfer);
2284 sc->amrr_xfer = NULL;
2285 }
2286
2287 if (sc->sc_rx_pipeh != NULL) {
2288 usbd_abort_pipe(sc->sc_rx_pipeh);
2289 usbd_close_pipe(sc->sc_rx_pipeh);
2290 sc->sc_rx_pipeh = NULL;
2291 }
2292
2293 if (sc->sc_tx_pipeh != NULL) {
2294 usbd_abort_pipe(sc->sc_tx_pipeh);
2295 usbd_close_pipe(sc->sc_tx_pipeh);
2296 sc->sc_tx_pipeh = NULL;
2297 }
2298
2299 ural_free_rx_list(sc);
2300 ural_free_tx_list(sc);
2301 }
2302
2303 int
2304 ural_activate(device_ptr_t self, enum devact act)
2305 {
2306 struct ural_softc *sc = device_private(self);
2307
2308 switch (act) {
2309 case DVACT_DEACTIVATE:
2310 if_deactivate(&sc->sc_if);
2311 return 0;
2312 default:
2313 return EOPNOTSUPP;
2314 }
2315 }
2316
2317 Static void
2318 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
2319 {
2320 int i;
2321
2322 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2323 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2324
2325 ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
2326
2327 /* set rate to some reasonable initial value */
2328 for (i = ni->ni_rates.rs_nrates - 1;
2329 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
2330 i--);
2331 ni->ni_txrate = i;
2332
2333 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2334 }
2335
2336 Static void
2337 ural_amrr_timeout(void *arg)
2338 {
2339 struct ural_softc *sc = (struct ural_softc *)arg;
2340 usb_device_request_t req;
2341 int s;
2342
2343 s = splusb();
2344
2345 /*
2346 * Asynchronously read statistic registers (cleared by read).
2347 */
2348 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2349 req.bRequest = RAL_READ_MULTI_MAC;
2350 USETW(req.wValue, 0);
2351 USETW(req.wIndex, RAL_STA_CSR0);
2352 USETW(req.wLength, sizeof sc->sta);
2353
2354 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
2355 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0,
2356 ural_amrr_update);
2357 (void)usbd_transfer(sc->amrr_xfer);
2358
2359 splx(s);
2360 }
2361
2362 Static void
2363 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv,
2364 usbd_status status)
2365 {
2366 struct ural_softc *sc = (struct ural_softc *)priv;
2367 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2368
2369 if (status != USBD_NORMAL_COMPLETION) {
2370 printf("%s: could not retrieve Tx statistics - "
2371 "cancelling automatic rate control\n",
2372 USBDEVNAME(sc->sc_dev));
2373 return;
2374 }
2375
2376 /* count TX retry-fail as Tx errors */
2377 ifp->if_oerrors += sc->sta[9];
2378
2379 sc->amn.amn_retrycnt =
2380 sc->sta[7] + /* TX one-retry ok count */
2381 sc->sta[8] + /* TX more-retry ok count */
2382 sc->sta[9]; /* TX retry-fail count */
2383
2384 sc->amn.amn_txcnt =
2385 sc->amn.amn_retrycnt +
2386 sc->sta[6]; /* TX no-retry ok count */
2387
2388 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
2389
2390 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2391 }
NetBSD on the FriendlyARM MINI2440