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[netbsd-mini2440.git] / sys / external / bsd / drm / dist / libdrm / intel / intel_bufmgr.h
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1 /*
2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
28 /**
29 * @file intel_bufmgr.h
31 * Public definitions of Intel-specific bufmgr functions.
34 #ifndef INTEL_BUFMGR_H
35 #define INTEL_BUFMGR_H
37 #include <stdint.h>
39 typedef struct _drm_intel_bufmgr drm_intel_bufmgr;
40 typedef struct _drm_intel_bo drm_intel_bo;
42 struct _drm_intel_bo {
43 /**
44 * Size in bytes of the buffer object.
46 * The size may be larger than the size originally requested for the
47 * allocation, such as being aligned to page size.
49 unsigned long size;
50 /**
51 * Alignment requirement for object
53 * Used for GTT mapping & pinning the object.
55 unsigned long align;
57 /**
58 * Card virtual address (offset from the beginning of the aperture) for the
59 * object. Only valid while validated.
61 unsigned long offset;
62 /**
63 * Virtual address for accessing the buffer data. Only valid while mapped.
65 void *virtual;
67 /** Buffer manager context associated with this buffer object */
68 drm_intel_bufmgr *bufmgr;
70 /**
71 * MM-specific handle for accessing object
73 int handle;
76 drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
77 unsigned long size, unsigned int alignment);
78 drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
79 const char *name,
80 unsigned long size,
81 unsigned int alignment);
82 void drm_intel_bo_reference(drm_intel_bo *bo);
83 void drm_intel_bo_unreference(drm_intel_bo *bo);
84 int drm_intel_bo_map(drm_intel_bo *bo, int write_enable);
85 int drm_intel_bo_unmap(drm_intel_bo *bo);
87 int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
88 unsigned long size, const void *data);
89 int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
90 unsigned long size, void *data);
91 void drm_intel_bo_wait_rendering(drm_intel_bo *bo);
93 void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug);
94 void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr);
95 int drm_intel_bo_exec(drm_intel_bo *bo, int used,
96 drm_clip_rect_t *cliprects, int num_cliprects,
97 int DR4);
98 int drm_intel_bufmgr_check_aperture_space(drm_intel_bo **bo_array, int count);
100 int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
101 drm_intel_bo *target_bo, uint32_t target_offset,
102 uint32_t read_domains, uint32_t write_domain);
103 int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment);
104 int drm_intel_bo_unpin(drm_intel_bo *bo);
105 int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t *tiling_mode,
106 uint32_t stride);
107 int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t *tiling_mode,
108 uint32_t *swizzle_mode);
109 int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t *name);
111 int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
113 /* drm_intel_bufmgr_gem.c */
114 drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size);
115 drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
116 const char *name,
117 unsigned int handle);
118 void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);
119 int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo);
120 int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
121 void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable);
123 int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id);
125 /* drm_intel_bufmgr_fake.c */
126 drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd,
127 unsigned long low_offset,
128 void *low_virtual,
129 unsigned long size,
130 volatile unsigned int *last_dispatch);
131 void drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr,
132 volatile unsigned int *last_dispatch);
133 void drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr,
134 int (*exec)(drm_intel_bo *bo,
135 unsigned int used,
136 void *priv),
137 void *priv);
138 void drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr,
139 unsigned int (*emit)(void *priv),
140 void (*wait)(unsigned int fence,
141 void *priv),
142 void *priv);
143 drm_intel_bo *drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr,
144 const char *name,
145 unsigned long offset, unsigned long size,
146 void *virtual);
147 void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo,
148 void (*invalidate_cb)(drm_intel_bo *bo,
149 void *ptr),
150 void *ptr);
152 void drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr);
153 void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr);
155 /** @{ Compatibility defines to keep old code building despite the symbol rename
156 * from dri_* to drm_intel_*
158 #define dri_bo drm_intel_bo
159 #define dri_bufmgr drm_intel_bufmgr
160 #define dri_bo_alloc drm_intel_bo_alloc
161 #define dri_bo_reference drm_intel_bo_reference
162 #define dri_bo_unreference drm_intel_bo_unreference
163 #define dri_bo_map drm_intel_bo_map
164 #define dri_bo_unmap drm_intel_bo_unmap
165 #define dri_bo_subdata drm_intel_bo_subdata
166 #define dri_bo_get_subdata drm_intel_bo_get_subdata
167 #define dri_bo_wait_rendering drm_intel_bo_wait_rendering
168 #define dri_bufmgr_set_debug drm_intel_bufmgr_set_debug
169 #define dri_bufmgr_destroy drm_intel_bufmgr_destroy
170 #define dri_bo_exec drm_intel_bo_exec
171 #define dri_bufmgr_check_aperture_space drm_intel_bufmgr_check_aperture_space
172 #define dri_bo_emit_reloc(reloc_bo, read, write, target_offset, \
173 reloc_offset, target_bo) \
174 drm_intel_bo_emit_reloc(reloc_bo, reloc_offset, \
175 target_bo, target_offset, \
176 read, write);
177 #define dri_bo_pin drm_intel_bo_pin
178 #define dri_bo_unpin drm_intel_bo_unpin
179 #define dri_bo_get_tiling drm_intel_bo_get_tiling
180 #define dri_bo_set_tiling(bo, mode) drm_intel_bo_set_tiling(bo, mode, 0)
181 #define dri_bo_flink drm_intel_bo_flink
182 #define intel_bufmgr_gem_init drm_intel_bufmgr_gem_init
183 #define intel_bo_gem_create_from_name drm_intel_bo_gem_create_from_name
184 #define intel_bufmgr_gem_enable_reuse drm_intel_bufmgr_gem_enable_reuse
185 #define intel_bufmgr_fake_init drm_intel_bufmgr_fake_init
186 #define intel_bufmgr_fake_set_last_dispatch drm_intel_bufmgr_fake_set_last_dispatch
187 #define intel_bufmgr_fake_set_exec_callback drm_intel_bufmgr_fake_set_exec_callback
188 #define intel_bufmgr_fake_set_fence_callback drm_intel_bufmgr_fake_set_fence_callback
189 #define intel_bo_fake_alloc_static drm_intel_bo_fake_alloc_static
190 #define intel_bo_fake_disable_backing_store drm_intel_bo_fake_disable_backing_store
191 #define intel_bufmgr_fake_contended_lock_take drm_intel_bufmgr_fake_contended_lock_take
192 #define intel_bufmgr_fake_evict_all drm_intel_bufmgr_fake_evict_all
194 /** @{ */
196 #endif /* INTEL_BUFMGR_H */