sys/external/bsd/drm/dist/shared-core/nouveau_drv.h

   1 /*
   2  * Copyright 2005 Stephane Marchesin.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 #ifndef __NOUVEAU_DRV_H__
  26 #define __NOUVEAU_DRV_H__
  27
  28 #define DRIVER_AUTHOR           "Stephane Marchesin"
  29 #define DRIVER_EMAIL            "dri-devel@lists.sourceforge.net"
  30
  31 #define DRIVER_NAME             "nouveau"
  32 #define DRIVER_DESC             "nVidia Riva/TNT/GeForce"
  33 #define DRIVER_DATE             "20060213"
  34
  35 #define DRIVER_MAJOR            0
  36 #define DRIVER_MINOR            0
  37 #define DRIVER_PATCHLEVEL       12
  38
  39 #define NOUVEAU_FAMILY   0x0000FFFF
  40 #define NOUVEAU_FLAGS    0xFFFF0000
  41
  42 #include "nouveau_drm.h"
  43 #include "nouveau_reg.h"
  44
  45 struct mem_block {
  46         struct mem_block *next;
  47         struct mem_block *prev;
  48         uint64_t start;
  49         uint64_t size;
  50         struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
  51         int flags;
  52         drm_local_map_t *map;
  53         drm_handle_t map_handle;
  54 };
  55
  56 enum nouveau_flags {
  57         NV_NFORCE   =0x10000000,
  58         NV_NFORCE2  =0x20000000
  59 };
  60
  61 #define NVOBJ_ENGINE_SW         0
  62 #define NVOBJ_ENGINE_GR         1
  63 #define NVOBJ_ENGINE_INT        0xdeadbeef
  64
  65 #define NVOBJ_FLAG_ALLOW_NO_REFS        (1 << 0)
  66 #define NVOBJ_FLAG_ZERO_ALLOC           (1 << 1)
  67 #define NVOBJ_FLAG_ZERO_FREE            (1 << 2)
  68 #define NVOBJ_FLAG_FAKE                 (1 << 3)
  69 struct nouveau_gpuobj {
  70         struct list_head list;
  71
  72         int im_channel;
  73         struct mem_block *im_pramin;
  74         struct mem_block *im_backing;
  75         int im_bound;
  76
  77         uint32_t flags;
  78         int refcount;
  79
  80         uint32_t engine;
  81         uint32_t class;
  82
  83         void (*dtor)(struct drm_device *, struct nouveau_gpuobj *);
  84         void *priv;
  85 };
  86
  87 struct nouveau_gpuobj_ref {
  88         struct list_head list;
  89
  90         struct nouveau_gpuobj *gpuobj;
  91         uint32_t instance;
  92
  93         int channel;
  94         int handle;
  95 };
  96
  97 struct nouveau_channel
  98 {
  99         struct drm_device *dev;
 100         int id;
 101
 102         /* owner of this fifo */
 103         struct drm_file *file_priv;
 104         /* mapping of the fifo itself */
 105         drm_local_map_t *map;
 106         /* mapping of the regs controling the fifo */
 107         drm_local_map_t *regs;
 108
 109         /* Fencing */
 110         uint32_t next_sequence;
 111
 112         /* DMA push buffer */
 113         struct nouveau_gpuobj_ref *pushbuf;
 114         struct mem_block          *pushbuf_mem;
 115         uint32_t                   pushbuf_base;
 116
 117         /* FIFO user control regs */
 118         uint32_t user, user_size;
 119         uint32_t put;
 120         uint32_t get;
 121         uint32_t ref_cnt;
 122
 123         /* Notifier memory */
 124         struct mem_block *notifier_block;
 125         struct mem_block *notifier_heap;
 126         drm_local_map_t  *notifier_map;
 127
 128         /* PFIFO context */
 129         struct nouveau_gpuobj_ref *ramfc;
 130
 131         /* PGRAPH context */
 132         /* XXX may be merge 2 pointers as private data ??? */
 133         struct nouveau_gpuobj_ref *ramin_grctx;
 134         void *pgraph_ctx;
 135
 136         /* NV50 VM */
 137         struct nouveau_gpuobj     *vm_pd;
 138         struct nouveau_gpuobj_ref *vm_gart_pt;
 139         struct nouveau_gpuobj_ref *vm_vram_pt;
 140
 141         /* Objects */
 142         struct nouveau_gpuobj_ref *ramin; /* Private instmem */
 143         struct mem_block          *ramin_heap; /* Private PRAMIN heap */
 144         struct nouveau_gpuobj_ref *ramht; /* Hash table */
 145         struct list_head           ramht_refs; /* Objects referenced by RAMHT */
 146 };
 147
 148 struct nouveau_drm_channel {
 149         struct nouveau_channel *chan;
 150
 151         /* DMA state */
 152         int max, put, cur, free;
 153         int push_free;
 154         volatile uint32_t *pushbuf;
 155
 156         /* Notifiers */
 157         uint32_t notify0_offset;
 158
 159         /* Buffer moves */
 160         uint32_t m2mf_dma_source;
 161         uint32_t m2mf_dma_destin;
 162 };
 163
 164 struct nouveau_config {
 165         struct {
 166                 int location;
 167                 int size;
 168         } cmdbuf;
 169 };
 170
 171 struct nouveau_instmem_engine {
 172         void    *priv;
 173
 174         int     (*init)(struct drm_device *dev);
 175         void    (*takedown)(struct drm_device *dev);
 176
 177         int     (*populate)(struct drm_device *, struct nouveau_gpuobj *,
 178                             uint32_t *size);
 179         void    (*clear)(struct drm_device *, struct nouveau_gpuobj *);
 180         int     (*bind)(struct drm_device *, struct nouveau_gpuobj *);
 181         int     (*unbind)(struct drm_device *, struct nouveau_gpuobj *);
 182 };
 183
 184 struct nouveau_mc_engine {
 185         int  (*init)(struct drm_device *dev);
 186         void (*takedown)(struct drm_device *dev);
 187 };
 188
 189 struct nouveau_timer_engine {
 190         int      (*init)(struct drm_device *dev);
 191         void     (*takedown)(struct drm_device *dev);
 192         uint64_t (*read)(struct drm_device *dev);
 193 };
 194
 195 struct nouveau_fb_engine {
 196         int  (*init)(struct drm_device *dev);
 197         void (*takedown)(struct drm_device *dev);
 198 };
 199
 200 struct nouveau_fifo_engine {
 201         void *priv;
 202
 203         int  channels;
 204
 205         int  (*init)(struct drm_device *);
 206         void (*takedown)(struct drm_device *);
 207
 208         int  (*channel_id)(struct drm_device *);
 209
 210         int  (*create_context)(struct nouveau_channel *);
 211         void (*destroy_context)(struct nouveau_channel *);
 212         int  (*load_context)(struct nouveau_channel *);
 213         int  (*save_context)(struct nouveau_channel *);
 214 };
 215
 216 struct nouveau_pgraph_engine {
 217         int  (*init)(struct drm_device *);
 218         void (*takedown)(struct drm_device *);
 219
 220         int  (*create_context)(struct nouveau_channel *);
 221         void (*destroy_context)(struct nouveau_channel *);
 222         int  (*load_context)(struct nouveau_channel *);
 223         int  (*save_context)(struct nouveau_channel *);
 224 };
 225
 226 struct nouveau_engine {
 227         struct nouveau_instmem_engine instmem;
 228         struct nouveau_mc_engine      mc;
 229         struct nouveau_timer_engine   timer;
 230         struct nouveau_fb_engine      fb;
 231         struct nouveau_pgraph_engine  graph;
 232         struct nouveau_fifo_engine    fifo;
 233 };
 234
 235 #define NOUVEAU_MAX_CHANNEL_NR 128
 236 struct drm_nouveau_private {
 237         enum {
 238                 NOUVEAU_CARD_INIT_DOWN,
 239                 NOUVEAU_CARD_INIT_DONE,
 240                 NOUVEAU_CARD_INIT_FAILED
 241         } init_state;
 242
 243         int ttm;
 244
 245         /* the card type, takes NV_* as values */
 246         int card_type;
 247         /* exact chipset, derived from NV_PMC_BOOT_0 */
 248         int chipset;
 249         int flags;
 250
 251         drm_local_map_t *mmio;
 252         drm_local_map_t *fb;
 253         drm_local_map_t *ramin; /* NV40 onwards */
 254
 255         int fifo_alloc_count;
 256         struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR];
 257
 258         struct nouveau_engine Engine;
 259         struct nouveau_drm_channel channel;
 260
 261         /* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */
 262         struct nouveau_gpuobj *ramht;
 263         uint32_t ramin_rsvd_vram;
 264         uint32_t ramht_offset;
 265         uint32_t ramht_size;
 266         uint32_t ramht_bits;
 267         uint32_t ramfc_offset;
 268         uint32_t ramfc_size;
 269         uint32_t ramro_offset;
 270         uint32_t ramro_size;
 271
 272         /* base physical adresses */
 273         uint64_t fb_phys;
 274         uint64_t fb_available_size;
 275
 276         struct {
 277                 enum {
 278                         NOUVEAU_GART_NONE = 0,
 279                         NOUVEAU_GART_AGP,
 280                         NOUVEAU_GART_SGDMA
 281                 } type;
 282                 uint64_t aper_base;
 283                 uint64_t aper_size;
 284
 285                 struct nouveau_gpuobj *sg_ctxdma;
 286                 struct page *sg_dummy_page;
 287                 dma_addr_t sg_dummy_bus;
 288
 289                 /* nottm hack */
 290                 struct drm_ttm_backend *sg_be;
 291                 unsigned long sg_handle;
 292         } gart_info;
 293
 294         /* G8x global VRAM page table */
 295         struct nouveau_gpuobj *vm_vram_pt;
 296
 297         /* the mtrr covering the FB */
 298         int fb_mtrr;
 299
 300         struct mem_block *agp_heap;
 301         struct mem_block *fb_heap;
 302         struct mem_block *fb_nomap_heap;
 303         struct mem_block *ramin_heap;
 304         struct mem_block *pci_heap;
 305
 306         /* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
 307         uint32_t ctx_table_size;
 308         struct nouveau_gpuobj_ref *ctx_table;
 309
 310         struct nouveau_config config;
 311
 312         struct list_head gpuobj_list;
 313
 314         struct nouveau_suspend_resume {
 315                 uint32_t fifo_mode;
 316                 uint32_t graph_ctx_control;
 317                 uint32_t graph_state;
 318                 uint32_t *ramin_copy;
 319                 uint64_t ramin_size;
 320         } susres;
 321         struct backlight_device *backlight;
 322 };
 323
 324 #define NOUVEAU_CHECK_INITIALISED_WITH_RETURN do {         \
 325         struct drm_nouveau_private *nv = dev->dev_private; \
 326         if (nv->init_state != NOUVEAU_CARD_INIT_DONE) {    \
 327                 DRM_ERROR("called without init\n");        \
 328                 return -EINVAL;                            \
 329         }                                                  \
 330 } while(0)
 331
 332 #define NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(id,cl,ch) do {  \
 333         struct drm_nouveau_private *nv = dev->dev_private;   \
 334         if (!nouveau_fifo_owner(dev, (cl), (id))) {          \
 335                 DRM_ERROR("pid %d doesn't own channel %d\n", \
 336                           DRM_CURRENTPID, (id));             \
 337                 return -EPERM;                               \
 338         }                                                    \
 339         (ch) = nv->fifos[(id)];                              \
 340 } while(0)
 341
 342 /* nouveau_state.c */
 343 extern void nouveau_preclose(struct drm_device *dev, struct drm_file *);
 344 extern int  nouveau_load(struct drm_device *, unsigned long flags);
 345 extern int  nouveau_firstopen(struct drm_device *);
 346 extern void nouveau_lastclose(struct drm_device *);
 347 extern int  nouveau_unload(struct drm_device *);
 348 extern int  nouveau_ioctl_getparam(struct drm_device *, void *data,
 349                                    struct drm_file *);
 350 extern int  nouveau_ioctl_setparam(struct drm_device *, void *data,
 351                                    struct drm_file *);
 352 extern void nouveau_wait_for_idle(struct drm_device *);
 353 extern int  nouveau_card_init(struct drm_device *);
 354 extern int  nouveau_ioctl_card_init(struct drm_device *, void *data,
 355                                     struct drm_file *);
 356 extern int  nouveau_ioctl_suspend(struct drm_device *, void *data,
 357                                   struct drm_file *);
 358 extern int  nouveau_ioctl_resume(struct drm_device *, void *data,
 359                                  struct drm_file *);
 360
 361 /* nouveau_mem.c */
 362 extern int  nouveau_mem_init_heap(struct mem_block **, uint64_t start,
 363                                  uint64_t size);
 364 extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
 365                                                  uint64_t size, int align2,
 366                                                  struct drm_file *, int tail);
 367 extern void nouveau_mem_takedown(struct mem_block **heap);
 368 extern void nouveau_mem_free_block(struct mem_block *);
 369 extern uint64_t nouveau_mem_fb_amount(struct drm_device *);
 370 extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
 371 extern int  nouveau_ioctl_mem_alloc(struct drm_device *, void *data,
 372                                     struct drm_file *);
 373 extern int  nouveau_ioctl_mem_free(struct drm_device *, void *data,
 374                                    struct drm_file *);
 375 extern int  nouveau_ioctl_mem_tile(struct drm_device *, void *data,
 376                                    struct drm_file *);
 377 extern struct mem_block* nouveau_mem_alloc(struct drm_device *,
 378                                            int alignment, uint64_t size,
 379                                            int flags, struct drm_file *);
 380 extern void nouveau_mem_free(struct drm_device *dev, struct mem_block*);
 381 extern int  nouveau_mem_init(struct drm_device *);
 382 extern int  nouveau_mem_init_ttm(struct drm_device *);
 383 extern void nouveau_mem_close(struct drm_device *);
 384
 385 /* nouveau_notifier.c */
 386 extern int  nouveau_notifier_init_channel(struct nouveau_channel *);
 387 extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);
 388 extern int  nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle,
 389                                    int cout, uint32_t *offset);
 390 extern int  nouveau_ioctl_notifier_alloc(struct drm_device *, void *data,
 391                                          struct drm_file *);
 392 extern int  nouveau_ioctl_notifier_free(struct drm_device *, void *data,
 393                                         struct drm_file *);
 394
 395 /* nouveau_fifo.c */
 396 extern int  nouveau_fifo_init(struct drm_device *);
 397 extern int  nouveau_fifo_ctx_size(struct drm_device *);
 398 extern void nouveau_fifo_cleanup(struct drm_device *, struct drm_file *);
 399 extern int  nouveau_fifo_owner(struct drm_device *, struct drm_file *,
 400                                int channel);
 401 extern int  nouveau_fifo_alloc(struct drm_device *dev,
 402                                struct nouveau_channel **chan,
 403                                struct drm_file *file_priv,
 404                                struct mem_block *pushbuf,
 405                                uint32_t fb_ctxdma, uint32_t tt_ctxdma);
 406 extern void nouveau_fifo_free(struct nouveau_channel *);
 407 extern int  nouveau_channel_idle(struct nouveau_channel *chan);
 408
 409 /* nouveau_object.c */
 410 extern int  nouveau_gpuobj_early_init(struct drm_device *);
 411 extern int  nouveau_gpuobj_init(struct drm_device *);
 412 extern void nouveau_gpuobj_takedown(struct drm_device *);
 413 extern void nouveau_gpuobj_late_takedown(struct drm_device *);
 414 extern int nouveau_gpuobj_channel_init(struct nouveau_channel *,
 415                                        uint32_t vram_h, uint32_t tt_h);
 416 extern void nouveau_gpuobj_channel_takedown(struct nouveau_channel *);
 417 extern int nouveau_gpuobj_new(struct drm_device *, struct nouveau_channel *,
 418                               int size, int align, uint32_t flags,
 419                               struct nouveau_gpuobj **);
 420 extern int nouveau_gpuobj_del(struct drm_device *, struct nouveau_gpuobj **);
 421 extern int nouveau_gpuobj_ref_add(struct drm_device *, struct nouveau_channel *,
 422                                   uint32_t handle, struct nouveau_gpuobj *,
 423                                   struct nouveau_gpuobj_ref **);
 424 extern int nouveau_gpuobj_ref_del(struct drm_device *,
 425                                   struct nouveau_gpuobj_ref **);
 426 extern int nouveau_gpuobj_ref_find(struct nouveau_channel *, uint32_t handle,
 427                                    struct nouveau_gpuobj_ref **ref_ret);
 428 extern int nouveau_gpuobj_new_ref(struct drm_device *,
 429                                   struct nouveau_channel *alloc_chan,
 430                                   struct nouveau_channel *ref_chan,
 431                                   uint32_t handle, int size, int align,
 432                                   uint32_t flags, struct nouveau_gpuobj_ref **);
 433 extern int nouveau_gpuobj_new_fake(struct drm_device *,
 434                                    uint32_t p_offset, uint32_t b_offset,
 435                                    uint32_t size, uint32_t flags,
 436                                    struct nouveau_gpuobj **,
 437                                    struct nouveau_gpuobj_ref**);
 438 extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class,
 439                                   uint64_t offset, uint64_t size, int access,
 440                                   int target, struct nouveau_gpuobj **);
 441 extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
 442                                        uint64_t offset, uint64_t size,
 443                                        int access, struct nouveau_gpuobj **,
 444                                        uint32_t *o_ret);
 445 extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
 446                                  struct nouveau_gpuobj **);
 447 extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
 448                                      struct drm_file *);
 449 extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
 450                                      struct drm_file *);
 451
 452 /* nouveau_irq.c */
 453 extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
 454 extern void        nouveau_irq_preinstall(struct drm_device *);
 455 extern int         nouveau_irq_postinstall(struct drm_device *);
 456 extern void        nouveau_irq_uninstall(struct drm_device *);
 457
 458 /* nouveau_sgdma.c */
 459 extern int nouveau_sgdma_init(struct drm_device *);
 460 extern void nouveau_sgdma_takedown(struct drm_device *);
 461 extern int nouveau_sgdma_get_page(struct drm_device *, uint32_t offset,
 462                                   uint32_t *page);
 463 extern struct drm_ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *);
 464 extern int nouveau_sgdma_nottm_hack_init(struct drm_device *);
 465 extern void nouveau_sgdma_nottm_hack_takedown(struct drm_device *);
 466
 467 /* nouveau_dma.c */
 468 extern int  nouveau_dma_channel_init(struct drm_device *);
 469 extern void nouveau_dma_channel_takedown(struct drm_device *);
 470 extern int  nouveau_dma_wait(struct drm_device *, int size);
 471
 472 /* nouveau_backlight.c */
 473 extern int nouveau_backlight_init(struct drm_device *);
 474 extern void nouveau_backlight_exit(struct drm_device *);
 475
 476 /* nv04_fb.c */
 477 extern int  nv04_fb_init(struct drm_device *);
 478 extern void nv04_fb_takedown(struct drm_device *);
 479
 480 /* nv10_fb.c */
 481 extern int  nv10_fb_init(struct drm_device *);
 482 extern void nv10_fb_takedown(struct drm_device *);
 483
 484 /* nv40_fb.c */
 485 extern int  nv40_fb_init(struct drm_device *);
 486 extern void nv40_fb_takedown(struct drm_device *);
 487
 488 /* nv04_fifo.c */
 489 extern int  nv04_fifo_channel_id(struct drm_device *);
 490 extern int  nv04_fifo_create_context(struct nouveau_channel *);
 491 extern void nv04_fifo_destroy_context(struct nouveau_channel *);
 492 extern int  nv04_fifo_load_context(struct nouveau_channel *);
 493 extern int  nv04_fifo_save_context(struct nouveau_channel *);
 494
 495 /* nv10_fifo.c */
 496 extern int  nv10_fifo_channel_id(struct drm_device *);
 497 extern int  nv10_fifo_create_context(struct nouveau_channel *);
 498 extern void nv10_fifo_destroy_context(struct nouveau_channel *);
 499 extern int  nv10_fifo_load_context(struct nouveau_channel *);
 500 extern int  nv10_fifo_save_context(struct nouveau_channel *);
 501
 502 /* nv40_fifo.c */
 503 extern int  nv40_fifo_init(struct drm_device *);
 504 extern int  nv40_fifo_create_context(struct nouveau_channel *);
 505 extern void nv40_fifo_destroy_context(struct nouveau_channel *);
 506 extern int  nv40_fifo_load_context(struct nouveau_channel *);
 507 extern int  nv40_fifo_save_context(struct nouveau_channel *);
 508
 509 /* nv50_fifo.c */
 510 extern int  nv50_fifo_init(struct drm_device *);
 511 extern void nv50_fifo_takedown(struct drm_device *);
 512 extern int  nv50_fifo_channel_id(struct drm_device *);
 513 extern int  nv50_fifo_create_context(struct nouveau_channel *);
 514 extern void nv50_fifo_destroy_context(struct nouveau_channel *);
 515 extern int  nv50_fifo_load_context(struct nouveau_channel *);
 516 extern int  nv50_fifo_save_context(struct nouveau_channel *);
 517
 518 /* nv04_graph.c */
 519 extern void nouveau_nv04_context_switch(struct drm_device *);
 520 extern int  nv04_graph_init(struct drm_device *);
 521 extern void nv04_graph_takedown(struct drm_device *);
 522 extern int  nv04_graph_create_context(struct nouveau_channel *);
 523 extern void nv04_graph_destroy_context(struct nouveau_channel *);
 524 extern int  nv04_graph_load_context(struct nouveau_channel *);
 525 extern int  nv04_graph_save_context(struct nouveau_channel *);
 526
 527 /* nv10_graph.c */
 528 extern void nouveau_nv10_context_switch(struct drm_device *);
 529 extern int  nv10_graph_init(struct drm_device *);
 530 extern void nv10_graph_takedown(struct drm_device *);
 531 extern int  nv10_graph_create_context(struct nouveau_channel *);
 532 extern void nv10_graph_destroy_context(struct nouveau_channel *);
 533 extern int  nv10_graph_load_context(struct nouveau_channel *);
 534 extern int  nv10_graph_save_context(struct nouveau_channel *);
 535
 536 /* nv20_graph.c */
 537 extern int  nv20_graph_create_context(struct nouveau_channel *);
 538 extern void nv20_graph_destroy_context(struct nouveau_channel *);
 539 extern int  nv20_graph_load_context(struct nouveau_channel *);
 540 extern int  nv20_graph_save_context(struct nouveau_channel *);
 541 extern int  nv20_graph_init(struct drm_device *);
 542 extern void nv20_graph_takedown(struct drm_device *);
 543 extern int  nv30_graph_init(struct drm_device *);
 544
 545 /* nv40_graph.c */
 546 extern int  nv40_graph_init(struct drm_device *);
 547 extern void nv40_graph_takedown(struct drm_device *);
 548 extern int  nv40_graph_create_context(struct nouveau_channel *);
 549 extern void nv40_graph_destroy_context(struct nouveau_channel *);
 550 extern int  nv40_graph_load_context(struct nouveau_channel *);
 551 extern int  nv40_graph_save_context(struct nouveau_channel *);
 552
 553 /* nv50_graph.c */
 554 extern int  nv50_graph_init(struct drm_device *);
 555 extern void nv50_graph_takedown(struct drm_device *);
 556 extern int  nv50_graph_create_context(struct nouveau_channel *);
 557 extern void nv50_graph_destroy_context(struct nouveau_channel *);
 558 extern int  nv50_graph_load_context(struct nouveau_channel *);
 559 extern int  nv50_graph_save_context(struct nouveau_channel *);
 560
 561 /* nv04_instmem.c */
 562 extern int  nv04_instmem_init(struct drm_device *);
 563 extern void nv04_instmem_takedown(struct drm_device *);
 564 extern int  nv04_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
 565                                   uint32_t *size);
 566 extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
 567 extern int  nv04_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
 568 extern int  nv04_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
 569
 570 /* nv50_instmem.c */
 571 extern int  nv50_instmem_init(struct drm_device *);
 572 extern void nv50_instmem_takedown(struct drm_device *);
 573 extern int  nv50_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
 574                                   uint32_t *size);
 575 extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
 576 extern int  nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
 577 extern int  nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
 578
 579 /* nv04_mc.c */
 580 extern int  nv04_mc_init(struct drm_device *);
 581 extern void nv04_mc_takedown(struct drm_device *);
 582
 583 /* nv40_mc.c */
 584 extern int  nv40_mc_init(struct drm_device *);
 585 extern void nv40_mc_takedown(struct drm_device *);
 586
 587 /* nv50_mc.c */
 588 extern int  nv50_mc_init(struct drm_device *);
 589 extern void nv50_mc_takedown(struct drm_device *);
 590
 591 /* nv04_timer.c */
 592 extern int  nv04_timer_init(struct drm_device *);
 593 extern uint64_t nv04_timer_read(struct drm_device *);
 594 extern void nv04_timer_takedown(struct drm_device *);
 595
 596 extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
 597                                  unsigned long arg);
 598
 599 /* nouveau_buffer.c */
 600 extern struct drm_bo_driver nouveau_bo_driver;
 601
 602 /* nouveau_fence.c */
 603 extern struct drm_fence_driver nouveau_fence_driver;
 604 extern void nouveau_fence_handler(struct drm_device *dev, int channel);
 605
 606 #if defined(__powerpc__)
 607 #define NV_READ(reg)        in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
 608 #define NV_WRITE(reg,val)   out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
 609 #else
 610 #define NV_READ(reg)        DRM_READ32(  dev_priv->mmio, (reg) )
 611 #define NV_WRITE(reg,val)   DRM_WRITE32( dev_priv->mmio, (reg), (val) )
 612 #endif
 613
 614 /* PRAMIN access */
 615 #if defined(__powerpc__)
 616 #define NV_RI32(o) in_be32((void __iomem *)(dev_priv->ramin)->handle+(o))
 617 #define NV_WI32(o,v) out_be32((void __iomem*)(dev_priv->ramin)->handle+(o), (v))
 618 #else
 619 #define NV_RI32(o) DRM_READ32(dev_priv->ramin, (o))
 620 #define NV_WI32(o,v) DRM_WRITE32(dev_priv->ramin, (o), (v))
 621 #endif
 622
 623 #define INSTANCE_RD(o,i) NV_RI32((o)->im_pramin->start + ((i)<<2))
 624 #define INSTANCE_WR(o,i,v) NV_WI32((o)->im_pramin->start + ((i)<<2), (v))
 625
 626 #endif /* __NOUVEAU_DRV_H__ */