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[netbsd-mini2440.git] / sys / external / isc / atheros_hal / dist / ar5416 / ar5416_gpio.c
blob87104427343d1d675821d7de4725b9c905246934
1 /*
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $Id: ar5416_gpio.c,v 1.1.1.1 2008/12/11 04:46:48 alc Exp $
19 #include "opt_ah.h"
21 #include "ah.h"
22 #include "ah_internal.h"
23 #include "ah_devid.h"
24 #ifdef AH_DEBUG
25 #include "ah_desc.h" /* NB: for HAL_PHYERR* */
26 #endif
28 #include "ar5416/ar5416.h"
29 #include "ar5416/ar5416reg.h"
30 #include "ar5416/ar5416phy.h"
32 #define AR_NUM_GPIO 6 /* 6 GPIO pins */
33 #define AR_GPIO_BIT(_gpio) (1 << _gpio)
36 * Configure GPIO Output lines
38 HAL_BOOL
39 ar5416GpioCfgOutput(struct ath_hal *ah, uint32_t gpio)
41 HALASSERT(gpio < AR_NUM_GPIO);
42 OS_REG_CLR_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio));
43 return AH_TRUE;
47 * Configure GPIO Input lines
49 HAL_BOOL
50 ar5416GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
52 HALASSERT(gpio < AR_NUM_GPIO);
53 OS_REG_SET_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio));
54 return AH_TRUE;
58 * Once configured for I/O - set output lines
60 HAL_BOOL
61 ar5416GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
63 uint32_t reg;
65 HALASSERT(gpio < AR_NUM_GPIO);
66 reg = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_OUT_VAL);
67 if (val & 1)
68 reg |= AR_GPIO_BIT(gpio);
69 else
70 reg &= ~AR_GPIO_BIT(gpio);
72 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_OUT_VAL, reg);
73 return AH_TRUE;
77 * Once configured for I/O - get input lines
79 uint32_t
80 ar5416GpioGet(struct ath_hal *ah, uint32_t gpio)
82 if (gpio >= AR_NUM_GPIO)
83 return 0xffffffff;
84 return ((OS_REG_READ(ah, AR_GPIO_IN) & AR_GPIO_BIT(gpio)) >> gpio);
88 * Set the GPIO Interrupt
90 void
91 ar5416GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
93 uint32_t val;
95 HALASSERT(gpio < AR_NUM_GPIO);
96 /* XXX bounds check gpio */
97 val = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_INTR_CTRL);
98 if (ilevel) /* 0 == interrupt on pin high */
99 val &= ~AR_GPIO_BIT(gpio);
100 else /* 1 == interrupt on pin low */
101 val |= AR_GPIO_BIT(gpio);
102 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_INTR_CTRL, val);
104 /* Change the interrupt mask. */
105 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), AR_INTR_GPIO);
106 val |= AR_GPIO_BIT(gpio);
107 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, AR_INTR_GPIO, val);
109 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK), AR_INTR_GPIO);
110 val |= AR_GPIO_BIT(gpio);
111 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, AR_INTR_GPIO, val);