include/elf/aarch64.h

   1 /* AArch64 ELF support for BFD.
   2
   3    Copyright 2009, 2010, 2011, 2012  Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GNU Binutils.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the license, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; see the file COPYING3. If not,
  20    see <http://www.gnu.org/licenses/>.  */
  21
  22 #ifndef _ELF_AARCH64_H
  23 #define _ELF_AARCH64_H
  24
  25 #include "elf/reloc-macros.h"
  26
  27 /* Processor specific program header types.  */
  28 #define PT_AARCH64_ARCHEXT      (PT_LOPROC + 0)
  29
  30 /* Additional section types.  */
  31 #define SHT_AARCH64_ATTRIBUTES  0x70000003  /* Section holds attributes.  */
  32
  33 /* AArch64-specific values for sh_flags.  */
  34 #define SHF_ENTRYSECT           0x10000000   /* Section contains an
  35                                                 entry point.  */
  36 #define SHF_COMDEF              0x80000000   /* Section may be multiply defined
  37                                                 in the input to a link step.  */
  38
  39 /* Relocation types.  */
  40
  41 START_RELOC_NUMBERS (elf_aarch64_reloc_type)
  42
  43 /* Null relocations.  */
  44 RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */
  45
  46 /* Basic data relocations.  */
  47
  48 /* .word:  (S+A) */
  49 RELOC_NUMBER (R_AARCH64_P32_ABS32, 1)
  50
  51 /* .half: (S+A) */
  52 RELOC_NUMBER (R_AARCH64_P32_ABS16, 2)
  53
  54 /* .word: (S+A-P) */
  55 RELOC_NUMBER (R_AARCH64_P32_PREL32, 3)
  56
  57 /* .half:  (S+A-P) */
  58 RELOC_NUMBER (R_AARCH64_P32_PREL16, 4)
  59
  60 /* Group relocations to create a 16, 32, 48 or 64 bit
  61    unsigned data or abs address inline.  */
  62
  63 /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
  64 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5)
  65
  66 /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
  67 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6)
  68
  69 /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
  70 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7)
  71
  72 /* Group relocations to create high part of a 16, 32, 48 or 64 bit
  73    signed data or abs address inline. Will change instruction
  74    to MOVN or MOVZ depending on sign of calculated value.  */
  75
  76 /* MOV[ZN]:   ((S+A) >>  0) & 0xffff */
  77 RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8)
  78
  79 /* Relocations to generate 19, 21 and 33 bit PC-relative load/store
  80    addresses: PG(x) is (x & ~0xfff).  */
  81
  82 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
  83 RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9)
  84
  85 /* ADR:    (S+A-P) & 0x1fffff */
  86 RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10)
  87
  88 /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
  89 RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11)
  90
  91 /* ADD:    (S+A) & 0xfff */
  92 RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12)
  93
  94 /* LD/ST8: (S+A) & 0xfff */
  95 RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13)
  96
  97 /* LD/ST16: (S+A) & 0xffe */
  98 RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14)
  99
 100 /* LD/ST32: (S+A) & 0xffc */
 101 RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15)
 102
 103 /* LD/ST64: (S+A) & 0xff8 */
 104 RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16)
 105
 106 /* LD/ST128: (S+A) & 0xff0 */
 107 RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17)
 108
 109 /* Relocations for control-flow instructions.  */
 110
 111 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff.  */
 112 RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18)
 113
 114 /* B.cond: ((S+A-P) >> 2) & 0x7ffff.  */
 115 RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19)
 116
 117 /* B:      ((S+A-P) >> 2) & 0x3ffffff.  */
 118 RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20)
 119
 120 /* BL:     ((S+A-P) >> 2) & 0x3ffffff.  */
 121 RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
 122
 123
 124 RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
 125 RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
 126 RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27)
 127
 128
 129 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81)
 130 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
 131 RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
 132 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
 133 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)
 134 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106)
 135 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107)
 136 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108)
 137 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109)
 138 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110)
 139 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111)
 140
 141 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122)
 142 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123)
 143 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124)
 144 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125)
 145 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126)
 146 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127)
 147
 148 /* Dynamic relocations */
 149
 150 /* Copy symbol at runtime.  */
 151 RELOC_NUMBER (R_AARCH64_P32_COPY, 180)
 152
 153 /* Create GOT entry.  */
 154 RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181)
 155
 156  /* Create PLT entry.  */
 157 RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182)
 158
 159 /* Adjust by program base.  */
 160 RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183)
 161 RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184)
 162 RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185)
 163 RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186)
 164 RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187)
 165 RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188)
 166
 167 RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */
 168
 169 /* Basic data relocations.  */
 170
 171 /* .xword: (S+A) */
 172 RELOC_NUMBER (R_AARCH64_ABS64, 257)
 173
 174 /* .word:  (S+A) */
 175 RELOC_NUMBER (R_AARCH64_ABS32, 258)
 176
 177 /* .half: (S+A) */
 178 RELOC_NUMBER (R_AARCH64_ABS16, 259)
 179
 180 /* .xword: (S+A-P) */
 181 RELOC_NUMBER (R_AARCH64_PREL64, 260)
 182
 183 /* .word: (S+A-P) */
 184 RELOC_NUMBER (R_AARCH64_PREL32, 261)
 185
 186 /* .half:  (S+A-P) */
 187 RELOC_NUMBER (R_AARCH64_PREL16, 262)
 188
 189 /* Group relocations to create a 16, 32, 48 or 64 bit
 190    unsigned data or abs address inline.  */
 191
 192 /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
 193 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0,           263)
 194
 195 /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
 196 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0_NC, 264)
 197
 198 /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
 199 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1, 265)
 200
 201 /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
 202 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1_NC, 266)
 203
 204 /* MOV[ZK]:   ((S+A) >> 32) & 0xffff */
 205 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2, 267)
 206
 207 /* MOV[ZK]:   ((S+A) >> 32) & 0xffff */
 208 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2_NC, 268)
 209
 210 /* MOV[ZK]:   ((S+A) >> 48) & 0xffff */
 211 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G3, 269)
 212
 213 /* Group relocations to create high part of a 16, 32, 48 or 64 bit
 214    signed data or abs address inline. Will change instruction
 215    to MOVN or MOVZ depending on sign of calculated value.  */
 216
 217 /* MOV[ZN]:   ((S+A) >>  0) & 0xffff */
 218 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G0, 270)
 219
 220 /* MOV[ZN]:   ((S+A) >> 16) & 0xffff */
 221 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G1, 271)
 222
 223 /* MOV[ZN]:   ((S+A) >> 32) & 0xffff */
 224 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G2, 272)
 225
 226 /* Relocations to generate 19, 21 and 33 bit PC-relative load/store
 227    addresses: PG(x) is (x & ~0xfff).  */
 228
 229 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
 230 RELOC_NUMBER (R_AARCH64_LD_PREL_LO19, 273)
 231
 232 /* ADR:    (S+A-P) & 0x1fffff */
 233 RELOC_NUMBER (R_AARCH64_ADR_PREL_LO21, 274)
 234
 235 /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
 236 RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21, 275)
 237
 238 /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
 239 RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21_NC, 276)
 240
 241 /* ADD:    (S+A) & 0xfff */
 242 RELOC_NUMBER (R_AARCH64_ADD_ABS_LO12_NC, 277)
 243
 244 /* LD/ST8: (S+A) & 0xfff */
 245 RELOC_NUMBER (R_AARCH64_LDST8_ABS_LO12_NC, 278)
 246
 247 /* Relocations for control-flow instructions.  */
 248
 249 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff.  */
 250 RELOC_NUMBER (R_AARCH64_TSTBR14, 279)
 251
 252 /* B.cond: ((S+A-P) >> 2) & 0x7ffff.  */
 253 RELOC_NUMBER (R_AARCH64_CONDBR19, 280)
 254
 255 /* 281 unused */
 256
 257 /* B:      ((S+A-P) >> 2) & 0x3ffffff.  */
 258 RELOC_NUMBER (R_AARCH64_JUMP26, 282)
 259
 260 /* BL:     ((S+A-P) >> 2) & 0x3ffffff.  */
 261 RELOC_NUMBER (R_AARCH64_CALL26, 283)
 262
 263 /* LD/ST16: (S+A) & 0xffe */
 264 RELOC_NUMBER (R_AARCH64_LDST16_ABS_LO12_NC, 284)
 265
 266 /* LD/ST32: (S+A) & 0xffc */
 267 RELOC_NUMBER (R_AARCH64_LDST32_ABS_LO12_NC, 285)
 268
 269 /* LD/ST64: (S+A) & 0xff8 */
 270 RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286)
 271
 272 /* LD/ST128: (S+A) & 0xff0 */
 273 RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299)
 274
 275 RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309)
 276 RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311)
 277 RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312)
 278
 279 RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513)
 280 RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514)
 281 RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539)
 282 RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540)
 283 RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541)
 284 RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542)
 285 RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543)
 286 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544)
 287 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545)
 288 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546)
 289 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0, 547)
 290 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548)
 291 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549)
 292 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550)
 293 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551)
 294
 295 RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560)
 296 RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561)
 297 RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562)
 298 RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12_NC, 563)
 299 RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12_NC, 564)
 300 RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565)
 301 RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566)
 302 RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567)
 303 RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568)
 304 RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569)
 305
 306 /* Dynamic relocations */
 307
 308 /* Copy symbol at runtime.  */
 309 RELOC_NUMBER (R_AARCH64_COPY, 1024)
 310
 311 /* Create GOT entry.  */
 312 RELOC_NUMBER (R_AARCH64_GLOB_DAT, 1025)
 313
 314  /* Create PLT entry.  */
 315 RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026)
 316
 317 /* Adjust by program base.  */
 318 RELOC_NUMBER (R_AARCH64_RELATIVE, 1027)
 319 RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028)
 320 RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029)
 321 RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030)
 322 RELOC_NUMBER (R_AARCH64_TLSDESC, 1031)
 323 RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032)
 324
 325 END_RELOC_NUMBERS (R_AARCH64_end)
 326
 327 #endif /* _ELF_AARCH64_H */