newlib/libc/machine/arm/strcpy.c

   1 /*
   2  * Copyright (c) 2008 ARM Ltd
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. The name of the company may not be used to endorse or promote
  14  *    products derived from this software without specific prior written
  15  *    permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
  18  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
  22  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  23  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  24  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  25  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  26  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #include "arm_asm.h"
  30 #include <_ansi.h>
  31 #include <string.h>
  32
  33 #ifdef __thumb2__
  34 #define magic1(REG) "#0x01010101"
  35 #define magic2(REG) "#0x80808080"
  36 #else
  37 #define magic1(REG) #REG
  38 #define magic2(REG) #REG ", lsl #7"
  39 #endif
  40
  41 char* __attribute__((naked))
  42 strcpy (char* dst, const char* src)
  43 {
  44   asm (
  45       ".syntax unified\n\t"
  46 #if !(defined(__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED) || \
  47       (defined (__thumb__) && !defined (__thumb2__)))
  48 #ifdef _ISA_ARM_7
  49        "pld     [r1]\n\t"
  50 #endif
  51        "eor     r2, r0, r1\n\t"
  52        "mov     ip, r0\n\t"
  53        "tst     r2, #3\n\t"
  54        "bne     4f\n\t"
  55        "tst     r1, #3\n\t"
  56        "bne     3f\n"
  57   "5:\n\t"
  58 #ifndef __thumb2__
  59        "str     r5, [sp, #-4]!\n\t"
  60        "mov     r5, #0x01\n\t"
  61        "orr     r5, r5, r5, lsl #8\n\t"
  62        "orr     r5, r5, r5, lsl #16\n\t"
  63 #endif
  64
  65        "str     r4, [sp, #-4]!\n\t"
  66        "tst     r1, #4\n\t"
  67        "ldr     r3, [r1], #4\n\t"
  68        "beq     2f\n\t"
  69        "sub     r2, r3, "magic1(r5)"\n\t"
  70        "bics    r2, r2, r3\n\t"
  71        "tst     r2, "magic2(r5)"\n\t"
  72        "itt     eq\n\t"
  73        "streq   r3, [ip], #4\n\t"
  74        "ldreq   r3, [r1], #4\n"
  75        "bne     1f\n\t"
  76        /* Inner loop.  We now know that r1 is 64-bit aligned, so we
  77           can safely fetch up to two words.  This allows us to avoid
  78           load stalls.  */
  79        ".p2align 2\n"
  80   "2:\n\t"
  81 #ifdef _ISA_ARM_7
  82        "pld     [r1, #8]\n\t"
  83 #endif
  84        "ldr     r4, [r1], #4\n\t"
  85        "sub     r2, r3, "magic1(r5)"\n\t"
  86        "bics    r2, r2, r3\n\t"
  87        "tst     r2, "magic2(r5)"\n\t"
  88        "sub     r2, r4, "magic1(r5)"\n\t"
  89        "bne     1f\n\t"
  90        "str     r3, [ip], #4\n\t"
  91        "bics    r2, r2, r4\n\t"
  92        "tst     r2, "magic2(r5)"\n\t"
  93        "itt     eq\n\t"
  94        "ldreq   r3, [r1], #4\n\t"
  95        "streq   r4, [ip], #4\n\t"
  96        "beq     2b\n\t"
  97        "mov     r3, r4\n"
  98   "1:\n\t"
  99 #ifdef __ARMEB__
 100        "rors    r3, r3, #24\n\t"
 101 #endif
 102        "strb    r3, [ip], #1\n\t"
 103        "tst     r3, #0xff\n\t"
 104 #ifdef __ARMEL__
 105        "ror     r3, r3, #8\n\t"
 106 #endif
 107        "bne     1b\n\t"
 108        "ldr     r4, [sp], #4\n\t"
 109 #ifndef __thumb2__
 110        "ldr     r5, [sp], #4\n\t"
 111 #endif
 112        "bx      lr\n"
 113
 114        /* Strings have the same offset from word alignment, but it's
 115           not zero.  */
 116   "3:\n\t"
 117        "tst     r1, #1\n\t"
 118        "beq     1f\n\t"
 119        "ldrb    r2, [r1], #1\n\t"
 120        "strb    r2, [ip], #1\n\t"
 121        "cmp     r2, #0\n\t"
 122        "it      eq\n"
 123        "bxeq    lr\n"
 124   "1:\n\t"
 125        "tst     r1, #2\n\t"
 126        "beq     5b\n\t"
 127        "ldrh    r2, [r1], #2\n\t"
 128 #ifdef __ARMEB__
 129        "tst     r2, #0xff00\n\t"
 130        "iteet   ne\n\t"
 131        "strhne  r2, [ip], #2\n\t"
 132        "lsreq   r2, r2, #8\n\t"
 133        "strbeq  r2, [ip]\n\t"
 134        "tstne   r2, #0xff\n\t"
 135 #else
 136        "tst     r2, #0xff\n\t"
 137        "itet    ne\n\t"
 138        "strhne  r2, [ip], #2\n\t"
 139        "strbeq  r2, [ip]\n\t"
 140        "tstne   r2, #0xff00\n\t"
 141 #endif
 142        "bne     5b\n\t"
 143        "bx      lr\n"
 144
 145        /* src and dst do not have a common word-alignement.  Fall back to
 146           byte copying.  */
 147   "4:\n\t"
 148        "ldrb    r2, [r1], #1\n\t"
 149        "strb    r2, [ip], #1\n\t"
 150        "cmp     r2, #0\n\t"
 151        "bne     4b\n\t"
 152        "bx      lr\n\t"
 153
 154 #elif !defined (__thumb__) || defined (__thumb2__)
 155        "mov     r3, r0\n\t"
 156   "1:\n\t"
 157        "ldrb    r2, [r1], #1\n\t"
 158        "strb    r2, [r3], #1\n\t"
 159        "cmp     r2, #0\n\t"
 160        "bne     1b\n\t"
 161        "bx      lr\n\t"
 162 #else
 163        "movs    r3, r0\n\t"
 164   "1:\n\t"
 165        "ldrb    r2, [r1]\n\t"
 166        "adds    r1, #1\n\t"
 167        "strb    r2, [r3]\n\t"
 168        "adds    r3, #1\n\t"
 169        "cmp     r2, #0\n\t"
 170        "bne     1b\n\t"
 171        "bx      lr\n\t"
 172 #endif
 173        );
 174 }