2 (C) Copyright IBM Corp. 2008
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 * Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11 * Redistributions in binary form must reproduce the above copyright
12 notice, this list of conditions and the following disclaimer in the
13 documentation and/or other materials provided with the distribution.
14 * Neither the name of IBM nor the names of its contributors may be
15 used to endorse or promote products derived from this software without
16 specific prior written permission.
18 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
22 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 POSSIBILITY OF SUCH DAMAGE.
31 /* First-level interrupt handler. */
33 /* The following two convenience macros assist in the coding of the
34 saving and restoring the volatile register starting from register
37 saveregs first, last Saves registers from first to the last.
38 restoreregs first, last Restores registers from last down to first.
40 Note: first must be less than or equal to last. */
42 .macro saveregs first, last
43 stqd $\first, -(STACK_SKIP+\first)*16($SP)
45 saveregs "(\first+1)",\last
50 .macro restoreregs first, last
51 lqd $\last, (82-\last)*16($SP)
53 restoreregs \first,"(\last-1)"
57 .section .interrupt,"ax"
59 .type spu_flih, @function
61 /* Adjust the stack pointer to skip the maximum register save area
62 (STACK_SKIP quadword registers) in case an interrupt occurred while
63 executing a leaf function that used the stack area without actually
64 allocating its own stack frame. */
67 /* Save the current link register on a new stack frame for the
68 normal spu_flih() version of this file. */
69 stqd $0, -(STACK_SKIP+80)*16($SP)
70 stqd $SP, -(STACK_SKIP+82)*16($SP) /* Save back chain pointer. */
74 il $2, -(STACK_SKIP+82)*16 /* Stack frame size. */
75 rdch $3, $SPU_RdEventStat /* Read event status. */
77 rdch $6, $SPU_RdEventMask /* Read event mask. */
78 hbrp /* Open a slot for instruction prefetch. */
82 clz $4, $3 /* Get first slih index. */
83 stqd $6, -(STACK_SKIP+1)*16($SP) /* Save event mask on stack. */
87 /* Do not disable/ack the decrementer event here.
88 The timer library manages this and expects it
89 to be enabled upon entry to the SLIH. */
92 andc $7, $6, $5 /* Clear event bits. */
95 wrch $SPU_WrEventAck, $3 /* Ack events(s) - include decrementer event. */
96 wrch $SPU_WrEventMask, $7 /* Disable event(s) - exclude decrementer event. */
100 a $SP, $SP, $2 /* Instantiate flih stack frame. */
102 /* Fetch and dispatch the event handler for the first non-zero event. The
103 dispatch handler is indexed into the __spu_slih_handlers array using the
104 count of zero off the event status as an index. */
105 ila $5, __spu_slih_handlers /* Slih array offset. */
107 shli $4, $4, 2 /* Slih entry offset. */
108 lqx $5, $4, $5 /* Load slih address. */
109 rotqby $5, $5, $4 /* Rotate to word 0. */
110 bisl $0, $5 /* Branch to slih. */
112 clz $4, $3 /* Get next slih index. */
116 lqd $2, 81*16($SP) /* Read event mask from stack. */
120 wrch $SPU_WrEventMask, $2 /* Restore event mask. */
121 hbrp /* Open a slot for instruction pre-fetch. */
125 /* Restore the link register from the new stack frame for the
126 normal spu_flih() version of this file. */
129 lqd $SP, 0*16($SP) /* restore stack pointer from back chain ptr. */
131 irete /* Return from interrupt and re-enable interrupts. */
132 .size spu_flih, .-spu_flih
133 /* spu_slih_handlers[]
134 Here we initialize 33 default event handlers. The first entry in this array
135 corresponds to the event handler for the event associated with bit 0 of
136 Channel 0 (External Event Status). The 32nd entry in this array corresponds
137 to bit 31 of Channel 0 (DMA Tag Status Update Event). The 33rd entry in
138 this array is a special case entry to handle "phantom events" which occur
139 when the channel count for Channel 0 is 1, causing an asynchronous SPU
140 interrupt, but the value returned for a read of Channel 0 is 0. The index
141 calculated into this array by spu_flih() for this case is 32, hence the
145 .extern __spu_default_slih
146 .global __spu_slih_handlers
147 .type __spu_slih_handlers, @object
150 .long __spu_default_slih
152 .size __spu_slih_handlers, .-__spu_slih_handlers