4 GR2 normal return register
5 GR27 Global Data Pointer (Must be set in crt0)
7 GR31 milicode return pointer
11 CR24-31 Temporary Control Registers
12 CR14 Vector Table Register (like VBR on an m68020)
13 CR0 Put in a count, causes exception when decremented to 0.
15 FORTH's magic number is 031240
19 The following options are also supported:
21 -snnn set the initial system load (ISL) start address to
22 nnn in the volume label. This is useful when
23 building boot media for Series 700/800 systems.
25 -lnnn specifies the length in bytes of the ISL code in
28 -ennn set the ISL entry point to nnn bytes from the
29 beginning of the ISL. For example, specifying -
30 e3272 means that the ISL entry point is 3272
31 (decimal) bytes from the beginning of the ISL
34 -Knnn forces the directory start location to be the
35 nearest multiple of nnn x 1024 bytes from the
36 beginning of the volume. This is necessary for
37 booting Series 700/800 systems from LIF media.
39 -n xxx Sets the volume name to be xxx.
40 lifinit -v64000000 -d64 -nISL10 -K2 -s4096 -l61440 -e5336 this_lif
43 # -r Forces RAW mode copying. (file type BIN (-23951))
44 # -T Sets the file type of the directory entry.
45 # -Knnn forces each file copied in to begin on a nnn x
46 # 1024-byte boundary from the beginning of the volume
47 # Note: the word echoed below MUST be 10 characters exactly.
49 (echo "FORTH ") | lifcp -r -T-030001 -K2 - this_lif:AUTO
53 # somxtract infile outfile --
54 # converts a series 800 file *only* into a raw image
56 It turns out the native cc and our current gcc produce series 700
57 output, so in this case it runs till if fills up the hard disk.
59 *** rombootlf5 is a FORTH interpreter in a "boot" image. (it won't run on
63 volume ISL10 data size 249984 directory size 8 94/04/20 10:26:36
64 filename type start size implement created
65 ===============================================================
66 ISL -12800 16 240 0 94/04/20 10:26:36
67 HPUX -12928 256 496 0 94/04/20 10:26:37
68 IOMAP -12960 752 1504 0 94/04/20 10:26:37
69 AUTO -12289 2256 1 0 94/04/20 10:26:38
70 FORTH -12960 2264 208 0 94/04/20 10:26:38
71 HPFORTH ASCII 2472 420 0 94/04/20 10:26:38
72 BOOTROM ASCII 2896 3849 0 94/04/20 10:26:40
73 PAD1 -12290 6752 1172 0 94/04/20 10:26:40
75 *** The ISL is only needed when booting the raw hardware. As we're runing
76 on a monitor (barely) all we need is a crt0 that initiallizes the GR27
77 Global Data Pointer and zero's bss.
79 *** Initial Program Load
81 From page 11-56, architecture book.
82 0x00000000 +------------------------------------+ 0
84 0x00000004 +------------------------------------+ 4
86 0x000000F0 +------------------------------------+ 240
88 0x000000F4 +------------------------------------+ 244
90 0x000000F8 +------------------------------------+ 248
92 0x000000FC +------------------------------------+ 252
94 IPL_ADDR +------------------------------------+ IPL_ADDR
95 | Position Independant |
97 | (including IPL_CHECKSUM) |
98 +------------------------------------+ IPL_ADDR + IPL_SIZE
100 +------------------------------------+
102 IPL_ADDR 2 Kbyte aligned, nonzero
103 IPL_SIZE Multiple of 2Kbytes, <= 256 Kbytes
104 IPL_ENTRY Word aligned, less than IPL_SIZE
108 This is based on Cobra/Coral hardware:
109 LED register at 0xf080024
110 I/O status register at 0xf0800000
111 EEPROM at 0xf0810000 (LAN ID begins at byte 0)
113 Here's a dump of the LIF volume header using "xd" (od with hex output)
116 00000f0 0000 1000 0000 9800 0000 0000 0000 0000
120 0000800 5445 5354 2020 2020 2020 a271 0000 0010
121 ^^^^ ^^^^ ^^^^ ^^^^ ^^^^ ^^^^<-- this is the ipl offset
122 this is the vol name ^^^^<- this is the type
124 0000810 0000 0098 9407 1919 1426 8001 0000 0000
130 The vector table is access by %iva (%cr14). The address here must be a
131 multiple of 2048. The indexes are:
136 5 low-priority machine check
137 6 instruction TLB miss/instruction page fault
138 7 instruction memory protection
139 8 illegal instruction
141 10 priviledged operation
142 11 priviledged register
146 15 data TLB miss fault/data page fault
147 16 non access instruction TLB miss fault
148 17 non access page TLB miss fault/non access data page fault
149 18 data memory protection/unaligned data reference
154 23 higher-priority transfer
155 24 lower-priority transfe