pcd_config.c

   1
   2 #include "common.h"
   3 #include "pn51x.h"
   4 #include "pcd_config.h"
   5
   6 uint8_t RCRegFactor[19] =
   7 {
   8     0x12, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85,
   9     0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x3F, 0x3F
  10 };
  11
  12 //*******************************************
  13 // ISO 14443 TypeA config data
  14 //*******************************************
  15 static const uint8_t CfgTbl_AGen[] =
  16 {
  17     ModeReg,       0x39,        //CRCPreset = 6363H
  18     BitFramingReg, 0x00,
  19     GsNOnReg,      0xFF,
  20     GsNOffReg,     0x6F,
  21     ManualRCVReg,  0x00,
  22     TxAutoReg,     0x43,
  23     DemodReg,      0x4D,
  24     0x00
  25 };
  26
  27 static const uint8_t CfgTbl_A106Tx[] =
  28 {
  29     TxModeReg,0x80,        //ISO/IEC 14443A/MIFARE and 106 kbit, TxCRCEn On
  30     ModWidthReg,0x26,
  31     0x00
  32 };
  33
  34 static const uint8_t CfgTbl_A106Rx[] =
  35 {
  36     RxModeReg,0x80,        //ISO/IEC 14443A/MIFARE and 106 kbit, RxCRCEn On
  37     0x00
  38 };
  39
  40 static const uint8_t CfgTbl_A212Tx[] =
  41 {
  42     TxModeReg,0x90,
  43     ModWidthReg,0x13,
  44     0x00
  45 };
  46
  47 static const uint8_t CfgTbl_A212Rx[] =
  48 {
  49     RxModeReg,0x90,
  50     0x00
  51 };
  52
  53 static const uint8_t CfgTbl_A424Tx[] =
  54 {
  55     TxModeReg,0xA0,
  56     ModWidthReg,0x0A,
  57     0x00
  58 };
  59
  60 static const uint8_t CfgTbl_A424Rx[] =
  61 {
  62     RxModeReg,0xA0,
  63     0x00
  64 };
  65
  66 static const uint8_t CfgTbl_A848Tx[] =
  67 {
  68     TxModeReg,0xB0,
  69     ModWidthReg,0x05,
  70     0x00
  71 };
  72
  73 static const uint8_t CfgTbl_A848Rx[] =
  74 {
  75     RxModeReg,0xB0,
  76     0x00
  77 };
  78
  79 //*******************************************
  80 // ISO 14443 TypeB config data
  81 //*******************************************
  82 static const uint8_t CfgTbl_BGen[] =
  83 {
  84     ModeReg,       0x3B,
  85     BitFramingReg, 0x00,
  86     GsNOnReg,      0xFF,
  87     TypeBReg,      0x10,
  88     DemodReg,      0x4D,
  89     ManualRCVReg,  0x10,
  90     0x00
  91 };
  92
  93 static const uint8_t CfgTbl_B106Tx[] =
  94 {
  95     TxModeReg,0x83,
  96     TxAutoReg,0x03,
  97     0x00
  98 };
  99
 100 static const uint8_t CfgTbl_B106Rx[] =
 101 {
 102     RxModeReg,0x83,
 103     RxSelReg,0x84,
 104     0x00
 105 };
 106
 107 static const uint8_t CfgTbl_B212Tx[] =
 108 {
 109     TxModeReg,0x93,
 110     TxAutoReg,0x03,
 111     0x00
 112 };
 113
 114
 115 static const uint8_t CfgTbl_B212Rx[] =
 116 {
 117     RxModeReg,0x93,
 118     RxSelReg,0x84,
 119     0x00
 120 };
 121
 122 static const uint8_t CfgTbl_B424Tx[] =
 123 {
 124     TxModeReg,0xA3,
 125     TxAutoReg,0x03,
 126     0x00
 127 };
 128
 129 static const uint8_t CfgTbl_B424Rx[] =
 130 {
 131     RxModeReg,0xA3,
 132     RxSelReg,0x82,
 133     0x00
 134 };
 135
 136 static const uint8_t CfgTbl_B848Tx[] =
 137 {
 138     TxModeReg,0xB3,
 139     TxAutoReg,0x03,
 140     0x00
 141 };
 142
 143 static const uint8_t CfgTbl_B848Rx[] =
 144 {
 145     RxModeReg,0xB3,
 146     RxSelReg,0x82,
 147     0x00
 148 };
 149
 150 void pcd_config_iso14443_card(uint8_t flagConfig, uint8_t cardType)
 151 {
 152     uint8_t regAddr;
 153     uint8_t i;
 154     const uint8_t *pTable;
 155
 156     if(flagConfig) {
 157         if(flagConfig == CONFIGTYPEA) {
 158             pTable = CfgTbl_AGen;
 159             pn51x_reg_write(CWGsPReg, RCRegFactor[TypeACWGsP]);
 160         }
 161         else {
 162             pTable = CfgTbl_BGen;
 163             pn51x_reg_write(CWGsPReg, RCRegFactor[TypeBCWGsP]);
 164             pn51x_reg_write(ModGsPReg, RCRegFactor[BModeIndex]);
 165         }
 166         i = 0;
 167         regAddr = pTable[i++];
 168         while(regAddr) {
 169             pn51x_reg_write(regAddr,pTable[i++]);
 170             regAddr = pTable[i++];
 171         }
 172     }
 173
 174     /* if CONFIGNOTHING only do cardtype config */
 175     switch(cardType) {
 176         case TYPEA_106TX:
 177             pTable = CfgTbl_A106Tx;
 178             break;
 179         case TYPEA_212TX:
 180             pTable = CfgTbl_A212Tx;
 181             break;
 182         case TYPEA_424TX:
 183             pTable = CfgTbl_A424Tx;
 184             break;
 185         case TYPEA_848TX:
 186             pTable = CfgTbl_A848Tx;
 187             break;
 188         case TYPEB_106TX:
 189             pTable = CfgTbl_B106Tx;
 190             break;
 191         case TYPEB_212TX:
 192             pTable = CfgTbl_B212Tx;
 193             break;
 194         case TYPEB_424TX:
 195             pTable = CfgTbl_B424Tx;
 196             break;
 197         case TYPEB_848TX:
 198             pTable = CfgTbl_B848Tx;
 199             break;
 200         case TYPEA_106RX:
 201             pn51x_reg_write(RFCfgReg, RCRegFactor[ARFAmpCfg106]);
 202             pn51x_reg_write(RxThresholdReg, RCRegFactor[RxAThres106]);
 203             pTable = CfgTbl_A106Rx;
 204             break;
 205         case TYPEA_212RX:
 206             pn51x_reg_write(RFCfgReg, RCRegFactor[ARFAmpCfg212]);
 207             pn51x_reg_write(RxThresholdReg, RCRegFactor[RxAThres212]);
 208             pTable = CfgTbl_A212Rx;
 209             break;
 210         case TYPEA_424RX:
 211             pn51x_reg_write(RFCfgReg, RCRegFactor[ARFAmpCfg424]);
 212             pn51x_reg_write(RxThresholdReg, RCRegFactor[RxAThres424]);
 213             pTable = CfgTbl_A424Rx;
 214             break;
 215         case TYPEA_848RX:
 216             pn51x_reg_write(RFCfgReg, RCRegFactor[ARFAmpCfg848]);
 217             pn51x_reg_write(RxThresholdReg, RCRegFactor[RxAThres848]);
 218             pTable = CfgTbl_A848Rx;
 219             break;
 220         case TYPEB_106RX:
 221             pn51x_reg_write(RFCfgReg, RCRegFactor[BRFAmpCfg106]);
 222             pn51x_reg_write(RxThresholdReg, RCRegFactor[RxBThres106]);
 223             pTable = CfgTbl_B106Rx;
 224             break;
 225         case TYPEB_212RX:
 226             pn51x_reg_write(RFCfgReg, RCRegFactor[BRFAmpCfg212]);
 227             pn51x_reg_write(RxThresholdReg, RCRegFactor[RxBThres212]);
 228             pTable = CfgTbl_B212Rx;
 229             break;
 230         case TYPEB_424RX:
 231             pn51x_reg_write(RFCfgReg, RCRegFactor[BRFAmpCfg424]);
 232             pn51x_reg_write(RxThresholdReg, RCRegFactor[RxBThres424]);
 233             pTable = CfgTbl_B424Rx;
 234             break;
 235         default:
 236             pn51x_reg_write(RFCfgReg, RCRegFactor[BRFAmpCfg848]);
 237             pn51x_reg_write(RxThresholdReg, RCRegFactor[RxBThres848]);
 238             pTable = CfgTbl_B848Rx;
 239             break;
 240     }
 241
 242     i = 0;
 243     regAddr = pTable[i++];
 244     while(regAddr) {
 245         pn51x_reg_write(regAddr,pTable[i++]);
 246         regAddr = pTable[i++];
 247     }
 248 }
 249