7 #define HANDLE_INTR_IN_TASK
9 // Important registers of the PN51x reader module
11 /*********** PAGE 0 Command and Status**************/
12 #define PageReg 0x00 // Page Select Register
13 #define CommandReg 0x01
18 #define IdleIEn (1<<4)
19 #define HiAlertIEn (1<<3)
20 #define LoAlertIEn (1<<2)
22 #define TimerIEn (1<<0)
23 #define CommIEnReg 0x02
25 #define DivIEnReg 0x03
30 #define IdleIRq (1<<4)
31 #define HiAlertIRq (1<<3)
32 #define LoAlertIRq (1<<2)
34 #define TimerIRq (1<<0)
35 #define CommIRqReg 0x04 // Contains Interrupt Request bits.
37 #define DivIRqReg 0x05
40 #define TempErr (1<<6)
42 #define BufferOvfl (1<<4)
43 #define CollErr (1<<3)
45 #define ParityErr (1<<1)
46 #define ProtocolErr (1<<0)
47 #define ErrorReg 0x06 // error bit register showing the err status of the last command executed
50 #define Status1Reg 0x07
52 #define MFCrypto1On (1<<3)
53 #define ModemStateMask 0x07
54 #define Status2Reg 0x08
56 #define FIFODataReg 0x09
58 #define FlushBuffer (1<<7)
59 #define FIFOLevelReg 0x0A
61 #define WaterLevelReg 0x0B
63 #define TStopNow (1<<7)
64 #define TStartNow (1<<6)
65 #define WrNFCIDtoFIFO (1<<5)
66 #define Initiator (1<<4)
67 #define RxLastBitsMask 0x07
68 #define ControlReg 0x0C // Miscellaneous control bits.
70 #define StartSend (1<<7)
71 #define BitFramingReg 0x0D // Adjustments for bit oriented frames
75 /*********** PAGE 1 Communication **************/
76 #define MSBFirst (1<<7)
77 #define DetectSync (1<<6)
80 #define TxCRCEn (1<<7)
81 #define TxModeReg 0x12
83 #define RxCRCEn (1<<7)
84 #define RxMultiple (1<<2)
85 #define RxModeReg 0x13
87 #define TxControlReg 0x14
89 #define InitialRFOn (1<<2)
90 #define TxAutoReg 0x15
94 #define RxThresholdReg 0x18
96 #define FelNFC1Reg 0x1A
97 #define FelNFC2Reg 0x1B
98 #define MifNFCReg 0x1C
100 #define ParityDisable (1<<4)
101 #define ManualRCVReg 0x1D
103 #define TypeBReg 0x1E
104 #define SerialSpeedReg 0x1F
106 /*********** PAGE 2 Configuration **************/
107 #define CRCResultMSB 0x21
108 #define CRCResultLSB 0x22
109 #define GsNOffReg 0x23
110 #define ModWidthReg 0x24
111 #define TxBitPhaseReg 0x25
112 #define RFCfgReg 0x26
113 #define GsNOnReg 0x27
114 #define CWGsPReg 0x28
115 #define ModGsPReg 0x29
117 #define TAuto (1<<7) // the timer starts automatically at the end of the transmission
118 #define TAutoRestart (1<<4) // the timer automatically restart its count-down from TReloadValue
119 #define TModeReg 0x2A // Defines settings for the timer
121 #define TPrescalerReg 0x2B
123 #define TReloadVal_Hi 0x2C
124 #define TReloadVal_Lo 0x2D
125 #define TCounterVal_Hi 0x2E
126 #define TCounterVal_Lo 0x2F
128 /*********** PAGE 3 TestRegister **************/
129 #define TestSel1Reg 0x31
130 #define TestSel2Reg 0x32
131 #define TestPinEnReg 0x33
132 #define TestPinValueReg 0x34
133 #define TestBusReg 0x35
134 #define AutoTestReg 0x36
135 #define VersionReg 0x37
136 #define AnalogTestReg 0x38
137 #define TestDAC1Reg 0x39
138 #define TestDAC2Reg 0x3A
139 #define TestADCReg 0x3B
142 //************ PN512 C O M M A N D S *************
143 #define CMD_IDLE 0x00 // No action: cancel current command
144 #define CMD_CONFIG 0x01
145 #define CMD_GENERATE_RANDOMID 0x02
146 #define CMD_CALCCRC 0x03
147 #define CMD_TRANSMIT 0x04
148 #define CMD_NOCMDCHANGE 0x07
149 #define CMD_RECEIVE 0x08
150 #define CMD_TRANSCEIVE 0x0C
151 #define CMD_TRANSCEIVE_TO 0x8C
152 #define CMD_AUTOCOLL 0x0D
153 #define CMD_MFAUTHENT 0x0E
154 #define CMD_SOFTRESET 0x0F
161 #define CONFIGNOTHING 0
162 #define CONFIGTYPEA 1
163 #define CONFIGTYPEB 2
165 #define ERROR_NOTAG 1
166 #define ERROR_PROTOCOL 2
167 #define ERROR_PARITY 3
168 #define ERROR_BUFOVFL 4
171 #define ERROR_SERNR 7
172 #define ERROR_BYTECOUNT 8
173 #define ERROR_BITCOUNT 9
174 #define ERROR_WRONGPARAM 10
175 #define ERROR_ATSLEN 11
176 #define ERROR_FSDLENTH 12
177 #define ERROR_UNKNOW_COMMAND 13
178 #define ERROR_INVALID_DATA 14
179 #define ERROR_SPEED 15
185 #define RxAThres106 1
186 #define RxAThres212 2
187 #define RxAThres424 3
188 #define RxAThres848 4
189 #define RxBThres106 5
190 #define RxBThres212 6
191 #define RxBThres424 7
192 #define RxBThres848 8
193 #define ARFAmpCfg106 9
194 #define ARFAmpCfg212 10
195 #define ARFAmpCfg424 11
196 #define ARFAmpCfg848 12
197 #define BRFAmpCfg106 13
198 #define BRFAmpCfg212 14
199 #define BRFAmpCfg424 15
200 #define BRFAmpCfg848 16
201 #define TypeACWGsP 17
202 #define TypeBCWGsP 18
204 enum request_direction
217 uint32_t bit_numbers
;
221 uint8_t timer_start_now
/*:1*/;
222 uint8_t timer_start_auto
/*:1*/;
224 enum request_direction direction
;
226 // the max time for waiting acknowlage from pn51x, unit is 100us
229 uint8_t rx_last_bits
;
231 uint8_t tx_done
/*:1*/;
235 void (*done
)(struct pn51x_request
*);
241 struct pn51x_request request
;
243 OS_Mutex_handle pn51x_lock
; /* only for pn51x_process_request lock ! */
244 #ifdef HANDLE_INTR_IN_TASK
245 #define EXT_INTR_EVENT 0x1
246 #define COMPLETE_EVENT 0x2
247 #define CLOSE_TASK_EVENT 0x4
248 uint32_t task_handle
;
250 #define COMPLETE_EVENT 0x1
252 OS_Event_handle pn51x_event
;
255 LWGPIO_STRUCT reset_pin
;
257 LWGPIO_STRUCT intr_pin
;
258 uint8_t intr_enable_mask
;
262 /* uint32_t task_handle; */ /* only use interrupt */
266 extern struct pn51x_common
*pn512
;
269 int pn51x_reg_write(uint8_t reg
, uint8_t value
);
270 uint8_t pn51x_reg_read(uint8_t reg
);
271 void pn51x_reg_clear(uint8_t reg
, uint8_t bitMask
);
272 void pn51x_reg_set(uint8_t reg
, uint8_t bitMask
);
273 int pn51x_fifo_write(uint8_t *data
, uint32_t len
);
274 int pn51x_fifo_read(uint8_t *data
, uint32_t len
);
275 void set_pn51x_timer(uint16_t timeOut
);
276 void turn_on_antenna(void);
277 void turn_off_antenna(void);
278 void pcd_config_iso14443_card(uint8_t flagConfig
, uint8_t cardType
);
279 void pn51x_process_done(struct pn51x_request
*req
);
280 void pn51x_process_request(struct pn51x_request
*req
);
281 int pn51x_init(struct pn51x_request
**req
);
282 int pn51x_uninit(void);