drivers/i2c/busses/i2c-pnx.c

   1 /*
   2  * Provides I2C support for Philips PNX010x/PNX4008 boards.
   3  *
   4  * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
   5  *          Vitaly Wool <vwool@ru.mvista.com>
   6  *
   7  * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
   8  * the terms of the GNU General Public License version 2. This program
   9  * is licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/ioport.h>
  16 #include <linux/delay.h>
  17 #include <linux/i2c.h>
  18 #include <linux/timer.h>
  19 #include <linux/completion.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/i2c-pnx.h>
  22 #include <linux/io.h>
  23 #include <linux/err.h>
  24 #include <linux/clk.h>
  25
  26 #include <mach/hardware.h>
  27 #include <mach/i2c.h>
  28
  29 #define I2C_PNX_TIMEOUT         10 /* msec */
  30 #define I2C_PNX_SPEED_KHZ       100
  31 #define I2C_PNX_REGION_SIZE     0x100
  32
  33 static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
  34 {
  35         while (timeout > 0 &&
  36                         (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
  37                 mdelay(1);
  38                 timeout--;
  39         }
  40         return (timeout <= 0);
  41 }
  42
  43 static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
  44 {
  45         while (timeout > 0 &&
  46                         (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
  47                 mdelay(1);
  48                 timeout--;
  49         }
  50         return (timeout <= 0);
  51 }
  52
  53 static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
  54 {
  55         struct timer_list *timer = &alg_data->mif.timer;
  56         unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);
  57
  58         if (expires <= 1)
  59                 expires = 2;
  60
  61         del_timer_sync(timer);
  62
  63         dev_dbg(&alg_data->adapter.dev, "Timer armed at %lu plus %lu jiffies.\n",
  64                 jiffies, expires);
  65
  66         timer->expires = jiffies + expires;
  67         timer->data = (unsigned long)&alg_data;
  68
  69         add_timer(timer);
  70 }
  71
  72 /**
  73  * i2c_pnx_start - start a device
  74  * @slave_addr:         slave address
  75  * @adap:               pointer to adapter structure
  76  *
  77  * Generate a START signal in the desired mode.
  78  */
  79 static int i2c_pnx_start(unsigned char slave_addr,
  80         struct i2c_pnx_algo_data *alg_data)
  81 {
  82         dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d\n", __func__,
  83                 slave_addr, alg_data->mif.mode);
  84
  85         /* Check for 7 bit slave addresses only */
  86         if (slave_addr & ~0x7f) {
  87                 dev_err(&alg_data->adapter.dev,
  88                         "%s: Invalid slave address %x. Only 7-bit addresses are supported\n",
  89                         alg_data->adapter.name, slave_addr);
  90                 return -EINVAL;
  91         }
  92
  93         /* First, make sure bus is idle */
  94         if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
  95                 /* Somebody else is monopolizing the bus */
  96                 dev_err(&alg_data->adapter.dev,
  97                         "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",
  98                         alg_data->adapter.name, slave_addr,
  99                         ioread32(I2C_REG_CTL(alg_data)),
 100                         ioread32(I2C_REG_STS(alg_data)));
 101                 return -EBUSY;
 102         } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
 103                 /* Sorry, we lost the bus */
 104                 dev_err(&alg_data->adapter.dev,
 105                         "%s: Arbitration failure. Slave addr = %02x\n",
 106                         alg_data->adapter.name, slave_addr);
 107                 return -EIO;
 108         }
 109
 110         /*
 111          * OK, I2C is enabled and we have the bus.
 112          * Clear the current TDI and AFI status flags.
 113          */
 114         iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
 115                   I2C_REG_STS(alg_data));
 116
 117         dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x\n", __func__,
 118                 (slave_addr << 1) | start_bit | alg_data->mif.mode);
 119
 120         /* Write the slave address, START bit and R/W bit */
 121         iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
 122                   I2C_REG_TX(alg_data));
 123
 124         dev_dbg(&alg_data->adapter.dev, "%s(): exit\n", __func__);
 125
 126         return 0;
 127 }
 128
 129 /**
 130  * i2c_pnx_stop - stop a device
 131  * @adap:               pointer to I2C adapter structure
 132  *
 133  * Generate a STOP signal to terminate the master transaction.
 134  */
 135 static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data)
 136 {
 137         /* Only 1 msec max timeout due to interrupt context */
 138         long timeout = 1000;
 139
 140         dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
 141                 __func__, ioread32(I2C_REG_STS(alg_data)));
 142
 143         /* Write a STOP bit to TX FIFO */
 144         iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
 145
 146         /* Wait until the STOP is seen. */
 147         while (timeout > 0 &&
 148                (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
 149                 /* may be called from interrupt context */
 150                 udelay(1);
 151                 timeout--;
 152         }
 153
 154         dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
 155                 __func__, ioread32(I2C_REG_STS(alg_data)));
 156 }
 157
 158 /**
 159  * i2c_pnx_master_xmit - transmit data to slave
 160  * @adap:               pointer to I2C adapter structure
 161  *
 162  * Sends one byte of data to the slave
 163  */
 164 static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)
 165 {
 166         u32 val;
 167
 168         dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
 169                 __func__, ioread32(I2C_REG_STS(alg_data)));
 170
 171         if (alg_data->mif.len > 0) {
 172                 /* We still have something to talk about... */
 173                 val = *alg_data->mif.buf++;
 174
 175                 alg_data->mif.len--;
 176                 iowrite32(val, I2C_REG_TX(alg_data));
 177
 178                 dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n",
 179                         __func__, val, alg_data->mif.len + 1);
 180
 181                 if (alg_data->mif.len == 0) {
 182                         if (alg_data->last) {
 183                                 /* Wait until the STOP is seen. */
 184                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
 185                                         dev_err(&alg_data->adapter.dev,
 186                                                 "The bus is still active after timeout\n");
 187                         }
 188                         /* Disable master interrupts */
 189                         iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
 190                                 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
 191                                   I2C_REG_CTL(alg_data));
 192
 193                         del_timer_sync(&alg_data->mif.timer);
 194
 195                         dev_dbg(&alg_data->adapter.dev,
 196                                 "%s(): Waking up xfer routine.\n",
 197                                 __func__);
 198
 199                         complete(&alg_data->mif.complete);
 200                 }
 201         } else if (alg_data->mif.len == 0) {
 202                 /* zero-sized transfer */
 203                 i2c_pnx_stop(alg_data);
 204
 205                 /* Disable master interrupts. */
 206                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
 207                         ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
 208                           I2C_REG_CTL(alg_data));
 209
 210                 /* Stop timer. */
 211                 del_timer_sync(&alg_data->mif.timer);
 212                 dev_dbg(&alg_data->adapter.dev,
 213                         "%s(): Waking up xfer routine after zero-xfer.\n",
 214                         __func__);
 215
 216                 complete(&alg_data->mif.complete);
 217         }
 218
 219         dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
 220                 __func__, ioread32(I2C_REG_STS(alg_data)));
 221
 222         return 0;
 223 }
 224
 225 /**
 226  * i2c_pnx_master_rcv - receive data from slave
 227  * @adap:               pointer to I2C adapter structure
 228  *
 229  * Reads one byte data from the slave
 230  */
 231 static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)
 232 {
 233         unsigned int val = 0;
 234         u32 ctl = 0;
 235
 236         dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
 237                 __func__, ioread32(I2C_REG_STS(alg_data)));
 238
 239         /* Check, whether there is already data,
 240          * or we didn't 'ask' for it yet.
 241          */
 242         if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
 243                 dev_dbg(&alg_data->adapter.dev,
 244                         "%s(): Write dummy data to fill Rx-fifo...\n",
 245                         __func__);
 246
 247                 if (alg_data->mif.len == 1) {
 248                         /*
 249                          * Enable interrupt RFDAIE (data in Rx fifo),
 250                          * and disable DRMIE (need data for Tx)
 251                          */
 252                         ctl = ioread32(I2C_REG_CTL(alg_data));
 253                         ctl |= mcntrl_rffie | mcntrl_daie;
 254                         ctl &= ~mcntrl_drmie;
 255                         iowrite32(ctl, I2C_REG_CTL(alg_data));
 256                 }
 257
 258                 /*
 259                  * Now we'll 'ask' for data:
 260                  * For each byte we want to receive, we must
 261                  * write a (dummy) byte to the Tx-FIFO.
 262                  */
 263                 iowrite32(val, I2C_REG_TX(alg_data));
 264
 265                 return 0;
 266         }
 267
 268         /* Handle data. */
 269         if (alg_data->mif.len > 0) {
 270                 val = ioread32(I2C_REG_RX(alg_data));
 271                 *alg_data->mif.buf++ = (u8) (val & 0xff);
 272                 dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n",
 273                         __func__, val, alg_data->mif.len);
 274
 275                 alg_data->mif.len--;
 276                 if (alg_data->mif.len == 0) {
 277                         if (alg_data->last)
 278                                 /* Wait until the STOP is seen. */
 279                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
 280                                         dev_err(&alg_data->adapter.dev,
 281                                                 "The bus is still active after timeout\n");
 282
 283                         /* Disable master interrupts */
 284                         ctl = ioread32(I2C_REG_CTL(alg_data));
 285                         ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 286                                  mcntrl_drmie | mcntrl_daie);
 287                         iowrite32(ctl, I2C_REG_CTL(alg_data));
 288
 289                         /* Kill timer. */
 290                         del_timer_sync(&alg_data->mif.timer);
 291                         complete(&alg_data->mif.complete);
 292                 }
 293         }
 294
 295         dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
 296                 __func__, ioread32(I2C_REG_STS(alg_data)));
 297
 298         return 0;
 299 }
 300
 301 static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
 302 {
 303         struct i2c_pnx_algo_data *alg_data = dev_id;
 304         u32 stat, ctl;
 305
 306         dev_dbg(&alg_data->adapter.dev,
 307                 "%s(): mstat = %x mctrl = %x, mode = %d\n",
 308                 __func__,
 309                 ioread32(I2C_REG_STS(alg_data)),
 310                 ioread32(I2C_REG_CTL(alg_data)),
 311                 alg_data->mif.mode);
 312         stat = ioread32(I2C_REG_STS(alg_data));
 313
 314         /* let's see what kind of event this is */
 315         if (stat & mstatus_afi) {
 316                 /* We lost arbitration in the midst of a transfer */
 317                 alg_data->mif.ret = -EIO;
 318
 319                 /* Disable master interrupts. */
 320                 ctl = ioread32(I2C_REG_CTL(alg_data));
 321                 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 322                          mcntrl_drmie);
 323                 iowrite32(ctl, I2C_REG_CTL(alg_data));
 324
 325                 /* Stop timer, to prevent timeout. */
 326                 del_timer_sync(&alg_data->mif.timer);
 327                 complete(&alg_data->mif.complete);
 328         } else if (stat & mstatus_nai) {
 329                 /* Slave did not acknowledge, generate a STOP */
 330                 dev_dbg(&alg_data->adapter.dev,
 331                         "%s(): Slave did not acknowledge, generating a STOP.\n",
 332                         __func__);
 333                 i2c_pnx_stop(alg_data);
 334
 335                 /* Disable master interrupts. */
 336                 ctl = ioread32(I2C_REG_CTL(alg_data));
 337                 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 338                          mcntrl_drmie);
 339                 iowrite32(ctl, I2C_REG_CTL(alg_data));
 340
 341                 /* Our return value. */
 342                 alg_data->mif.ret = -EIO;
 343
 344                 /* Stop timer, to prevent timeout. */
 345                 del_timer_sync(&alg_data->mif.timer);
 346                 complete(&alg_data->mif.complete);
 347         } else {
 348                 /*
 349                  * Two options:
 350                  * - Master Tx needs data.
 351                  * - There is data in the Rx-fifo
 352                  * The latter is only the case if we have requested for data,
 353                  * via a dummy write. (See 'i2c_pnx_master_rcv'.)
 354                  * We therefore check, as a sanity check, whether that interrupt
 355                  * has been enabled.
 356                  */
 357                 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
 358                         if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
 359                                 i2c_pnx_master_xmit(alg_data);
 360                         } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
 361                                 i2c_pnx_master_rcv(alg_data);
 362                         }
 363                 }
 364         }
 365
 366         /* Clear TDI and AFI bits */
 367         stat = ioread32(I2C_REG_STS(alg_data));
 368         iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
 369
 370         dev_dbg(&alg_data->adapter.dev,
 371                 "%s(): exiting, stat = %x ctrl = %x.\n",
 372                  __func__, ioread32(I2C_REG_STS(alg_data)),
 373                  ioread32(I2C_REG_CTL(alg_data)));
 374
 375         return IRQ_HANDLED;
 376 }
 377
 378 static void i2c_pnx_timeout(unsigned long data)
 379 {
 380         struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data;
 381         u32 ctl;
 382
 383         dev_err(&alg_data->adapter.dev,
 384                 "Master timed out. stat = %04x, cntrl = %04x. Resetting master...\n",
 385                 ioread32(I2C_REG_STS(alg_data)),
 386                 ioread32(I2C_REG_CTL(alg_data)));
 387
 388         /* Reset master and disable interrupts */
 389         ctl = ioread32(I2C_REG_CTL(alg_data));
 390         ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
 391         iowrite32(ctl, I2C_REG_CTL(alg_data));
 392
 393         ctl |= mcntrl_reset;
 394         iowrite32(ctl, I2C_REG_CTL(alg_data));
 395         wait_reset(I2C_PNX_TIMEOUT, alg_data);
 396         alg_data->mif.ret = -EIO;
 397         complete(&alg_data->mif.complete);
 398 }
 399
 400 static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data)
 401 {
 402         u32 stat;
 403
 404         if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
 405                 dev_err(&alg_data->adapter.dev,
 406                         "%s: Bus is still active after xfer. Reset it...\n",
 407                         alg_data->adapter.name);
 408                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 409                           I2C_REG_CTL(alg_data));
 410                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 411         } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
 412                 /* If there is data in the fifo's after transfer,
 413                  * flush fifo's by reset.
 414                  */
 415                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 416                           I2C_REG_CTL(alg_data));
 417                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 418         } else if (stat & mstatus_nai) {
 419                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 420                           I2C_REG_CTL(alg_data));
 421                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 422         }
 423 }
 424
 425 /**
 426  * i2c_pnx_xfer - generic transfer entry point
 427  * @adap:               pointer to I2C adapter structure
 428  * @msgs:               array of messages
 429  * @num:                number of messages
 430  *
 431  * Initiates the transfer
 432  */
 433 static int
 434 i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 435 {
 436         struct i2c_msg *pmsg;
 437         int rc = 0, completed = 0, i;
 438         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 439         u32 stat = ioread32(I2C_REG_STS(alg_data));
 440
 441         dev_dbg(&alg_data->adapter.dev,
 442                 "%s(): entering: %d messages, stat = %04x.\n",
 443                 __func__, num, ioread32(I2C_REG_STS(alg_data)));
 444
 445         bus_reset_if_active(alg_data);
 446
 447         /* Process transactions in a loop. */
 448         for (i = 0; rc >= 0 && i < num; i++) {
 449                 u8 addr;
 450
 451                 pmsg = &msgs[i];
 452                 addr = pmsg->addr;
 453
 454                 if (pmsg->flags & I2C_M_TEN) {
 455                         dev_err(&alg_data->adapter.dev,
 456                                 "%s: 10 bits addr not supported!\n",
 457                                 alg_data->adapter.name);
 458                         rc = -EINVAL;
 459                         break;
 460                 }
 461
 462                 alg_data->mif.buf = pmsg->buf;
 463                 alg_data->mif.len = pmsg->len;
 464                 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
 465                         I2C_SMBUS_READ : I2C_SMBUS_WRITE;
 466                 alg_data->mif.ret = 0;
 467                 alg_data->last = (i == num - 1);
 468
 469                 dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n",
 470                         __func__, alg_data->mif.mode, alg_data->mif.len);
 471
 472                 i2c_pnx_arm_timer(alg_data);
 473
 474                 /* initialize the completion var */
 475                 init_completion(&alg_data->mif.complete);
 476
 477                 /* Enable master interrupt */
 478                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
 479                                 mcntrl_naie | mcntrl_drmie,
 480                           I2C_REG_CTL(alg_data));
 481
 482                 /* Put start-code and slave-address on the bus. */
 483                 rc = i2c_pnx_start(addr, alg_data);
 484                 if (rc < 0)
 485                         break;
 486
 487                 /* Wait for completion */
 488                 wait_for_completion(&alg_data->mif.complete);
 489
 490                 if (!(rc = alg_data->mif.ret))
 491                         completed++;
 492                 dev_dbg(&alg_data->adapter.dev,
 493                         "%s(): Complete, return code = %d.\n",
 494                         __func__, rc);
 495
 496                 /* Clear TDI and AFI bits in case they are set. */
 497                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
 498                         dev_dbg(&alg_data->adapter.dev,
 499                                 "%s: TDI still set... clearing now.\n",
 500                                 alg_data->adapter.name);
 501                         iowrite32(stat, I2C_REG_STS(alg_data));
 502                 }
 503                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
 504                         dev_dbg(&alg_data->adapter.dev,
 505                                 "%s: AFI still set... clearing now.\n",
 506                                 alg_data->adapter.name);
 507                         iowrite32(stat, I2C_REG_STS(alg_data));
 508                 }
 509         }
 510
 511         bus_reset_if_active(alg_data);
 512
 513         /* Cleanup to be sure... */
 514         alg_data->mif.buf = NULL;
 515         alg_data->mif.len = 0;
 516
 517         dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",
 518                 __func__, ioread32(I2C_REG_STS(alg_data)));
 519
 520         if (completed != num)
 521                 return ((rc < 0) ? rc : -EREMOTEIO);
 522
 523         return num;
 524 }
 525
 526 static u32 i2c_pnx_func(struct i2c_adapter *adapter)
 527 {
 528         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 529 }
 530
 531 static struct i2c_algorithm pnx_algorithm = {
 532         .master_xfer = i2c_pnx_xfer,
 533         .functionality = i2c_pnx_func,
 534 };
 535
 536 #ifdef CONFIG_PM
 537 static int i2c_pnx_controller_suspend(struct platform_device *pdev,
 538                                       pm_message_t state)
 539 {
 540         struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
 541
 542         /* FIXME: shouldn't this be clk_disable? */
 543         clk_enable(alg_data->clk);
 544
 545         return 0;
 546 }
 547
 548 static int i2c_pnx_controller_resume(struct platform_device *pdev)
 549 {
 550         struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
 551
 552         return clk_enable(alg_data->clk);
 553 }
 554 #else
 555 #define i2c_pnx_controller_suspend      NULL
 556 #define i2c_pnx_controller_resume       NULL
 557 #endif
 558
 559 static int __devinit i2c_pnx_probe(struct platform_device *pdev)
 560 {
 561         unsigned long tmp;
 562         int ret = 0;
 563         struct i2c_pnx_algo_data *alg_data;
 564         unsigned long freq;
 565         struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
 566
 567         if (!i2c_pnx || !i2c_pnx->name) {
 568                 dev_err(&pdev->dev, "%s: no platform data supplied\n",
 569                        __func__);
 570                 ret = -EINVAL;
 571                 goto out;
 572         }
 573
 574         alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
 575         if (!alg_data) {
 576                 ret = -ENOMEM;
 577                 goto err_kzalloc;
 578         }
 579
 580         platform_set_drvdata(pdev, alg_data);
 581
 582         strlcpy(alg_data->adapter.name, i2c_pnx->name,
 583                 sizeof(alg_data->adapter.name));
 584         alg_data->adapter.dev.parent = &pdev->dev;
 585         alg_data->adapter.algo = &pnx_algorithm;
 586         alg_data->adapter.algo_data = alg_data;
 587         alg_data->adapter.nr = pdev->id;
 588         alg_data->i2c_pnx = i2c_pnx;
 589
 590         alg_data->clk = clk_get(&pdev->dev, NULL);
 591         if (IS_ERR(alg_data->clk)) {
 592                 ret = PTR_ERR(alg_data->clk);
 593                 goto out_drvdata;
 594         }
 595
 596         init_timer(&alg_data->mif.timer);
 597         alg_data->mif.timer.function = i2c_pnx_timeout;
 598         alg_data->mif.timer.data = (unsigned long)alg_data;
 599
 600         /* Register I/O resource */
 601         if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
 602                                 pdev->name)) {
 603                 dev_err(&pdev->dev,
 604                        "I/O region 0x%08x for I2C already in use.\n",
 605                        i2c_pnx->base);
 606                 ret = -ENODEV;
 607                 goto out_clkget;
 608         }
 609
 610         alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 611         if (!alg_data->ioaddr) {
 612                 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
 613                 ret = -ENOMEM;
 614                 goto out_release;
 615         }
 616
 617         ret = clk_enable(alg_data->clk);
 618         if (ret)
 619                 goto out_unmap;
 620
 621         freq = clk_get_rate(alg_data->clk);
 622
 623         /*
 624          * Clock Divisor High This value is the number of system clocks
 625          * the serial clock (SCL) will be high.
 626          * For example, if the system clock period is 50 ns and the maximum
 627          * desired serial period is 10000 ns (100 kHz), then CLKHI would be
 628          * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
 629          * programmed into CLKHI will vary from this slightly due to
 630          * variations in the output pad's rise and fall times as well as
 631          * the deglitching filter length.
 632          */
 633
 634         tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
 635         iowrite32(tmp, I2C_REG_CKH(alg_data));
 636         iowrite32(tmp, I2C_REG_CKL(alg_data));
 637
 638         iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
 639         if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
 640                 ret = -ENODEV;
 641                 goto out_clock;
 642         }
 643         init_completion(&alg_data->mif.complete);
 644
 645         ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
 646                         0, pdev->name, alg_data);
 647         if (ret)
 648                 goto out_clock;
 649
 650         /* Register this adapter with the I2C subsystem */
 651         ret = i2c_add_numbered_adapter(&alg_data->adapter);
 652         if (ret < 0) {
 653                 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
 654                 goto out_irq;
 655         }
 656
 657         dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
 658                alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
 659
 660         return 0;
 661
 662 out_irq:
 663         free_irq(i2c_pnx->irq, alg_data);
 664 out_clock:
 665         clk_disable(alg_data->clk);
 666 out_unmap:
 667         iounmap(alg_data->ioaddr);
 668 out_release:
 669         release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 670 out_clkget:
 671         clk_put(alg_data->clk);
 672 out_drvdata:
 673         kfree(alg_data);
 674 err_kzalloc:
 675         platform_set_drvdata(pdev, NULL);
 676 out:
 677         return ret;
 678 }
 679
 680 static int __devexit i2c_pnx_remove(struct platform_device *pdev)
 681 {
 682         struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
 683         struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx;
 684
 685         free_irq(i2c_pnx->irq, alg_data);
 686         i2c_del_adapter(&alg_data->adapter);
 687         clk_disable(alg_data->clk);
 688         iounmap(alg_data->ioaddr);
 689         release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 690         clk_put(alg_data->clk);
 691         kfree(alg_data);
 692         platform_set_drvdata(pdev, NULL);
 693
 694         return 0;
 695 }
 696
 697 static struct platform_driver i2c_pnx_driver = {
 698         .driver = {
 699                 .name = "pnx-i2c",
 700                 .owner = THIS_MODULE,
 701         },
 702         .probe = i2c_pnx_probe,
 703         .remove = __devexit_p(i2c_pnx_remove),
 704         .suspend = i2c_pnx_controller_suspend,
 705         .resume = i2c_pnx_controller_resume,
 706 };
 707
 708 static int __init i2c_adap_pnx_init(void)
 709 {
 710         return platform_driver_register(&i2c_pnx_driver);
 711 }
 712
 713 static void __exit i2c_adap_pnx_exit(void)
 714 {
 715         platform_driver_unregister(&i2c_pnx_driver);
 716 }
 717
 718 MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
 719 MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
 720 MODULE_LICENSE("GPL");
 721 MODULE_ALIAS("platform:pnx-i2c");
 722
 723 /* We need to make sure I2C is initialized before USB */
 724 subsys_initcall(i2c_adap_pnx_init);
 725 module_exit(i2c_adap_pnx_exit);