2 * VIA IDE driver for Linux. Supported southbridges:
4 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
5 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
6 * vt8235, vt8237, vt8237a
8 * Copyright (c) 2000-2002 Vojtech Pavlik
9 * Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
11 * Based on the work of:
17 * Obsolete device documentation publically available from via.com.tw
18 * Current device documentation available under NDA only
22 * This program is free software; you can redistribute it and/or modify it
23 * under the terms of the GNU General Public License version 2 as published by
24 * the Free Software Foundation.
27 #include <linux/module.h>
28 #include <linux/kernel.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/ide.h>
32 #include <linux/dmi.h>
34 #ifdef CONFIG_PPC_CHRP
35 #include <asm/processor.h>
38 #define DRV_NAME "via82cxxx"
40 #define VIA_IDE_ENABLE 0x40
41 #define VIA_IDE_CONFIG 0x41
42 #define VIA_FIFO_CONFIG 0x43
43 #define VIA_MISC_1 0x44
44 #define VIA_MISC_2 0x45
45 #define VIA_MISC_3 0x46
46 #define VIA_DRIVE_TIMING 0x48
47 #define VIA_8BIT_TIMING 0x4e
48 #define VIA_ADDRESS_SETUP 0x4c
49 #define VIA_UDMA_TIMING 0x50
51 #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
52 #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
53 #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
54 #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
55 #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
56 #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
57 #define VIA_SATA_PATA 0x80 /* SATA/PATA combined configuration */
60 VIA_IDFLAG_SINGLE
= (1 << 1), /* single channel controller */
64 * VIA SouthBridge chips.
67 static struct via_isa_bridge
{
74 } via_isa_bridges
[] = {
75 { "vx855", PCI_DEVICE_ID_VIA_VX855
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
| VIA_SATA_PATA
},
76 { "vx800", PCI_DEVICE_ID_VIA_VX800
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
| VIA_SATA_PATA
},
77 { "cx700", PCI_DEVICE_ID_VIA_CX700
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
| VIA_SATA_PATA
},
78 { "vt8261", PCI_DEVICE_ID_VIA_8261
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
79 { "vt8237s", PCI_DEVICE_ID_VIA_8237S
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
80 { "vt6410", PCI_DEVICE_ID_VIA_6410
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
81 { "vt6415", PCI_DEVICE_ID_VIA_6410
, 0x00, 0xff, ATA_UDMA6
, VIA_BAD_AST
},
82 { "vt8251", PCI_DEVICE_ID_VIA_8251
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
83 { "vt8237", PCI_DEVICE_ID_VIA_8237
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
84 { "vt8237a", PCI_DEVICE_ID_VIA_8237A
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
85 { "vt8235", PCI_DEVICE_ID_VIA_8235
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
86 { "vt8233a", PCI_DEVICE_ID_VIA_8233A
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
87 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0
, 0x00, 0x2f, ATA_UDMA5
, },
88 { "vt8233", PCI_DEVICE_ID_VIA_8233_0
, 0x00, 0x2f, ATA_UDMA5
, },
89 { "vt8231", PCI_DEVICE_ID_VIA_8231
, 0x00, 0x2f, ATA_UDMA5
, },
90 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686
, 0x40, 0x4f, ATA_UDMA5
, },
91 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686
, 0x10, 0x2f, ATA_UDMA4
, },
92 { "vt82c686", PCI_DEVICE_ID_VIA_82C686
, 0x00, 0x0f, ATA_UDMA2
, VIA_BAD_CLK66
},
93 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596
, 0x10, 0x2f, ATA_UDMA4
, },
94 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596
, 0x00, 0x0f, ATA_UDMA2
, VIA_BAD_CLK66
},
95 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x47, 0x4f, ATA_UDMA2
, VIA_SET_FIFO
},
96 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x40, 0x46, ATA_UDMA2
, VIA_SET_FIFO
| VIA_BAD_PREQ
},
97 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x30, 0x3f, ATA_UDMA2
, VIA_SET_FIFO
},
98 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0
, 0x20, 0x2f, ATA_UDMA2
, VIA_SET_FIFO
},
99 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0
, 0x00, 0x0f, 0x00, VIA_SET_FIFO
},
100 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, 0x00, VIA_SET_FIFO
| VIA_NO_UNMASK
},
101 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, 0x00, VIA_SET_FIFO
| VIA_NO_UNMASK
| VIA_BAD_ID
},
102 { "vtxxxx", PCI_DEVICE_ID_VIA_ANON
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
106 static unsigned int via_clock
;
107 static char *via_dma
[] = { "16", "25", "33", "44", "66", "100", "133" };
111 struct via_isa_bridge
*via_config
;
112 unsigned int via_80w
;
116 * via_set_speed - write timing registers
119 * @timing: IDE timing data to use
121 * via_set_speed writes timing values to the chipset registers
124 static void via_set_speed(ide_hwif_t
*hwif
, u8 dn
, struct ide_timing
*timing
)
126 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
127 struct ide_host
*host
= pci_get_drvdata(dev
);
128 struct via82cxxx_dev
*vdev
= host
->host_priv
;
131 if (~vdev
->via_config
->flags
& VIA_BAD_AST
) {
132 pci_read_config_byte(dev
, VIA_ADDRESS_SETUP
, &t
);
133 t
= (t
& ~(3 << ((3 - dn
) << 1))) | ((clamp_val(timing
->setup
, 1, 4) - 1) << ((3 - dn
) << 1));
134 pci_write_config_byte(dev
, VIA_ADDRESS_SETUP
, t
);
137 pci_write_config_byte(dev
, VIA_8BIT_TIMING
+ (1 - (dn
>> 1)),
138 ((clamp_val(timing
->act8b
, 1, 16) - 1) << 4) | (clamp_val(timing
->rec8b
, 1, 16) - 1));
140 pci_write_config_byte(dev
, VIA_DRIVE_TIMING
+ (3 - dn
),
141 ((clamp_val(timing
->active
, 1, 16) - 1) << 4) | (clamp_val(timing
->recover
, 1, 16) - 1));
143 switch (vdev
->via_config
->udma_mask
) {
144 case ATA_UDMA2
: t
= timing
->udma
? (0xe0 | (clamp_val(timing
->udma
, 2, 5) - 2)) : 0x03; break;
145 case ATA_UDMA4
: t
= timing
->udma
? (0xe8 | (clamp_val(timing
->udma
, 2, 9) - 2)) : 0x0f; break;
146 case ATA_UDMA5
: t
= timing
->udma
? (0xe0 | (clamp_val(timing
->udma
, 2, 9) - 2)) : 0x07; break;
147 case ATA_UDMA6
: t
= timing
->udma
? (0xe0 | (clamp_val(timing
->udma
, 2, 9) - 2)) : 0x07; break;
150 /* Set UDMA unless device is not UDMA capable */
151 if (vdev
->via_config
->udma_mask
) {
154 pci_read_config_byte(dev
, VIA_UDMA_TIMING
+ 3 - dn
, &udma_etc
);
156 /* clear transfer mode bit */
160 /* preserve 80-wire cable detection bit */
165 pci_write_config_byte(dev
, VIA_UDMA_TIMING
+ 3 - dn
, udma_etc
);
170 * via_set_drive - configure transfer mode
172 * @drive: Drive to set up
174 * via_set_drive() computes timing values configures the chipset to
175 * a desired transfer mode. It also can be called by upper layers.
178 static void via_set_drive(ide_hwif_t
*hwif
, ide_drive_t
*drive
)
180 ide_drive_t
*peer
= ide_get_pair_dev(drive
);
181 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
182 struct ide_host
*host
= pci_get_drvdata(dev
);
183 struct via82cxxx_dev
*vdev
= host
->host_priv
;
184 struct ide_timing t
, p
;
186 const u8 speed
= drive
->dma_mode
;
188 T
= 1000000000 / via_clock
;
190 switch (vdev
->via_config
->udma_mask
) {
191 case ATA_UDMA2
: UT
= T
; break;
192 case ATA_UDMA4
: UT
= T
/2; break;
193 case ATA_UDMA5
: UT
= T
/3; break;
194 case ATA_UDMA6
: UT
= T
/4; break;
198 ide_timing_compute(drive
, speed
, &t
, T
, UT
);
201 ide_timing_compute(peer
, peer
->pio_mode
, &p
, T
, UT
);
202 ide_timing_merge(&p
, &t
, &t
, IDE_TIMING_8BIT
);
205 via_set_speed(hwif
, drive
->dn
, &t
);
209 * via_set_pio_mode - set host controller for PIO mode
213 * A callback from the upper layers for PIO-only tuning.
216 static void via_set_pio_mode(ide_hwif_t
*hwif
, ide_drive_t
*drive
)
218 drive
->dma_mode
= drive
->pio_mode
;
219 via_set_drive(hwif
, drive
);
222 static struct via_isa_bridge
*via_config_find(struct pci_dev
**isa
)
224 struct via_isa_bridge
*via_config
;
226 for (via_config
= via_isa_bridges
;
227 via_config
->id
!= PCI_DEVICE_ID_VIA_ANON
; via_config
++)
228 if ((*isa
= pci_get_device(PCI_VENDOR_ID_VIA
+
229 !!(via_config
->flags
& VIA_BAD_ID
),
230 via_config
->id
, NULL
))) {
232 if ((*isa
)->revision
>= via_config
->rev_min
&&
233 (*isa
)->revision
<= via_config
->rev_max
)
242 * Check and handle 80-wire cable presence
244 static void via_cable_detect(struct via82cxxx_dev
*vdev
, u32 u
)
248 switch (vdev
->via_config
->udma_mask
) {
250 for (i
= 24; i
>= 0; i
-= 8)
251 if (((u
>> (i
& 16)) & 8) &&
253 (((u
>> i
) & 7) < 2)) {
258 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
263 for (i
= 24; i
>= 0; i
-= 8)
264 if (((u
>> i
) & 0x10) ||
265 (((u
>> i
) & 0x20) &&
266 (((u
>> i
) & 7) < 4))) {
267 /* BIOS 80-wire bit or
268 * UDMA w/ < 60ns/cycle
270 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
275 for (i
= 24; i
>= 0; i
-= 8)
276 if (((u
>> i
) & 0x10) ||
277 (((u
>> i
) & 0x20) &&
278 (((u
>> i
) & 7) < 6))) {
279 /* BIOS 80-wire bit or
280 * UDMA w/ < 60ns/cycle
282 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
289 * init_chipset_via82cxxx - initialization handler
292 * The initialization callback. Here we determine the IDE chip type
293 * and initialize its drive independent registers.
296 static int init_chipset_via82cxxx(struct pci_dev
*dev
)
298 struct ide_host
*host
= pci_get_drvdata(dev
);
299 struct via82cxxx_dev
*vdev
= host
->host_priv
;
300 struct via_isa_bridge
*via_config
= vdev
->via_config
;
305 * Detect cable and configure Clk66
307 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
309 via_cable_detect(vdev
, u
);
311 if (via_config
->udma_mask
== ATA_UDMA4
) {
313 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
|0x80008);
314 } else if (via_config
->flags
& VIA_BAD_CLK66
) {
315 /* Would cause trouble on 596a and 686 */
316 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
& ~0x80008);
320 * Check whether interfaces are enabled.
323 pci_read_config_byte(dev
, VIA_IDE_ENABLE
, &v
);
326 * Set up FIFO sizes and thresholds.
329 pci_read_config_byte(dev
, VIA_FIFO_CONFIG
, &t
);
331 /* Disable PREQ# till DDACK# */
332 if (via_config
->flags
& VIA_BAD_PREQ
) {
333 /* Would crash on 586b rev 41 */
337 /* Fix FIFO split between channels */
338 if (via_config
->flags
& VIA_SET_FIFO
) {
341 case 2: t
|= 0x00; break; /* 16 on primary */
342 case 1: t
|= 0x60; break; /* 16 on secondary */
343 case 3: t
|= 0x20; break; /* 8 pri 8 sec */
347 pci_write_config_byte(dev
, VIA_FIFO_CONFIG
, t
);
353 * Cable special cases
356 static const struct dmi_system_id cable_dmi_table
[] = {
358 .ident
= "Acer Ferrari 3400",
360 DMI_MATCH(DMI_BOARD_VENDOR
, "Acer,Inc."),
361 DMI_MATCH(DMI_BOARD_NAME
, "Ferrari 3400"),
367 static int via_cable_override(struct pci_dev
*pdev
)
370 if (dmi_check_system(cable_dmi_table
))
373 /* Arima W730-K8/Targa Visionary 811/... */
374 if (pdev
->subsystem_vendor
== 0x161F &&
375 pdev
->subsystem_device
== 0x2032)
381 static u8
via82cxxx_cable_detect(ide_hwif_t
*hwif
)
383 struct pci_dev
*pdev
= to_pci_dev(hwif
->dev
);
384 struct ide_host
*host
= pci_get_drvdata(pdev
);
385 struct via82cxxx_dev
*vdev
= host
->host_priv
;
387 if (via_cable_override(pdev
))
388 return ATA_CBL_PATA40_SHORT
;
390 if ((vdev
->via_config
->flags
& VIA_SATA_PATA
) && hwif
->channel
== 0)
393 if ((vdev
->via_80w
>> hwif
->channel
) & 1)
394 return ATA_CBL_PATA80
;
396 return ATA_CBL_PATA40
;
399 static const struct ide_port_ops via_port_ops
= {
400 .set_pio_mode
= via_set_pio_mode
,
401 .set_dma_mode
= via_set_drive
,
402 .cable_detect
= via82cxxx_cable_detect
,
405 static const struct ide_port_info via82cxxx_chipset __devinitdata
= {
407 .init_chipset
= init_chipset_via82cxxx
,
408 .enablebits
= { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
409 .port_ops
= &via_port_ops
,
410 .host_flags
= IDE_HFLAG_PIO_NO_BLACKLIST
|
411 IDE_HFLAG_POST_SET_MODE
|
413 .pio_mask
= ATA_PIO5
,
414 .swdma_mask
= ATA_SWDMA2
,
415 .mwdma_mask
= ATA_MWDMA2
,
418 static int __devinit
via_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
420 struct pci_dev
*isa
= NULL
;
421 struct via_isa_bridge
*via_config
;
422 struct via82cxxx_dev
*vdev
;
424 u8 idx
= id
->driver_data
;
425 struct ide_port_info d
;
427 d
= via82cxxx_chipset
;
430 * Find the ISA bridge and check we know what it is.
432 via_config
= via_config_find(&isa
);
435 * Print the boot message.
437 printk(KERN_INFO DRV_NAME
" %s: VIA %s (rev %02x) IDE %sDMA%s\n",
438 pci_name(dev
), via_config
->name
, isa
->revision
,
439 via_config
->udma_mask
? "U" : "MW",
440 via_dma
[via_config
->udma_mask
?
441 (fls(via_config
->udma_mask
) - 1) : 0]);
446 * Determine system bus clock.
448 via_clock
= (ide_pci_clk
? ide_pci_clk
: 33) * 1000;
451 case 33000: via_clock
= 33333; break;
452 case 37000: via_clock
= 37500; break;
453 case 41000: via_clock
= 41666; break;
456 if (via_clock
< 20000 || via_clock
> 50000) {
457 printk(KERN_WARNING DRV_NAME
": User given PCI clock speed "
458 "impossible (%d), using 33 MHz instead.\n", via_clock
);
463 d
.enablebits
[1].reg
= d
.enablebits
[0].reg
= 0;
465 d
.host_flags
|= IDE_HFLAG_NO_AUTODMA
;
467 if (idx
== VIA_IDFLAG_SINGLE
)
468 d
.host_flags
|= IDE_HFLAG_SINGLE
;
470 if ((via_config
->flags
& VIA_NO_UNMASK
) == 0)
471 d
.host_flags
|= IDE_HFLAG_UNMASK_IRQS
;
473 d
.udma_mask
= via_config
->udma_mask
;
475 vdev
= kzalloc(sizeof(*vdev
), GFP_KERNEL
);
477 printk(KERN_ERR DRV_NAME
" %s: out of memory :(\n",
482 vdev
->via_config
= via_config
;
484 rc
= ide_pci_init_one(dev
, &d
, vdev
);
491 static void __devexit
via_remove(struct pci_dev
*dev
)
493 struct ide_host
*host
= pci_get_drvdata(dev
);
494 struct via82cxxx_dev
*vdev
= host
->host_priv
;
500 static const struct pci_device_id via_pci_tbl
[] = {
501 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_82C576_1
), 0 },
502 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_82C586_1
), 0 },
503 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_CX700_IDE
), 0 },
504 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_VX855_IDE
), VIA_IDFLAG_SINGLE
},
505 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_6410
), 1 },
506 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_6415
), 1 },
507 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_SATA_EIDE
), 1 },
510 MODULE_DEVICE_TABLE(pci
, via_pci_tbl
);
512 static struct pci_driver via_pci_driver
= {
514 .id_table
= via_pci_tbl
,
515 .probe
= via_init_one
,
516 .remove
= __devexit_p(via_remove
),
517 .suspend
= ide_pci_suspend
,
518 .resume
= ide_pci_resume
,
521 static int __init
via_ide_init(void)
523 return ide_pci_register_driver(&via_pci_driver
);
526 static void __exit
via_ide_exit(void)
528 pci_unregister_driver(&via_pci_driver
);
531 module_init(via_ide_init
);
532 module_exit(via_ide_exit
);
534 MODULE_AUTHOR("Vojtech Pavlik, Bartlomiej Zolnierkiewicz, Michel Aubry, Jeff Garzik, Andre Hedrick");
535 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
536 MODULE_LICENSE("GPL");