gcc/config/pru/pru.h

   1 /* Definitions of target machine for TI PRU.
   2    Copyright (C) 2014-2024 Free Software Foundation, Inc.
   3    Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING3.  If not see
  19    <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_PRU_H
  22 #define GCC_PRU_H
  23
  24 #include "config/pru/pru-opts.h"
  25
  26 /* Define built-in preprocessor macros.  */
  27 #define TARGET_CPU_CPP_BUILTINS()                   \
  28   do                                                \
  29     {                                               \
  30       builtin_define_std ("__PRU__");               \
  31       builtin_define_std ("__pru__");               \
  32       builtin_define_std ("__PRU_V3__");            \
  33       builtin_define_std ("__LITTLE_ENDIAN__");     \
  34       builtin_define_std ("__little_endian__");     \
  35       /* Trampolines are disabled for now.  */      \
  36       builtin_define_std ("NO_TRAMPOLINES");        \
  37     }                                               \
  38   while (0)
  39
  40 /* TI ABI implementation is not feature-complete enough (e.g. function
  41    pointers are not supported), so we cannot list it as a multilib variant.
  42    To prevent misuse from users, do not link any of the standard libraries.  */
  43 #define DRIVER_SELF_SPECS                             \
  44   "%{mabi=ti:-nodefaultlibs} "                        \
  45   "%{mmcu=*:-specs=device-specs/%*%s %<mmcu=*} "
  46
  47 #undef CPP_SPEC
  48 #define CPP_SPEC                                        \
  49   "%(cpp_device) "                                      \
  50   "%{mabi=ti:-D__PRU_EABI_TI__; :-D__PRU_EABI_GNU__}"
  51
  52 /* Do not relax when in TI ABI mode since TI tools do not always
  53    put PRU_S10_PCREL.  */
  54 #undef  LINK_SPEC
  55 #define LINK_SPEC                                           \
  56   "%(link_device) "                                         \
  57   "%{mabi=ti:--no-relax;:%{mno-relax:--no-relax;:--relax}} "   \
  58   "%{shared:%eshared is not supported} "
  59
  60 /* CRT0 is carefully maintained to be compatible with both GNU and TI ABIs.  */
  61 #undef  STARTFILE_SPEC
  62 #define STARTFILE_SPEC                                                  \
  63   "%{!pg:%{minrt:crt0-minrt.o%s}%{!minrt:crt0.o%s}} %{!mabi=ti:-lgcc} "
  64
  65 #undef  ENDFILE_SPEC
  66 #define ENDFILE_SPEC "%{!mabi=ti:-lgloss} "
  67
  68 /* TI ABI mandates that ELF symbols do not start with any prefix.  */
  69 #undef USER_LABEL_PREFIX
  70 #define USER_LABEL_PREFIX ""
  71
  72 #undef LOCAL_LABEL_PREFIX
  73 #define LOCAL_LABEL_PREFIX ".L"
  74
  75 /* Storage layout.  */
  76
  77 #define DEFAULT_SIGNED_CHAR 0
  78 #define BITS_BIG_ENDIAN 0
  79 #define BYTES_BIG_ENDIAN 0
  80 #define WORDS_BIG_ENDIAN 0
  81
  82 /* PRU is represented in GCC as an 8-bit CPU with fast 16-bit and 32-bit
  83    arithmetic.  */
  84 #define BITS_PER_WORD 8
  85
  86 #ifdef IN_LIBGCC2
  87 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
  88 #define UNITS_PER_WORD 4
  89 #else
  90 /* Width of a word, in units (bytes).  */
  91 #define UNITS_PER_WORD 1
  92 #endif
  93
  94 #define POINTER_SIZE 32
  95 #define BIGGEST_ALIGNMENT 8
  96 #define STRICT_ALIGNMENT 0
  97 #define FUNCTION_BOUNDARY 8     /* Func pointers are word-addressed.  */
  98 #define PARM_BOUNDARY 8
  99 #define STACK_BOUNDARY 8
 100 #define MAX_FIXED_MODE_SIZE 64
 101
 102 #define POINTERS_EXTEND_UNSIGNED 1
 103
 104 /* Layout of source language data types.  */
 105
 106 #define INT_TYPE_SIZE 32
 107 #define SHORT_TYPE_SIZE 16
 108 #define LONG_TYPE_SIZE 32
 109 #define LONG_LONG_TYPE_SIZE 64
 110
 111 #undef SIZE_TYPE
 112 #define SIZE_TYPE "unsigned int"
 113
 114 #undef PTRDIFF_TYPE
 115 #define PTRDIFF_TYPE "int"
 116
 117
 118 /* Basic characteristics of PRU registers:
 119
 120    Regno  Name
 121    0      r0              Caller Saved.  Also used as a static chain register.
 122    1      r1              Caller Saved.  Also used as a temporary by function.
 123                           profiler and function prologue/epilogue.
 124    2      r2       sp     Stack Pointer.
 125    3*     r3.w0           Caller saved.
 126    3*     r3.w2    ra     Return Address (16-bit).
 127    4      r4       fp     Frame Pointer, also called Argument Pointer in ABI.
 128    5-13   r5-r13          Callee Saved Registers.
 129    14-29  r14-r29         Register Arguments.  Caller Saved Registers.
 130    14-15  r14-r15         Return Location.
 131    30     r30             Special I/O register.  Not used by compiler.
 132    31     r31             Special I/O register.  Not used by compiler.
 133
 134    32     loop_cntr       Internal register used as a counter by LOOP insns.
 135
 136    33     pc              Not an actual register.
 137
 138    34     fake_fp         Fake Frame Pointer (always eliminated).
 139    35     fake_ap         Fake Argument Pointer (always eliminated).
 140    36                     First Pseudo Register.
 141
 142    The definitions for some hard register numbers are located in pru.md.
 143    Note that GCC's internal register numbering differs from the conventional
 144    register naming in PRU ISA.  PRU ISA defines word-based register numbers
 145    and sub-register suffixes (e.g. RA is r3.w0).  GCC uses linear numbering
 146    of 8 bit sub-registers (e.g. RA starts at r12).  When outputting assembly,
 147    GCC will take into account the RTL operand size (e.g. r12:HI) in order to
 148    translate to the conventional PRU ISA format expected by GAS (r3.w0).
 149 */
 150
 151 #define FIXED_REGISTERS                         \
 152   {                                             \
 153 /*   0 */  0,0,0,0, 0,0,0,0, 1,1,1,1, 0,0,1,1,  \
 154 /*   4 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 155 /*   8 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 156 /*  12 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 157 /*  16 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 158 /*  20 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 159 /*  24 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 160 /*  28 */  0,0,0,0, 0,0,0,0, 1,1,1,1, 1,1,1,1,  \
 161 /*  32 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1   \
 162   }
 163
 164 /* Call used == caller saved + fixed regs + args + ret vals.  */
 165 #define CALL_USED_REGISTERS                     \
 166   {                                             \
 167 /*   0 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 168 /*   4 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 169 /*   8 */  0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0,  \
 170 /*  12 */  0,0,0,0, 0,0,0,0, 1,1,1,1, 1,1,1,1,  \
 171 /*  16 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 172 /*  20 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 173 /*  24 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 174 /*  28 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  \
 175 /*  32 */  1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1   \
 176   }
 177
 178 #define PRU_SEQ_R(X)  (X) * 4 + 0, (X) * 4 + 1, (X) * 4 + 2, (X) * 4 + 3
 179 #define PRU_SEQ_R_W0(X)  (X) * 4 + 0, (X) * 4 + 1
 180 #define PRU_SEQ_R_W2(X)  (X) * 4 + 2, (X) * 4 + 3
 181 #define REG_ALLOC_ORDER                                                     \
 182   {                                                                         \
 183     /* Call-clobbered, yet not used for parameters.  */                     \
 184     PRU_SEQ_R (0),  PRU_SEQ_R ( 1),                                         \
 185     PRU_SEQ_R_W0 (3),                                                       \
 186                                                                             \
 187     PRU_SEQ_R (14), PRU_SEQ_R (15), PRU_SEQ_R (16), PRU_SEQ_R (17),         \
 188     PRU_SEQ_R (18), PRU_SEQ_R (19), PRU_SEQ_R (20), PRU_SEQ_R (21),         \
 189     PRU_SEQ_R (22), PRU_SEQ_R (23), PRU_SEQ_R (24), PRU_SEQ_R (25),         \
 190     PRU_SEQ_R (26), PRU_SEQ_R (27), PRU_SEQ_R (28), PRU_SEQ_R (29),         \
 191                                                                             \
 192     PRU_SEQ_R ( 5), PRU_SEQ_R ( 6), PRU_SEQ_R ( 7), PRU_SEQ_R ( 8),         \
 193     PRU_SEQ_R ( 9), PRU_SEQ_R (10), PRU_SEQ_R (11), PRU_SEQ_R (12),         \
 194     PRU_SEQ_R (13),                                                         \
 195                                                                             \
 196     PRU_SEQ_R ( 4),                                                         \
 197     PRU_SEQ_R ( 2),                                                         \
 198     PRU_SEQ_R_W2 (3),                                                       \
 199                                                                             \
 200     /* I/O and virtual registers.  */                                       \
 201     PRU_SEQ_R (30), PRU_SEQ_R (31), PRU_SEQ_R (32), PRU_SEQ_R (33),         \
 202     PRU_SEQ_R (34), PRU_SEQ_R (35)                                          \
 203   }
 204
 205 /* Register Classes.  */
 206
 207 enum reg_class
 208 {
 209   NO_REGS,
 210   SIB_REGS,
 211   LOOPCNTR_REGS,
 212   MULDST_REGS,
 213   MULSRC0_REGS,
 214   MULSRC1_REGS,
 215   REGIO_REGS,
 216   GP_REGS,
 217   ALL_REGS,
 218   LIM_REG_CLASSES
 219 };
 220
 221 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 222
 223 #define REG_CLASS_NAMES   \
 224   {  "NO_REGS",           \
 225      "SIB_REGS",          \
 226      "LOOPCNTR_REGS",     \
 227      "MULDST_REGS",       \
 228      "MULSRC0_REGS",      \
 229      "MULSRC1_REGS",      \
 230      "REGIO_REGS",        \
 231      "GP_REGS",           \
 232      "ALL_REGS" }
 233
 234 #define GENERAL_REGS ALL_REGS
 235
 236 #define REG_CLASS_CONTENTS                                      \
 237   {                                                             \
 238     /* NO_REGS        */ { 0, 0, 0, 0, 0},                      \
 239     /* SIB_REGS       */ { 0xf, 0xff000000, ~0, 0xffffff, 0},   \
 240     /* LOOPCNTR_REGS  */ { 0, 0, 0, 0, 0xf},                    \
 241     /* MULDST_REGS    */ { 0, 0, 0, 0x00000f00, 0},             \
 242     /* MULSRC0_REGS   */ { 0, 0, 0, 0x000f0000, 0},             \
 243     /* MULSRC1_REGS   */ { 0, 0, 0, 0x00f00000, 0},             \
 244     /* REGIO_REGS     */ { 0, 0, 0, 0xff000000, 0},             \
 245     /* GP_REGS        */ { ~0, ~0, ~0, ~0, 0},                  \
 246     /* ALL_REGS       */ { ~0,~0, ~0, ~0, ~0}                   \
 247   }
 248
 249
 250 #define GP_REG_P(REGNO) ((unsigned)(REGNO) <= LAST_GP_REGNUM)
 251 #define REGNO_REG_CLASS(REGNO)                                              \
 252         ((REGNO) == MULDST_REGNUM ? MULDST_REGS                             \
 253          : (REGNO) == MULSRC0_REGNUM ? MULSRC0_REGS                         \
 254          : (REGNO) == MULSRC1_REGNUM ? MULSRC1_REGS                         \
 255          : (REGNO) == R30_REGNUM ? REGIO_REGS                               \
 256          : (REGNO) == R31_REGNUM ? REGIO_REGS                               \
 257          : (REGNO) >= FIRST_ARG_REGNUM                                      \
 258             && (REGNO) <= LAST_ARG_REGNUM ? SIB_REGS                        \
 259          : (REGNO) == STATIC_CHAIN_REGNUM ? SIB_REGS                        \
 260          : (REGNO) == LOOPCNTR_REGNUM ? LOOPCNTR_REGS                       \
 261          : (REGNO) <= LAST_NONIO_GP_REGNUM ? GP_REGS                        \
 262          : ALL_REGS)
 263
 264 #define CLASS_MAX_NREGS(CLASS, MODE) \
 265   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 266
 267 /* Arbitrarily set to a non-argument register.  Not defined by TI ABI.  */
 268 #define STATIC_CHAIN_REGNUM      0      /* r0 */
 269
 270 /* Tests for various kinds of constants used in the PRU port.  */
 271 #define SHIFT_INT(X) (IN_RANGE ((X), 0, 31))
 272
 273 #define UHWORD_INT(X) (IN_RANGE ((X), 0, 0xffff))
 274 #define SHWORD_INT(X) (IN_RANGE ((X), -32768, 32767))
 275 #define UBYTE_INT(X) (IN_RANGE ((X), 0, 0xff))
 276 #define SBYTE_INT(X) (IN_RANGE ((X), -128, 127))
 277
 278 /* Say that the epilogue uses the return address register.  Note that
 279    in the case of sibcalls, the values "used by the epilogue" are
 280    considered live at the start of the called function.  */
 281 #define EPILOGUE_USES(REGNO) (epilogue_completed                \
 282                               && (((REGNO) == RA_REGNUM)                \
 283                                   || (REGNO) == (RA_REGNUM + 1)))
 284
 285 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
 286    the stack pointer does not matter.  The value is tested only in
 287    functions that have frame pointers.
 288    No definition is equivalent to always zero.  */
 289
 290 #define EXIT_IGNORE_STACK 1
 291
 292 /* Trampolines are not supported, but put a define to keep the build.  */
 293 #define TRAMPOLINE_SIZE 4
 294
 295 /* Stack layout.  */
 296 #define STACK_GROWS_DOWNWARD  1
 297 #undef FRAME_GROWS_DOWNWARD
 298 #define FIRST_PARM_OFFSET(FUNDECL) 0
 299
 300 /* Before the prologue, RA lives in r3.w2.  */
 301 #define INCOMING_RETURN_ADDR_RTX        gen_rtx_REG (HImode, RA_REGNUM)
 302
 303 #define RETURN_ADDR_RTX(C,F) pru_get_return_address (C)
 304
 305 #define DWARF_FRAME_RETURN_COLUMN RA_REGNUM
 306
 307 /* The CFA includes the pretend args.  */
 308 #define ARG_POINTER_CFA_OFFSET(FNDECL) \
 309   (gcc_assert ((FNDECL) == current_function_decl), \
 310    FIRST_PARM_OFFSET (FNDECL) + crtl->args.pretend_args_size)
 311
 312 /* Frame/arg pointer elimination settings.  */
 313 #define ELIMINABLE_REGS                                                 \
 314 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \
 315  { ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},                    \
 316  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 317  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 318
 319 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 320   (OFFSET) = pru_initial_elimination_offset ((FROM), (TO))
 321
 322 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 323   pru_hard_regno_rename_ok (OLD_REG, NEW_REG)
 324
 325 /* Calling convention definitions.  */
 326 #if !defined(IN_LIBGCC2)
 327
 328 #define NUM_ARG_REGS (LAST_ARG_REGNUM - FIRST_ARG_REGNUM + 1)
 329
 330 typedef struct pru_args
 331 {
 332   bool regs_used[NUM_ARG_REGS];
 333 } CUMULATIVE_ARGS;
 334
 335 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS)  \
 336   do {                                                                    \
 337       memset ((CUM).regs_used, 0, sizeof ((CUM).regs_used));              \
 338   } while (0)
 339
 340 #define FUNCTION_ARG_REGNO_P(REGNO) \
 341   ((REGNO) >= FIRST_ARG_REGNUM && (REGNO) <= LAST_ARG_REGNUM)
 342
 343 /* Passing function arguments on stack.  */
 344 #define ACCUMULATE_OUTGOING_ARGS 1
 345
 346 /* We define TARGET_RETURN_IN_MEMORY, so set to zero.  */
 347 #define DEFAULT_PCC_STRUCT_RETURN 0
 348
 349 /* Profiling.  */
 350 #define PROFILE_BEFORE_PROLOGUE
 351 #define NO_PROFILE_COUNTERS 1
 352 #define FUNCTION_PROFILER(FILE, LABELNO) \
 353   pru_function_profiler ((FILE), (LABELNO))
 354
 355 #endif  /* IN_LIBGCC2 */
 356
 357 /* Addressing modes.  */
 358
 359 #define CONSTANT_ADDRESS_P(X) \
 360   (CONSTANT_P (X) && memory_address_p (SImode, X))
 361
 362 #define MAX_REGS_PER_ADDRESS 2
 363 #define BASE_REG_CLASS ALL_REGS
 364 #define INDEX_REG_CLASS ALL_REGS
 365
 366 #define REGNO_OK_FOR_BASE_P(REGNO) pru_regno_ok_for_base_p ((REGNO), true)
 367 #define REGNO_OK_FOR_INDEX_P(REGNO) pru_regno_ok_for_index_p ((REGNO), true)
 368
 369 /* Limited by the insns in pru-ldst-multiple.md.  */
 370 #define MOVE_MAX 8
 371 #define SLOW_BYTE_ACCESS 1
 372
 373 /* It is as good to call a constant function address as to call an address
 374    kept in a register.  */
 375 #define NO_FUNCTION_CSE 1
 376
 377 /* Define output assembler language.  */
 378
 379 #define ASM_APP_ON "#APP\n"
 380 #define ASM_APP_OFF "#NO_APP\n"
 381
 382 #define ASM_COMMENT_START "# "
 383
 384 #define GLOBAL_ASM_OP "\t.global\t"
 385
 386 #define PRU_NAME_R(X)  X".b0", X".b1", X".b2", X".b3"
 387 #define REGISTER_NAMES            \
 388   {                               \
 389     PRU_NAME_R ("r0"),            \
 390     PRU_NAME_R ("r1"),            \
 391     PRU_NAME_R ("r2"),            \
 392     PRU_NAME_R ("r3"),            \
 393     PRU_NAME_R ("r4"),            \
 394     PRU_NAME_R ("r5"),            \
 395     PRU_NAME_R ("r6"),            \
 396     PRU_NAME_R ("r7"),            \
 397     PRU_NAME_R ("r8"),            \
 398     PRU_NAME_R ("r9"),            \
 399     PRU_NAME_R ("r10"),           \
 400     PRU_NAME_R ("r11"),           \
 401     PRU_NAME_R ("r12"),           \
 402     PRU_NAME_R ("r13"),           \
 403     PRU_NAME_R ("r14"),           \
 404     PRU_NAME_R ("r15"),           \
 405     PRU_NAME_R ("r16"),           \
 406     PRU_NAME_R ("r17"),           \
 407     PRU_NAME_R ("r18"),           \
 408     PRU_NAME_R ("r19"),           \
 409     PRU_NAME_R ("r20"),           \
 410     PRU_NAME_R ("r21"),           \
 411     PRU_NAME_R ("r22"),           \
 412     PRU_NAME_R ("r23"),           \
 413     PRU_NAME_R ("r24"),           \
 414     PRU_NAME_R ("r25"),           \
 415     PRU_NAME_R ("r26"),           \
 416     PRU_NAME_R ("r27"),           \
 417     PRU_NAME_R ("r28"),           \
 418     PRU_NAME_R ("r29"),           \
 419     PRU_NAME_R ("r30"),           \
 420     PRU_NAME_R ("r31"),           \
 421     PRU_NAME_R ("loopcntr_reg"),  \
 422     PRU_NAME_R ("pc"),            \
 423     PRU_NAME_R ("fake_fp"),       \
 424     PRU_NAME_R ("fake_ap"),       \
 425 }
 426
 427 #define PRU_OVERLAP_R(X)              \
 428   { "r" #X      , X * 4     ,  4 },   \
 429   { "r" #X ".w0", X * 4 + 0 ,  2 },   \
 430   { "r" #X ".w1", X * 4 + 1 ,  2 },   \
 431   { "r" #X ".w2", X * 4 + 2 ,  2 }
 432
 433 #define OVERLAPPING_REGISTER_NAMES  \
 434   {                                 \
 435     /* Aliases.  */                 \
 436     { "sp", 2 * 4, 4 },             \
 437     { "ra", 3 * 4, 2 },             \
 438     { "fp", 4 * 4, 4 },             \
 439     PRU_OVERLAP_R (0),              \
 440     PRU_OVERLAP_R (1),              \
 441     PRU_OVERLAP_R (2),              \
 442     PRU_OVERLAP_R (3),              \
 443     PRU_OVERLAP_R (4),              \
 444     PRU_OVERLAP_R (5),              \
 445     PRU_OVERLAP_R (6),              \
 446     PRU_OVERLAP_R (7),              \
 447     PRU_OVERLAP_R (8),              \
 448     PRU_OVERLAP_R (9),              \
 449     PRU_OVERLAP_R (10),             \
 450     PRU_OVERLAP_R (11),             \
 451     PRU_OVERLAP_R (12),             \
 452     PRU_OVERLAP_R (13),             \
 453     PRU_OVERLAP_R (14),             \
 454     PRU_OVERLAP_R (15),             \
 455     PRU_OVERLAP_R (16),             \
 456     PRU_OVERLAP_R (17),             \
 457     PRU_OVERLAP_R (18),             \
 458     PRU_OVERLAP_R (19),             \
 459     PRU_OVERLAP_R (20),             \
 460     PRU_OVERLAP_R (21),             \
 461     PRU_OVERLAP_R (22),             \
 462     PRU_OVERLAP_R (23),             \
 463     PRU_OVERLAP_R (24),             \
 464     PRU_OVERLAP_R (25),             \
 465     PRU_OVERLAP_R (26),             \
 466     PRU_OVERLAP_R (27),             \
 467     PRU_OVERLAP_R (28),             \
 468     PRU_OVERLAP_R (29),             \
 469     PRU_OVERLAP_R (30),             \
 470     PRU_OVERLAP_R (31),             \
 471 }
 472
 473 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                                \
 474   do                                                                        \
 475     {                                                                       \
 476       fputs (integer_asm_op (POINTER_SIZE / BITS_PER_UNIT, TRUE), FILE);    \
 477       fprintf (FILE, "%%pmem(.L%u)\n", (unsigned) (VALUE));                 \
 478     }                                                                       \
 479   while (0)
 480
 481 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)                  \
 482   do                                                                        \
 483     {                                                                       \
 484       fputs (integer_asm_op (POINTER_SIZE / BITS_PER_UNIT, TRUE), STREAM);  \
 485       fprintf (STREAM, "%%pmem(.L%u-.L%u)\n", (unsigned) (VALUE),           \
 486                (unsigned) (REL));                                           \
 487     }                                                                       \
 488   while (0)
 489
 490 /* Section directives.  */
 491
 492 /* Output before read-only data.  */
 493 #define TEXT_SECTION_ASM_OP "\t.section\t.text"
 494
 495 /* Output before writable data.  */
 496 #define DATA_SECTION_ASM_OP "\t.section\t.data"
 497
 498 /* Output before uninitialized data.  */
 499 #define BSS_SECTION_ASM_OP "\t.section\t.bss"
 500
 501 #define CTORS_SECTION_ASM_OP "\t.section\t.init_array,\"aw\",%init_array"
 502 #define DTORS_SECTION_ASM_OP "\t.section\t.fini_array,\"aw\",%fini_array"
 503
 504 #undef INIT_SECTION_ASM_OP
 505 #undef FINI_SECTION_ASM_OP
 506 #define INIT_ARRAY_SECTION_ASM_OP CTORS_SECTION_ASM_OP
 507 #define FINI_ARRAY_SECTION_ASM_OP DTORS_SECTION_ASM_OP
 508
 509 /* Since we use .init_array/.fini_array we don't need the markers at
 510    the start and end of the ctors/dtors arrays.  */
 511 #define CTOR_LIST_BEGIN asm (CTORS_SECTION_ASM_OP)
 512 #define CTOR_LIST_END           /* empty */
 513 #define DTOR_LIST_BEGIN asm (DTORS_SECTION_ASM_OP)
 514 #define DTOR_LIST_END           /* empty */
 515
 516 #undef TARGET_ASM_CONSTRUCTOR
 517 #define TARGET_ASM_CONSTRUCTOR pru_elf_asm_constructor
 518
 519 #undef TARGET_ASM_DESTRUCTOR
 520 #define TARGET_ASM_DESTRUCTOR pru_elf_asm_destructor
 521
 522 #define ASM_OUTPUT_ALIGN(FILE, LOG)                   \
 523   do {                                                \
 524     fprintf ((FILE), "%s%d\n", ALIGN_ASM_OP, (LOG));  \
 525   } while (0)
 526
 527 #undef  ASM_OUTPUT_ALIGNED_COMMON
 528 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
 529 do                                                                      \
 530   {                                                                     \
 531     fprintf ((FILE), "%s", COMMON_ASM_OP);                              \
 532     assemble_name ((FILE), (NAME));                                     \
 533     fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED ",%u\n", (SIZE),  \
 534              (ALIGN) / BITS_PER_UNIT);                                  \
 535   }                                                                     \
 536 while (0)
 537
 538
 539 /* This says how to output assembler code to declare an
 540    uninitialized internal linkage data object.  Under SVR4,
 541    the linker seems to want the alignment of data objects
 542    to depend on their types.  We do exactly that here.  */
 543
 544 #undef  ASM_OUTPUT_ALIGNED_LOCAL
 545 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
 546 do {                                                                    \
 547   switch_to_section (bss_section);                                      \
 548   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 549   if (!flag_inhibit_size_directive)                                     \
 550     ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE);                       \
 551   ASM_OUTPUT_ALIGN ((FILE), exact_log2 ((ALIGN) / BITS_PER_UNIT));      \
 552   ASM_OUTPUT_LABEL (FILE, NAME);                                        \
 553   ASM_OUTPUT_SKIP ((FILE), (SIZE) ? (SIZE) : 1);                        \
 554 } while (0)
 555
 556 /* Misc parameters.  */
 557
 558 #define TARGET_SUPPORTS_WIDE_INT 1
 559
 560 #define STORE_FLAG_VALUE 1
 561 #define Pmode SImode
 562 #define FUNCTION_MODE Pmode
 563
 564 #define CASE_VECTOR_MODE Pmode
 565
 566 /* See definition of clz pattern for rationale of the value.  */
 567 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)  \
 568         ((VALUE) = GET_MODE_BITSIZE (MODE) - 1 - 32, 2)
 569
 570 /* Jumps are cheap on PRU.  */
 571 #define LOGICAL_OP_NON_SHORT_CIRCUIT            0
 572
 573 /* Unfortunately the LBBO instruction does not zero-extend data.  */
 574 #undef LOAD_EXTEND_OP
 575
 576 #undef WORD_REGISTER_OPERATIONS
 577
 578 #define HAS_LONG_UNCOND_BRANCH                  1
 579 #define HAS_LONG_COND_BRANCH                    1
 580
 581 #define REGISTER_TARGET_PRAGMAS() pru_register_pragmas ()
 582
 583 #endif /* GCC_PRU_H */