gcc/testsuite/gcc.dg/tree-ssa/pr32044.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2 -fdump-tree-optimized" } */
   3
   4 /* For powerpc, disable doloop IV cand generation in IVOPTs to avoid unexpected
   5    division operation for its base setup.  */
   6 /* { dg-additional-options "-fno-branch-count-reg" { target { powerpc*-*-* } } } */
   7
   8 int foo (int n)
   9 {
  10   while (n >= 45)
  11     n -= 45;
  12
  13   return n;
  14 }
  15
  16 int bar (int n)
  17 {
  18   while (n >= 64)
  19     n -= 64;
  20
  21   return n;
  22 }
  23
  24 int bla (int n)
  25 {
  26   int i = 0;
  27
  28   while (n >= 45)
  29     {
  30       i++;
  31       n -= 45;
  32     }
  33
  34   return i;
  35 }
  36
  37 int baz (int n)
  38 {
  39   int i = 0;
  40
  41   while (n >= 64)
  42     {
  43       i++;
  44       n -= 64;
  45     }
  46
  47   return i;
  48 }
  49
  50 /* The loops computing division/modulo by 64 should be eliminated */
  51 /* { dg-final { scan-tree-dump-times "if" 6 "optimized" } } */
  52
  53 /* There should be no division/modulo in the final dump (division and modulo
  54    by 64 are done using bit operations).  */
  55 /* { dg-final { scan-tree-dump-times " / " 0 "optimized" } } */
  56 /* { dg-final { scan-tree-dump-times " % " 0 "optimized" } } */
  57