1 /* { dg-require-effective-target vect_simd_clones } */
2 /* { dg-additional-options "-fopenmp-simd --param vect-epilogues-nomask=0" } */
3 /* { dg-additional-options "-mavx" { target avx_runtime } } */
5 /* Test that simd inbranch clones work correctly. */
11 /* A simple function that will be cloned. */
12 #pragma omp declare simd inbranch
13 TYPE
__attribute__((noinline
))
19 /* Check that "inbranch" clones are called correctly. */
21 void __attribute__((noipa
))
22 masked (TYPE
* __restrict a
, TYPE
* __restrict b
, int size
)
25 for (int i
= 0; i
< size
; i
++)
29 /* Check that "inbranch" works when there might be unrolling. */
31 void __attribute__((noipa
))
32 masked_fixed (TYPE
* __restrict a
, TYPE
* __restrict b
)
35 for (int i
= 0; i
< 128; i
++)
39 /* Validate the outputs. */
42 check_masked (TYPE
*b
, int size
)
44 for (int i
= 0; i
< size
; i
++)
45 if (b
[i
] != (TYPE
)(i
+ 1))
47 __builtin_printf ("error at %d\n", i
);
58 for (int i
= 0; i
< 1024; i
++)
62 check_masked (b
, 128);
64 /* Test various sizes to cover machines with different vectorization
66 for (int size
= 8; size
<= 1024; size
*= 2)
69 check_masked (b
, size
);
72 /* Test sizes that might exercise the partial vector code-path. */
73 for (int size
= 8; size
<= 1024; size
*= 2)
75 masked (a
, b
, size
-4);
76 check_masked (b
, size
-4);
82 /* Ensure the the in-branch simd clones are used on targets that support them. */
83 /* { dg-final { scan-tree-dump-times {[\n\r] [^\n]* = foo\.simdclone} 2 "vect" { target { aarch64*-*-* } } } } */
84 /* { dg-final { scan-tree-dump-times {[\n\r] [^\n]* = foo\.simdclone} 4 "vect" { target { x86_64*-*-* } } } } */
86 /* The LTO test produces two dump files and we scan the wrong one. */
87 /* { dg-skip-if "" { *-*-* } { "-flto" } { "" } } */