1 /* Copyright (C
) 2012-2025 Free Software Foundation
, Inc.
2 Contributed by ARM Ltd.
4 This file is part of GCC.
6 GCC is free software
; you can redistribute it and
/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation
; either version
3, or (at your option
)
11 GCC is distributed in the hope that it will be useful
, but
12 WITHOUT ANY WARRANTY
; without even the implied warranty of
13 MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC
; see the file COPYING3. If not see
18 <http
://www.gnu.org
/licenses
/>.
*/
20 /* This is a list of ISA extensions in AArch64.
22 Before using #include to read this file
, define one of the following
25 AARCH64_OPT_EXTENSION(NAME
, IDENT
, REQUIRES
, EXPLICIT_ON
,
26 EXPLICIT_OFF
, FEATURE_STRING
)
28 AARCH64_FMV_FEATURE(NAME
, FEAT_NAME
, IDENT
)
30 - NAME is the name of the extension
, represented as a string constant.
32 - IDENT is the canonical internal name for this flag.
34 - FEAT_NAME is the unprefixed name used in the CPUFeatures enum.
36 - REQUIRES is a list of features that must be enabled whenever this
37 feature is enabled. The relationship is implicitly transitive
:
38 if A appears in B
's REQUIRES and B appears in C's REQUIRES then
39 A and B must be enabled whenever C is. Thus
, turning on C also
40 turns on A and B
, while turning off A or B also turns off C.
42 - EXPLICIT_ON is a list of features that are enabled by an explicit
43 +NAME specification
, in addition to those listed in REQUIRES.
44 Usually this is an empty list
; comments below explain the exceptions.
45 The list is implicitly transitively closed wrt
REQUIRES (but
*not
*
46 to EXPLICIT_ON
, since NAME is the only thing explicit in
+NAME
).
47 Thus if A is in B
's REQUIRES and B is in C's EXPLICIT_ON
, +C will
48 enable both B and A. B
's EXPLICIT_ON has no effect on +C.
50 - EXPLICIT_OFF is a list of features that are disabled by an explicit
51 +noNAME specification, in addition to the features that are transitively
52 dependent on NAME (according to REQUIRES). As with EXPLICIT_ON,
53 this is usually an empty list; comments below explain the exceptions.
54 If a feature A appears in this list then the list implicitly includes
55 any features that are transitively dependent on A (according to REQUIRES).
57 - FEATURE_STRING is a string containing the entries in the 'Features
' field
58 of /proc/cpuinfo on a GNU/Linux system that correspond to this
59 architecture extension being available. Sometimes multiple entries are
60 needed to enable the extension (for example, the 'crypto
' extension
61 depends on four entries: aes, pmull, sha1, sha2 being present). In that
62 case this field should contain a space (" ") separated list of the strings
63 in 'Features
' that are required. Their order is not important. An empty
64 string means do not detect this feature during auto detection.
66 - OPT_FLAGS is a list of feature IDENTS that should be enabled (along with
67 their transitive dependencies) when the specified FMV feature is present.
69 Where a feature is present as both an extension and a function
70 multiversioning feature, and IDENT matches the FEAT_NAME suffix, then these
71 can be listed here simultaneously using the macro:
73 AARCH64_OPT_FMV_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON,
74 EXPLICIT_OFF, FEATURE_STRING)
76 The list of features extensions must follow topological order wrt REQUIRES
77 and EXPLICIT_ON. For example, if A is in B's REQUIRES list
, A must come
78 before B. This is enforced by aarch64
-feature
-deps.h.
80 The list of multiversioning features must be ordered by increasing priority
,
81 as defined in https
://github.com
/ARM
-software
/acle
/blob
/main
/main
/acle.md
83 NOTE
: Any changes to the AARCH64_OPT_EXTENSION macro need to be mirrored in
86 #ifndef AARCH64_OPT_EXTENSION
87 #define
AARCH64_OPT_EXTENSION(NAME
, IDENT
, REQUIRES
, EXPLICIT_ON
, \
88 EXPLICIT_OFF
, FEATURE_STRING
)
91 #ifndef AARCH64_FMV_FEATURE
92 #define
AARCH64_FMV_FEATURE(NAME
, FEAT_NAME
, OPT_FLAGS
)
95 #define
AARCH64_OPT_FMV_EXTENSION(NAME
, IDENT
, REQUIRES
, EXPLICIT_ON
, \
96 EXPLICIT_OFF
, FEATURE_STRING
) \
97 AARCH64_OPT_EXTENSION(NAME
, IDENT
, REQUIRES
, EXPLICIT_ON
, EXPLICIT_OFF
, \
99 AARCH64_FMV_FEATURE(NAME
, IDENT
, (IDENT
))
102 AARCH64_OPT_FMV_EXTENSION("rng", RNG
, (), (), (), "rng")
104 AARCH64_OPT_FMV_EXTENSION("flagm", FLAGM
, (), (), (), "flagm")
106 AARCH64_OPT_FMV_EXTENSION("flagm2", FLAGM2
, (FLAGM
), (), (), "flagm2")
108 AARCH64_OPT_FMV_EXTENSION("lse", LSE
, (), (), (), "atomics")
110 AARCH64_OPT_FMV_EXTENSION("fp", FP
, (), (), (), "fp")
112 AARCH64_OPT_FMV_EXTENSION("simd", SIMD
, (FP
), (), (), "asimd")
114 AARCH64_OPT_FMV_EXTENSION("dotprod", DOTPROD
, (SIMD
), (), (), "asimddp")
116 AARCH64_OPT_FMV_EXTENSION("sm4", SM4
, (SIMD
), (), (), "sm3 sm4")
118 /* An explicit
+rdma implies
+simd
, but
+rdma
+nosimd still enables scalar
119 RDMA instructions.
*/
120 AARCH64_OPT_FMV_EXTENSION("rdma", RDMA
, (), (SIMD
), (), "asimdrdm")
122 /* rdm is an alias for rdma.
*/
123 AARCH64_FMV_FEATURE("rdm", RDM
, (RDMA
))
125 AARCH64_OPT_FMV_EXTENSION("crc", CRC
, (), (), (), "crc32")
127 AARCH64_OPT_FMV_EXTENSION("sha2", SHA2
, (SIMD
), (), (), "sha1 sha2")
129 AARCH64_FMV_FEATURE("sha3", SHA3
, (SHA3
))
131 AARCH64_OPT_FMV_EXTENSION("aes", AES
, (SIMD
), (), (), "aes")
133 /* +nocrypto disables AES
, SHA2 and SM4
, and anything that depends on them
134 (such as SHA3 and the SVE2 crypto extensions
).
*/
135 AARCH64_OPT_EXTENSION("crypto", CRYPTO
, (AES
, SHA2
), (), (AES
, SHA2
, SM4
),
136 "aes pmull sha1 sha2")
138 /* Listing sha3 after crypto means we pass
"+aes+sha3" to the assembler
139 instead of
"+sha3+crypto".
*/
140 AARCH64_OPT_EXTENSION("sha3", SHA3
, (SHA2
), (), (), "sha3 sha512")
142 /* +nofp16 disables an implicit F16FML
, even though an implicit F16FML
143 does not imply F16. See F16FML for more details.
*/
144 AARCH64_OPT_EXTENSION("fp16", F16
, (FP
), (), (F16FML
), "fphp asimdhp")
146 AARCH64_FMV_FEATURE("fp16", FP16
, (F16
))
148 /* An explicit
+fp16fml implies
+fp16
, but a dependence on it does not.
149 Thus
-march
=armv8.4
-a implies F16FML but not F16.
-march
=armv8.4
-a
+fp16
150 and
-march
=armv8.4
-a
+fp16fml are equivalent and enable both F16FML and F16.
151 -march
=armv8.4
-a
+nofp16
+fp16 enables F16 but not F16FML.
*/
152 AARCH64_OPT_EXTENSION("fp16fml", F16FML
, (), (F16
), (), "asimdfhm")
154 AARCH64_FMV_FEATURE("fp16fml", FP16FML
, (F16FML
))
156 AARCH64_OPT_FMV_EXTENSION("jscvt", JSCVT
, (FP
), (), (), "jscvt")
158 AARCH64_OPT_FMV_EXTENSION("fcma", FCMA
, (SIMD
), (), (), "fcma")
160 AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC
, (), (), (), "lrcpc")
162 AARCH64_OPT_FMV_EXTENSION("rcpc2", RCPC2
, (RCPC
), (), (), "ilrcpc")
164 AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3
, (RCPC2
), (), (), "lrcpc3")
166 AARCH64_OPT_FMV_EXTENSION("frintts", FRINTTS
, (FP
), (), (), "frint")
168 AARCH64_OPT_FMV_EXTENSION("i8mm", I8MM
, (SIMD
), (), (), "i8mm")
170 /* An explicit
+bf16 implies
+simd
, but
+bf16
+nosimd still enables scalar BF16
172 AARCH64_OPT_FMV_EXTENSION("bf16", BF16
, (FP
), (SIMD
), (), "bf16")
174 AARCH64_FMV_FEATURE("rpres", RPRES
, ())
176 AARCH64_OPT_FMV_EXTENSION("sve", SVE
, (SIMD
, F16
, FCMA
), (), (), "sve")
178 /* This specifically does not imply
+sve.
*/
179 AARCH64_OPT_EXTENSION("sve-b16b16", SVE_B16B16
, (), (), (), "sveb16b16")
181 AARCH64_OPT_EXTENSION("f32mm", F32MM
, (SVE
), (), (), "svef32mm")
183 AARCH64_FMV_FEATURE("f32mm", SVE_F32MM
, (F32MM
))
185 AARCH64_OPT_EXTENSION("f64mm", F64MM
, (SVE
), (), (), "svef64mm")
187 AARCH64_FMV_FEATURE("f64mm", SVE_F64MM
, (F64MM
))
189 AARCH64_OPT_FMV_EXTENSION("sve2", SVE2
, (SVE
), (), (), "sve2")
191 AARCH64_OPT_EXTENSION("sve2-aes", SVE2_AES
, (SVE2
, AES
), (), (), "sveaes")
193 AARCH64_FMV_FEATURE("sve2-aes", SVE_AES
, (SVE2_AES
))
195 AARCH64_OPT_EXTENSION("sve2-bitperm", SVE2_BITPERM
, (SVE2
), (), (),
198 AARCH64_FMV_FEATURE("sve2-bitperm", SVE_BITPERM
, (SVE2_BITPERM
))
200 AARCH64_OPT_EXTENSION("sve2-sha3", SVE2_SHA3
, (SVE2
, SHA3
), (), (), "svesha3")
202 AARCH64_FMV_FEATURE("sve2-sha3", SVE_SHA3
, (SVE2_SHA3
))
204 AARCH64_OPT_EXTENSION("sve2-sm4", SVE2_SM4
, (SVE2
, SM4
), (), (), "svesm4")
206 AARCH64_FMV_FEATURE("sve2-sm4", SVE_SM4
, (SVE2_SM4
))
208 AARCH64_OPT_EXTENSION("sve2p1", SVE2p1
, (SVE2
), (), (), "sve2p1")
210 AARCH64_OPT_FMV_EXTENSION("sme", SME
, (BF16
, SVE2
), (), (), "sme")
212 AARCH64_OPT_EXTENSION("memtag", MEMTAG
, (), (), (), "")
214 AARCH64_OPT_FMV_EXTENSION("sb", SB
, (), (), (), "sb")
216 AARCH64_OPT_FMV_EXTENSION("predres", PREDRES
, (), (), (), "")
218 AARCH64_OPT_EXTENSION("ssbs", SSBS
, (), (), (), "ssbs")
220 AARCH64_OPT_EXTENSION("profile", PROFILE
, (), (), (), "")
222 AARCH64_OPT_EXTENSION("tme", TME
, (), (), (), "")
224 AARCH64_OPT_EXTENSION("pauth", PAUTH
, (), (), (), "paca pacg")
226 AARCH64_OPT_EXTENSION("ls64", LS64
, (), (), (), "")
228 AARCH64_OPT_FMV_EXTENSION("wfxt", WFXT
, (), (), (), "wfxt")
230 AARCH64_OPT_EXTENSION("xs", XS
, (), (), (), "")
232 AARCH64_OPT_EXTENSION("sme-f64f64", SME_F64F64
, (SME
), (), (), "smef64f64")
234 AARCH64_FMV_FEATURE("sme-f64f64", SME_F64
, (SME_F64F64
))
236 AARCH64_OPT_EXTENSION("sme-i16i64", SME_I16I64
, (SME
), (), (), "smei16i64")
238 AARCH64_FMV_FEATURE("sme-i16i64", SME_I64
, (SME_I16I64
))
240 AARCH64_OPT_FMV_EXTENSION("sme2", SME2
, (SME
), (), (), "sme2")
242 AARCH64_OPT_EXTENSION("sme2p1", SME2p1
, (SME2
), (), (), "sme2p1")
244 AARCH64_OPT_EXTENSION("sme-b16b16", SME_B16B16
, (SME2
, SVE_B16B16
), (), (), "smeb16b16")
246 AARCH64_OPT_EXTENSION("sme-f16f16", SME_F16F16
, (SME2
), (), (), "smef16f16")
248 AARCH64_OPT_EXTENSION("mops", MOPS
, (), (), (), "mops")
250 AARCH64_OPT_EXTENSION("cssc", CSSC
, (), (), (), "cssc")
252 AARCH64_OPT_EXTENSION("lse128", LSE128
, (LSE
), (), (), "lse128")
254 AARCH64_OPT_EXTENSION("d128", D128
, (LSE128
), (), (), "d128")
256 AARCH64_OPT_EXTENSION("the", THE
, (), (), (), "the")
258 AARCH64_OPT_EXTENSION("gcs", GCS
, (), (), (), "gcs")
260 AARCH64_OPT_EXTENSION("fp8", FP8
, (SIMD
), (), (), "f8cvt")
262 AARCH64_OPT_EXTENSION("fp8fma", FP8FMA
, (FP8
), (), (), "f8fma")
264 AARCH64_OPT_EXTENSION("ssve-fp8fma", SSVE_FP8FMA
, (SME2
,FP8
), (), (), "smesf8fma")
266 AARCH64_OPT_EXTENSION("faminmax", FAMINMAX
, (SIMD
), (), (), "faminmax")
268 AARCH64_OPT_EXTENSION("fp8dot4", FP8DOT4
, (FP8FMA
), (), (), "f8dp4")
270 AARCH64_OPT_EXTENSION("ssve-fp8dot4", SSVE_FP8DOT4
, (SSVE_FP8FMA
), (), (), "smesf8dp4")
272 AARCH64_OPT_EXTENSION("fp8dot2", FP8DOT2
, (FP8DOT4
), (), (), "f8dp2")
274 AARCH64_OPT_EXTENSION("ssve-fp8dot2", SSVE_FP8DOT2
, (SSVE_FP8DOT4
), (), (), "smesf8dp2")
276 AARCH64_OPT_EXTENSION("lut", LUT
, (SIMD
), (), (), "lut")
278 AARCH64_OPT_EXTENSION("cpa", CPA
, (), (), (), "")
280 #undef AARCH64_OPT_FMV_EXTENSION
281 #undef AARCH64_OPT_EXTENSION
282 #undef AARCH64_FMV_FEATURE