1 /* Declarations for determining resolver for a given builtin.
2 Copyright (C) 2020-2025 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published
8 by the Free Software Foundation; either version 3, or (at your
9 option) any later version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 Under Section 7 of GPL version 3, you are granted additional
17 permissions described in the GCC Runtime Library Exception, version
18 3.1, as published by the Free Software Foundation.
20 You should have received a copy of the GNU General Public License and
21 a copy of the GCC Runtime Library Exception along with this program;
22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
23 <http://www.gnu.org/licenses/>. */
25 #ifndef GCC_ARM_BUILTINS_H
26 #define GCC_ARM_BUILTINS_H
33 enum resolver_ident
arm_describe_resolver (tree
);
34 unsigned arm_cde_end_args (tree
);
36 #define ENTRY(E, M, Q, S, T, G) E,
39 #include "arm-simd-builtin-types.def"
44 enum arm_type_qualifiers
49 qualifier_unsigned
= 0x1, /* 1 << 0 */
51 qualifier_const
= 0x2, /* 1 << 1 */
53 qualifier_pointer
= 0x4, /* 1 << 2 */
55 qualifier_const_pointer
= 0x6,
56 /* Used when expanding arguments if an operand could
58 qualifier_immediate
= 0x8, /* 1 << 3 */
59 qualifier_unsigned_immediate
= 0x9,
60 qualifier_maybe_immediate
= 0x10, /* 1 << 4 */
62 qualifier_void
= 0x20, /* 1 << 5 */
63 /* Some patterns may have internal operands, this qualifier is an
64 instruction to the initialisation code to skip this operand. */
65 qualifier_internal
= 0x40, /* 1 << 6 */
66 /* Some builtins should use the T_*mode* encoded in a simd_builtin_datum
67 rather than using the type of the operand. */
68 qualifier_map_mode
= 0x80, /* 1 << 7 */
69 /* qualifier_pointer | qualifier_map_mode */
70 qualifier_pointer_map_mode
= 0x84,
71 /* qualifier_const_pointer | qualifier_map_mode */
72 qualifier_const_pointer_map_mode
= 0x86,
73 /* Polynomial types. */
74 qualifier_poly
= 0x100,
75 /* Lane indices - must be within range of previous argument = a vector. */
76 qualifier_lane_index
= 0x200,
77 /* Lane indices for single lane structure loads and stores. */
78 qualifier_struct_load_store_lane_index
= 0x400,
80 qualifier_void_pointer
= 0x800,
81 /* A const void pointer. */
82 qualifier_const_void_pointer
= 0x802,
83 /* Lane indices selected in pairs - must be within range of previous
84 argument = a vector. */
85 qualifier_lane_pair_index
= 0x1000,
86 /* Lane indices selected in quadtuplets - must be within range of previous
87 argument = a vector. */
88 qualifier_lane_quadtup_index
= 0x2000,
89 /* MVE vector predicates. */
90 qualifier_predicate
= 0x4000
93 struct arm_simd_type_info
95 enum arm_simd_type type
;
97 /* Internal type name. */
100 /* Internal type name(mangled). The mangled names conform to the
101 AAPCS (see "Procedure Call Standard for the ARM Architecture",
102 Appendix A). To qualify for emission with the mangled names defined in
103 that document, a vector type must not only be of the correct mode but also
104 be of the correct internal Neon vector type (e.g. __simd64_int8_t);
105 these types are registered by arm_init_simd_builtin_types (). In other
106 words, vector types defined in other ways e.g. via vector_size attribute
107 will get default mangled names. */
116 /* Machine mode the internal type maps to. */
120 enum arm_type_qualifiers q
;
123 extern struct arm_simd_type_info arm_simd_types
[];
125 #endif /* GCC_ARM_BUILTINS_H */