1 /* Definitions of target machine for GNU compiler
, for ARM.
2 Copyright (C
) 2002-2025 Free Software Foundation
, Inc.
3 Contributed by Pieter `Tiggr
' Schoenmakers (rcpieter@win.tue.nl)
4 and Martin Simmons (@harleqn.co.uk).
5 More major hacks by Richard Earnshaw (rearnsha@arm.com)
6 Minor hacks by Nick Clifton (nickc@cygnus.com)
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify it
11 under the terms of the GNU General Public License as published
12 by the Free Software Foundation; either version 3, or (at your
13 option) any later version.
15 GCC is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
25 /* Half-precision floating point */
26 FLOAT_MODE (HF, 2, 0);
27 ADJUST_FLOAT_FORMAT (HF, ((arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE)
28 ? &arm_half_format : &ieee_half_format));
30 /* CCFPEmode should be used with floating inequalities,
31 CCFPmode should be used with floating equalities.
32 CC_NZmode should be used if only the N and Z bits are set correctly.
33 CC_Zmode should be used if only the Z flag is set correctly
34 CC_Cmode should be used if only the C flag is set correctly, after an
36 CC_Nmode should be used if only the N (sign) flag is set correctly
37 CC_NVmode should be used if only the N and V bits are set correctly,
38 (used for signed comparisons when the carry is propagated in).
39 CC_RSBmode should be used where the comparison is set by an RSB immediate,
40 or NEG instruction. The form of the comparison for (const - reg) will
41 be (COMPARE (not (reg)) (~const)).
42 CC_Bmode should be used if only the C flag is correct after a subtract
43 (eg after an unsigned borrow with carry-in propagation).
44 (used for DImode signed comparisons).
45 CC_ADCmode is used when the carry is formed from the output of ADC for an
46 addtion. In this case we cannot use the trick of comparing the sum
47 against one of the other operands.
48 CCmode should be used otherwise. */
74 VECTOR_MODES (INT, 4); /* V4QI V2HI */
75 VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
76 VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */
77 VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */
78 VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */
79 VECTOR_MODE (FLOAT, HF, 2); /* V2HF */
81 FLOAT_MODE (BF, 2, 0);
82 ADJUST_FLOAT_FORMAT (BF, &arm_bfloat_half_format);
83 VECTOR_MODE (FLOAT, BF, 2); /* V2BF. */
84 VECTOR_MODE (FLOAT, BF, 4); /* V4BF. */
85 VECTOR_MODE (FLOAT, BF, 8); /* V8BF. */
87 /* Predicates for MVE. */
88 BOOL_MODE (B2I, 2, 1);
89 BOOL_MODE (B4I, 4, 1);
91 VECTOR_BOOL_MODE (V16BI, 16, BI, 2);
92 VECTOR_BOOL_MODE (V8BI, 8, B2I, 2);
93 VECTOR_BOOL_MODE (V4BI, 4, B4I, 2);
94 VECTOR_MODE (INT, QI, 2);
96 /* Fraction and accumulator vector modes. */
97 VECTOR_MODES (FRACT, 4); /* V4QQ V2HQ */
98 VECTOR_MODES (UFRACT, 4); /* V4UQQ V2UHQ */
99 VECTOR_MODES (ACCUM, 4); /* V2HA */
100 VECTOR_MODES (UACCUM, 4); /* V2UHA */
102 /* Opaque integer modes for 3, 4, 6 or 8 Neon double registers (2 is
109 /* Define MVE modes for structures of 2 and 4 q-registers. */
110 #define MVE_STRUCT_MODES(NVECS, VB, VH, VS, VD) \
111 VECTOR_MODES_WITH_PREFIX (V##NVECS##x, INT, 16, 3); \
112 VECTOR_MODES_WITH_PREFIX (V##NVECS##x, FLOAT, 16, 3); \
114 ADJUST_NUNITS (VB##QI, NVECS * 16); \
115 ADJUST_NUNITS (VH##HI, NVECS * 8); \
116 ADJUST_NUNITS (VS##SI, NVECS * 4); \
117 ADJUST_NUNITS (VD##DI, NVECS * 2); \
118 ADJUST_NUNITS (VH##HF, NVECS * 8); \
119 ADJUST_NUNITS (VS##SF, NVECS * 4); \
121 ADJUST_ALIGNMENT (VB##QI, 16); \
122 ADJUST_ALIGNMENT (VH##HI, 16); \
123 ADJUST_ALIGNMENT (VS##SI, 16); \
124 ADJUST_ALIGNMENT (VD##DI, 16); \
125 ADJUST_ALIGNMENT (VH##HF, 16); \
126 ADJUST_ALIGNMENT (VS##SF, 16);
128 MVE_STRUCT_MODES (2, V2x16, V2x8, V2x4, V2x2)
129 MVE_STRUCT_MODES (4, V4x16, V4x8, V4x4, V4x2)