gcc/config/arm/arm-protos.h

   1 /* Prototypes for exported functions defined in arm.cc and pe.c
   2    Copyright (C) 1999-2025 Free Software Foundation, Inc.
   3    Contributed by Richard Earnshaw (rearnsha@arm.com)
   4    Minor hacks by Nick Clifton (nickc@cygnus.com)
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    GCC is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 #ifndef GCC_ARM_PROTOS_H
  23 #define GCC_ARM_PROTOS_H
  24
  25 #include "sbitmap.h"
  26 #include "tree.h" /* For ERROR_MARK.  */
  27
  28 rtl_opt_pass *make_pass_insert_bti (gcc::context *ctxt);
  29
  30 extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *);
  31 extern int use_return_insn (int, rtx);
  32 extern bool use_simple_return_p (void);
  33 extern enum reg_class arm_regno_class (int);
  34 extern bool arm_check_builtin_call (location_t, vec<location_t>, tree, tree,
  35                                     unsigned int, tree *, bool);
  36 extern void arm_load_pic_register (unsigned long, rtx);
  37 extern int arm_volatile_func (void);
  38 extern void arm_expand_prologue (void);
  39 extern void arm_expand_epilogue (bool);
  40 extern void arm_declare_function_name (FILE *, const char *, tree);
  41 extern void arm_asm_declare_function_name (FILE *, const char *, tree);
  42 extern void thumb2_expand_return (bool);
  43 extern const char *arm_strip_name_encoding (const char *);
  44 extern void arm_asm_output_labelref (FILE *, const char *);
  45 extern void thumb2_asm_output_opcode (FILE *);
  46 extern unsigned long arm_current_func_type (void);
  47 extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
  48                                                              unsigned int);
  49 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
  50                                                                unsigned int);
  51 extern unsigned int arm_debugger_regno (unsigned int);
  52 extern void arm_output_fn_unwind (FILE *, bool);
  53
  54 extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget
  55                                ATTRIBUTE_UNUSED, machine_mode mode
  56                                ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED);
  57 extern tree arm_builtin_decl (unsigned code, bool initialize_p
  58                               ATTRIBUTE_UNUSED);
  59 extern void arm_init_builtins (void);
  60 extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update);
  61 extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
  62 extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
  63                                                  bool high);
  64 extern void arm_emit_speculation_barrier_function (void);
  65 extern void arm_decompose_di_binop (rtx, rtx, rtx *, rtx *, rtx *, rtx *);
  66 extern bool arm_q_bit_access (void);
  67 extern bool arm_ge_bits_access (void);
  68 extern bool arm_target_bb_ok_for_lob (basic_block);
  69 extern int arm_attempt_dlstp_transform (rtx);
  70 #ifdef RTX_CODE
  71 enum reg_class
  72 arm_mode_base_reg_class (machine_mode);
  73 extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
  74                                       rtx label_ref);
  75 extern bool arm_vector_mode_supported_p (machine_mode);
  76 extern bool arm_small_register_classes_for_mode_p (machine_mode);
  77 extern int const_ok_for_arm (HOST_WIDE_INT);
  78 extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
  79 extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
  80 extern void thumb1_gen_const_int_rtl (rtx, HOST_WIDE_INT);
  81 extern void thumb1_gen_const_int_print (rtx, HOST_WIDE_INT);
  82 extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
  83                                HOST_WIDE_INT, rtx, rtx, int);
  84 extern int legitimate_pic_operand_p (rtx);
  85 extern rtx legitimize_pic_address (rtx, machine_mode, rtx, rtx, bool);
  86 extern rtx legitimize_tls_address (rtx, rtx);
  87 extern bool arm_legitimate_address_p (machine_mode, rtx, bool,
  88                                       code_helper = ERROR_MARK);
  89 extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
  90 extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
  91 extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
  92 extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
  93                                  bool, bool);
  94 extern bool clear_operation_p (rtx, bool);
  95 extern int arm_const_double_rtx (rtx);
  96 extern int vfp3_const_double_rtx (rtx);
  97 extern int simd_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
  98 extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
  99                                            int *);
 100 extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
 101                                            int *, bool);
 102 extern char *neon_output_logic_immediate (const char *, rtx *,
 103                                           machine_mode, int, int);
 104 extern char *neon_output_shift_immediate (const char *, char, rtx *,
 105                                           machine_mode, int, bool);
 106 extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
 107                                   rtx (*) (rtx, rtx, rtx));
 108 extern rtx mve_bool_vec_to_const (rtx const_vec);
 109 extern rtx neon_make_constant (rtx, bool generate = true);
 110 extern void neon_expand_vector_init (rtx, rtx);
 111 extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
 112 extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
 113 extern HOST_WIDE_INT neon_element_bits (machine_mode);
 114 extern void neon_emit_pair_result_insn (machine_mode,
 115                                         rtx (*) (rtx, rtx, rtx, rtx),
 116                                         rtx, rtx, rtx);
 117 extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
 118 extern void neon_split_vcombine (rtx op[3]);
 119 extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx,
 120                                                      bool);
 121 extern bool arm_tls_referenced_p (rtx);
 122
 123 extern int arm_coproc_mem_operand (rtx, bool);
 124 extern int arm_coproc_mem_operand_no_writeback (rtx);
 125 extern int arm_coproc_mem_operand_wb (rtx, int);
 126 extern int neon_vector_mem_operand (rtx, int, bool);
 127 extern int mve_vector_mem_operand (machine_mode, rtx, bool);
 128 extern int neon_struct_mem_operand (rtx);
 129 extern int mve_struct_mem_operand (rtx);
 130
 131 extern rtx *neon_vcmla_lane_prepare_operands (rtx *);
 132
 133 extern int tls_mentioned_p (rtx);
 134 extern int symbol_mentioned_p (rtx);
 135 extern int label_mentioned_p (rtx);
 136 extern RTX_CODE minmax_code (rtx);
 137 extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
 138 extern int adjacent_mem_locations (rtx, rtx);
 139 extern bool gen_ldm_seq (rtx *, int, bool);
 140 extern bool gen_stm_seq (rtx *, int);
 141 extern bool gen_const_stm_seq (rtx *, int);
 142 extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
 143 extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
 144 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
 145 extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
 146 extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
 147 extern bool valid_operands_ldrd_strd (rtx *, bool);
 148 extern int arm_gen_cpymemqi (rtx *);
 149 extern bool gen_cpymem_ldrd_strd (rtx *);
 150 extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
 151 extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
 152                                                        HOST_WIDE_INT);
 153 extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
 154 extern rtx arm_gen_return_addr_mask (void);
 155 extern void arm_reload_in_hi (rtx *);
 156 extern void arm_reload_out_hi (rtx *);
 157 extern int arm_max_const_double_inline_cost (void);
 158 extern int arm_const_double_inline_cost (rtx);
 159 extern bool arm_const_double_by_parts (rtx);
 160 extern bool arm_const_double_by_immediates (rtx);
 161 extern rtx arm_load_function_descriptor (rtx funcdesc);
 162 extern void arm_emit_call_insn (rtx, rtx, bool);
 163 bool detect_cmse_nonsecure_call (tree);
 164 extern const char *output_call (rtx *);
 165 void arm_emit_movpair (rtx, rtx);
 166 extern const char *output_mov_long_double_arm_from_arm (rtx *);
 167 extern const char *output_move_double (rtx *, bool, int *count);
 168 extern const char *output_move_quad (rtx *);
 169 extern int arm_count_output_move_double_insns (rtx *);
 170 extern int arm_count_ldrdstrd_insns (rtx *, bool);
 171 extern const char *output_move_vfp (rtx *operands);
 172 extern const char *output_move_neon (rtx *operands);
 173 extern int arm_attr_length_move_neon (rtx_insn *);
 174 extern int arm_address_offset_is_imm (rtx_insn *);
 175 extern const char *output_add_immediate (rtx *);
 176 extern const char *arithmetic_instr (rtx, int);
 177 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
 178 extern const char *output_return_instruction (rtx, bool, bool, bool);
 179 extern const char *output_probe_stack_range (rtx, rtx);
 180 extern void arm_poke_function_name (FILE *, const char *);
 181 extern void arm_final_prescan_insn (rtx_insn *);
 182 extern int arm_debugger_arg_offset (int, rtx);
 183 extern bool arm_is_long_call_p (tree);
 184 extern int    arm_emit_vector_const (FILE *, rtx);
 185 extern void arm_emit_fp16_const (rtx c);
 186 extern const char * arm_output_load_gr (rtx *);
 187 extern const char * arm_output_load_tpidr (rtx, bool);
 188 extern const char *vfp_output_vstmd (rtx *);
 189 extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
 190 extern void arm_set_return_address (rtx, rtx);
 191 extern int arm_eliminable_register (rtx);
 192 extern const char *arm_output_shift(rtx *, int);
 193 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool);
 194 extern const char *arm_output_iwmmxt_tinsr (rtx *);
 195 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
 196 extern int arm_attr_length_push_multi(rtx, rtx);
 197 extern int arm_attr_length_pop_multi(rtx *, bool, bool);
 198 extern void arm_expand_compare_and_swap (rtx op[]);
 199 extern void arm_split_compare_and_swap (rtx op[]);
 200 extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
 201 extern rtx arm_load_tp (rtx);
 202 extern bool arm_coproc_builtin_available (enum unspecv);
 203 extern bool arm_coproc_ldc_stc_legitimate_address (rtx);
 204 extern rtx arm_stack_protect_tls_canary_mem (bool);
 205 extern bool arm_ldrd_legitimate_address (rtx);
 206
 207
 208 #if defined TREE_CODE
 209 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
 210 extern bool arm_pad_reg_upward (machine_mode, tree, int);
 211 #endif
 212 extern int arm_apply_result_size (void);
 213 extern opt_machine_mode arm_get_mask_mode (machine_mode mode);
 214 extern bool arm_noce_conversion_profitable_p (rtx_insn *,struct noce_if_info *);
 215
 216 #endif /* RTX_CODE */
 217
 218 /* It's convenient to divide the built-in function codes into groups,
 219    rather than having everything in a single enum.  This type enumerates
 220    those groups.  */
 221 enum arm_builtin_class
 222 {
 223   ARM_BUILTIN_GENERAL,
 224   ARM_BUILTIN_MVE
 225 };
 226
 227 /* Built-in function codes are structured so that the low
 228    ARM_BUILTIN_SHIFT bits contain the arm_builtin_class
 229    and the upper bits contain a group-specific subcode.  */
 230 const unsigned int ARM_BUILTIN_SHIFT = 1;
 231
 232 /* Mask that selects the arm part of a function code.  */
 233 const unsigned int ARM_BUILTIN_CLASS = (1 << ARM_BUILTIN_SHIFT) - 1;
 234
 235 /* MVE functions.  */
 236 namespace arm_mve {
 237   void handle_arm_mve_types_h ();
 238   void handle_arm_mve_h (bool);
 239   tree builtin_decl (unsigned);
 240   tree resolve_overloaded_builtin (location_t, unsigned int,
 241                                    vec<tree, va_gc> *);
 242   bool check_builtin_call (location_t, vec<location_t>, unsigned int,
 243                            tree, unsigned int, tree *);
 244   gimple *gimple_fold_builtin (unsigned int code, gcall *stmt);
 245   rtx expand_builtin (unsigned int, tree, rtx);
 246 }
 247
 248 /* Thumb functions.  */
 249 extern void arm_init_expanders (void);
 250 extern const char *thumb1_unexpanded_epilogue (void);
 251 extern void thumb1_expand_prologue (void);
 252 extern void thumb1_expand_epilogue (void);
 253 extern const char *thumb1_output_interwork (void);
 254 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
 255 #ifdef RTX_CODE
 256 extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
 257 extern void thumb1_final_prescan_insn (rtx_insn *);
 258 extern void thumb2_final_prescan_insn (rtx_insn *);
 259 extern const char *thumb_load_double_from_address (rtx *);
 260 extern const char *thumb_output_move_mem_multiple (int, rtx *);
 261 extern const char *thumb_call_via_reg (rtx);
 262 extern void thumb_expand_cpymemqi (rtx *);
 263 extern rtx arm_return_addr (int, rtx);
 264 extern void thumb_reload_out_hi (rtx *);
 265 extern void thumb_set_return_address (rtx, rtx);
 266 extern const char *arm_output_casesi (rtx *);
 267 extern const char *thumb1_output_casesi (rtx *);
 268 extern const char *thumb2_output_casesi (rtx *);
 269 #endif
 270
 271 extern bool arm_change_mode_p (tree);
 272
 273 extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
 274                                              struct gcc_options *);
 275 extern void arm_configure_build_target (struct arm_build_target *,
 276                                         struct cl_target_option *, bool);
 277 extern void arm_option_reconfigure_globals (void);
 278 extern void arm_options_perform_arch_sanity_checks (void);
 279 extern void arm_pr_long_calls (struct cpp_reader *);
 280 extern void arm_pr_no_long_calls (struct cpp_reader *);
 281 extern void arm_pr_long_calls_off (struct cpp_reader *);
 282
 283 extern const char *arm_mangle_type (const_tree);
 284 extern const char *arm_mangle_builtin_type (const_tree);
 285
 286 extern void arm_order_regs_for_local_alloc (void);
 287
 288 extern int arm_max_conditional_execute ();
 289
 290 /* Vectorizer cost model implementation.  */
 291 struct cpu_vec_costs {
 292   const int scalar_stmt_cost;   /* Cost of any scalar operation, excluding
 293                                    load and store.  */
 294   const int scalar_load_cost;   /* Cost of scalar load.  */
 295   const int scalar_store_cost;  /* Cost of scalar store.  */
 296   const int vec_stmt_cost;      /* Cost of any vector operation, excluding
 297                                    load, store, vector-to-scalar and
 298                                    scalar-to-vector operation.  */
 299   const int vec_to_scalar_cost;    /* Cost of vect-to-scalar operation.  */
 300   const int scalar_to_vec_cost;    /* Cost of scalar-to-vector operation.  */
 301   const int vec_align_load_cost;   /* Cost of aligned vector load.  */
 302   const int vec_unalign_load_cost; /* Cost of unaligned vector load.  */
 303   const int vec_unalign_store_cost; /* Cost of unaligned vector load.  */
 304   const int vec_store_cost;        /* Cost of vector store.  */
 305   const int cond_taken_branch_cost;    /* Cost of taken branch for vectorizer
 306                                           cost model.  */
 307   const int cond_not_taken_branch_cost;/* Cost of not taken branch for
 308                                           vectorizer cost model.  */
 309 };
 310
 311 #ifdef RTX_CODE
 312 /* This needs to be here because we need RTX_CODE and similar.  */
 313
 314 struct cpu_cost_table;
 315
 316 /* Addressing mode operations.  Used to index tables in struct
 317    addr_mode_cost_table.  */
 318 enum arm_addr_mode_op
 319 {
 320    AMO_DEFAULT,
 321    AMO_NO_WB,   /* Offset with no writeback.  */
 322    AMO_WB,      /* Offset with writeback.  */
 323    AMO_MAX      /* For array size.  */
 324 };
 325
 326 /* Table of additional costs in units of COSTS_N_INSNS() when using
 327    addressing modes for each access type.  */
 328 struct addr_mode_cost_table
 329 {
 330    const int integer[AMO_MAX];
 331    const int fp[AMO_MAX];
 332    const int vector[AMO_MAX];
 333 };
 334
 335 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
 336    structure is modified.  */
 337
 338 struct tune_params
 339 {
 340   const struct cpu_cost_table *insn_extra_cost;
 341   const struct addr_mode_cost_table *addr_mode_costs;
 342   bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
 343   int (*branch_cost) (bool, bool);
 344   /* Vectorizer costs.  */
 345   const struct cpu_vec_costs* vec_costs;
 346   int constant_limit;
 347   /* Maximum number of instructions to conditionalise.  */
 348   int max_insns_skipped;
 349   /* Maximum number of instructions to inline calls to memset.  */
 350   int max_insns_inline_memset;
 351   /* Issue rate of the processor.  */
 352   unsigned int issue_rate;
 353   /* Explicit prefetch data.  */
 354   struct
 355     {
 356       int num_slots;
 357       int l1_cache_size;
 358       int l1_cache_line_size;
 359     } prefetch;
 360   enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
 361     prefer_constant_pool: 1;
 362   /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM.  */
 363   enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
 364   /* The preference for non short cirtcuit operation when optimizing for
 365      performance. The first element covers Thumb state and the second one
 366      is for ARM state.  */
 367   enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
 368                                  LOG_OP_NON_SHORT_CIRCUIT_TRUE};
 369   log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
 370   log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
 371   /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding.  */
 372   enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
 373     disparage_flag_setting_t16_encodings: 2;
 374   /* Prefer to inline string operations like memset by using Neon.  */
 375   enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
 376     string_ops_prefer_neon: 1;
 377   /* Bitfield encoding the fusible pairs of instructions.  Use FUSE_OPS
 378      in an initializer if multiple fusion operations are supported on a
 379      target.  */
 380   enum fuse_ops
 381   {
 382     FUSE_NOTHING   = 0,
 383     FUSE_MOVW_MOVT = 1 << 0,
 384     FUSE_AES_AESMC = 1 << 1
 385   } fusible_ops: 2;
 386   /* Depth of scheduling queue to check for L2 autoprefetcher.  */
 387   enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
 388     sched_autopref: 2;
 389 };
 390
 391 /* Smash multiple fusion operations into a type that can be used for an
 392    initializer.  */
 393 #define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
 394
 395 extern const struct tune_params *current_tune;
 396 extern int vfp3_const_double_for_fract_bits (rtx);
 397 /* return power of two from operand, otherwise 0.  */
 398 extern int vfp3_const_double_for_bits (rtx);
 399
 400 extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
 401                                            rtx);
 402 extern bool arm_fusion_enabled_p (tune_params::fuse_ops);
 403 extern bool arm_current_function_pac_enabled_p (void);
 404 extern bool arm_valid_symbolic_address_p (rtx);
 405 extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
 406 extern bool arm_expand_vector_compare (rtx, rtx_code, rtx, rtx, bool);
 407 #endif /* RTX_CODE */
 408
 409 extern bool arm_gen_setmem (rtx *);
 410 extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
 411
 412 extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
 413
 414 extern void arm_emit_eabi_attribute (const char *, int, int);
 415
 416 extern void arm_reset_previous_fndecl (void);
 417 extern void save_restore_target_globals (tree);
 418
 419 /* Defined in gcc/common/config/arm-common.cc.  */
 420 extern const char *arm_rewrite_selected_cpu (const char *name);
 421
 422 /* Defined in gcc/common/config/arm-c.cc.  */
 423 extern void arm_lang_object_attributes_init (void);
 424 extern void arm_register_target_pragmas (void);
 425 extern void arm_cpu_cpp_builtins (struct cpp_reader *);
 426
 427 extern bool arm_is_constant_pool_ref (rtx);
 428
 429 /* The bits in this mask specify which instruction scheduling options should
 430    be used.  */
 431 extern unsigned int tune_flags;
 432
 433 /* Nonzero if this chip supports the ARM Architecture 4 extensions.  */
 434 extern int arm_arch4;
 435
 436 /* Nonzero if this chip supports the ARM Architecture 4t extensions.  */
 437 extern int arm_arch4t;
 438
 439 /* Nonzero if this chip supports the ARM Architecture 5t extensions.  */
 440 extern int arm_arch5t;
 441
 442 /* Nonzero if this chip supports the ARM Architecture 5te extensions.  */
 443 extern int arm_arch5te;
 444
 445 /* Nonzero if this chip supports the ARM Architecture 6 extensions.  */
 446 extern int arm_arch6;
 447
 448 /* Nonzero if this chip supports the ARM 6K extensions.  */
 449 extern int arm_arch6k;
 450
 451 /* Nonzero if this chip supports the ARM 6KZ extensions.  */
 452 extern int arm_arch6kz;
 453
 454 /* Nonzero if instructions present in ARMv6-M can be used.  */
 455 extern int arm_arch6m;
 456
 457 /* Nonzero if this chip supports the ARM 7 extensions.  */
 458 extern int arm_arch7;
 459
 460 /* Nonzero if this chip supports the Large Physical Address Extension.  */
 461 extern int arm_arch_lpae;
 462
 463 /* Nonzero if instructions not present in the 'M' profile can be used.  */
 464 extern int arm_arch_notm;
 465
 466 /* Nonzero if instructions present in ARMv7E-M can be used.  */
 467 extern int arm_arch7em;
 468
 469 /* Nonzero if instructions present in ARMv8 can be used.  */
 470 extern int arm_arch8;
 471
 472 /* Nonzero if this chip can benefit from load scheduling.  */
 473 extern int arm_ld_sched;
 474
 475 /* Nonzero if this chip is a StrongARM.  */
 476 extern int arm_tune_strongarm;
 477
 478 /* Nonzero if this chip supports Intel Wireless MMX technology.  */
 479 extern int arm_arch_iwmmxt;
 480
 481 /* Nonzero if this chip supports Intel Wireless MMX2 technology.  */
 482 extern int arm_arch_iwmmxt2;
 483
 484 /* Nonzero if this chip is an XScale.  */
 485 extern int arm_arch_xscale;
 486
 487 /* Nonzero if tuning for XScale  */
 488 extern int arm_tune_xscale;
 489
 490 /* Nonzero if we want to tune for stores that access the write-buffer.
 491    This typically means an ARM6 or ARM7 with MMU or MPU.  */
 492 extern int arm_tune_wbuf;
 493
 494 /* Nonzero if tuning for Cortex-A9.  */
 495 extern int arm_tune_cortex_a9;
 496
 497 /* Nonzero if we should define __THUMB_INTERWORK__ in the
 498    preprocessor.
 499    XXX This is a bit of a hack, it's intended to help work around
 500    problems in GLD which doesn't understand that armv5t code is
 501    interworking clean.  */
 502 extern int arm_cpp_interwork;
 503
 504 /* Nonzero if chip supports Thumb 1.  */
 505 extern int arm_arch_thumb1;
 506
 507 /* Nonzero if chip supports Thumb 2.  */
 508 extern int arm_arch_thumb2;
 509
 510 /* Nonzero if chip supports integer division instruction.  */
 511 extern int arm_arch_arm_hwdiv;
 512 extern int arm_arch_thumb_hwdiv;
 513
 514 /* Nonzero if chip disallows volatile memory access in IT block.  */
 515 extern int arm_arch_no_volatile_ce;
 516
 517 /* Structure defining the current overall architectural target and tuning.  */
 518 struct arm_build_target
 519 {
 520   /* Name of the target CPU, if known, or NULL if the target CPU was not
 521      specified by the user (and inferred from the -march option).  */
 522   const char *core_name;
 523   /* Name of the target ARCH.  NULL if there is a selected CPU.  */
 524   const char *arch_name;
 525   /* Preprocessor substring (never NULL).  */
 526   const char *arch_pp_name;
 527   /* The base architecture value.  */
 528   enum base_architecture base_arch;
 529   /* The profile letter for the architecture, upper case by convention.  */
 530   char profile;
 531   /* Bitmap encapsulating the isa_bits for the target environment.  */
 532   sbitmap isa;
 533   /* Flags used for tuning.  Long term, these move into tune_params.  */
 534   unsigned int tune_flags;
 535   /* Tables with more detailed tuning information.  */
 536   const struct tune_params *tune;
 537   /* CPU identifier for the tuning target.  */
 538   enum processor_type tune_core;
 539 };
 540
 541 extern struct arm_build_target arm_active_target;
 542
 543 /* Table entry for a CPU alias.  */
 544 struct cpu_alias
 545 {
 546   /* The alias name.  */
 547   const char *const name;
 548   /* True if the name should be displayed in help text listing cpu names.  */
 549   bool visible;
 550 };
 551
 552 /* Table entry for an architectural feature extension.  */
 553 struct cpu_arch_extension
 554 {
 555   /* Feature name.  */
 556   const char *const name;
 557   /* True if the option is negative (removes extensions).  */
 558   bool remove;
 559   /* True if the option is an alias for another option with identical effect;
 560      the option will be ignored for canonicalization.  */
 561   bool alias;
 562   /* The modifier bits.  */
 563   const enum isa_feature isa_bits[isa_num_bits];
 564 };
 565
 566 /* Common elements of both CPU and architectural options.  */
 567 struct cpu_arch_option
 568 {
 569   /* Name for this option.  */
 570   const char *name;
 571   /* List of feature extensions permitted.  */
 572   const struct cpu_arch_extension *extensions;
 573   /* Standard feature bits.  */
 574   enum isa_feature isa_bits[isa_num_bits];
 575 };
 576
 577 /* Table entry for an architecture entry.  */
 578 struct arch_option
 579 {
 580   /* Common option fields.  */
 581   cpu_arch_option common;
 582   /* Short string for this architecture.  */
 583   const char *arch;
 584   /* Base architecture, from which this specific architecture is derived.  */
 585   enum base_architecture base_arch;
 586   /* The profile letter for the architecture, upper case by convention.  */
 587   const char profile;
 588   /* Default tune target (in the absence of any more specific data).  */
 589   enum processor_type tune_id;
 590 };
 591
 592 /* Table entry for a CPU entry.  */
 593 struct cpu_option
 594 {
 595   /* Common option fields.  */
 596   cpu_arch_option common;
 597   /* List of aliases for this CPU.  */
 598   const struct cpu_alias *aliases;
 599   /* Architecture upon which this CPU is based.  */
 600   enum arch_type arch;
 601 };
 602
 603 extern const arch_option all_architectures[];
 604 extern const cpu_option all_cores[];
 605
 606
 607 const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *,
 608                                              const char *, bool = true);
 609 const arch_option *arm_parse_arch_option_name (const arch_option *,
 610                                                const char *, const char *, bool = true);
 611 void arm_parse_option_features (sbitmap, const cpu_arch_option *,
 612                                 const char *);
 613
 614 void arm_initialize_isa (sbitmap, const enum isa_feature *);
 615
 616 const char * arm_gen_far_branch (rtx *, int, const char * , const char *);
 617
 618 bool arm_mve_immediate_check(rtx, machine_mode, bool);
 619
 620 opt_machine_mode arm_mve_data_mode (scalar_mode, poly_uint64);
 621
 622 #endif /* ! GCC_ARM_PROTOS_H */