| blob | b72c87126a2925c40156d7ba8a843cc3b497814f |
1 ;; Instruction Classification for ARM for GNU compiler.
3 ;; Copyright (C) 1991-2025 Free Software Foundation, Inc.
4 ;; Contributed by ARM Ltd.
6 ;; This file is part of GCC.
8 ;; GCC is free software; you can redistribute it and/or modify it
9 ;; under the terms of the GNU General Public License as published
10 ;; by the Free Software Foundation; either version 3, or (at your
11 ;; option) any later version.
13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ;; License for more details.
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING3. If not see
20 ;; <http://www.gnu.org/licenses/>.
22 ; The insn need to autodetect for specific type attribute
23 (define_attr "autodetect_type"
24 "none,
25 alu_shift_lsl_op2,
26 alu_shift_lsr_op2,
27 alu_shift_asr_op2,
28 alu_shift_mul_op3,
29 alu_shift_operator1,
30 alu_shift_operator2,
31 alu_shift_operator3,
32 alu_shift_operator4"
33 (const_string "none"))
35 ; TYPE attribute is used to classify instructions for use in scheduling.
36 ;
37 ; Instruction classification:
38 ;
39 ; adc_imm add/subtract with carry and with an immediate operand.
40 ; adc_reg add/subtract with carry and no immediate operand.
41 ; adcs_imm as adc_imm, setting condition flags.
42 ; adcs_reg as adc_reg, setting condition flags.
43 ; adr calculate address.
44 ; alu_ext From ARMv8-A: any arithmetic instruction that has a
45 ; sign/zero-extended.
46 ; AArch64 Only.
47 ; source operand
48 ; alu_imm any arithmetic instruction that doesn't have a shifted
49 ; operand and has an immediate operand. This
50 ; excludes MOV, MVN and RSB(S) immediate.
51 ; alu_sreg any arithmetic instruction that doesn't have a shifted
52 ; or an immediate operand. This excludes
53 ; MOV and MVN but includes MOVT. This also excludes
54 ; DSP-kind instructions. This is also the default.
55 ; alu_shift_imm_lsl_1to4
56 ; any arithmetic instruction that has a source operand
57 ; shifted left by a constant in range 1 to 4. This
58 ; excludes simple shifts.
59 ; alu_shift_imm_other
60 ; as alu_shift_imm_lsl_1to4, with the shift type is LSR or
61 ; ASR, or the shift amount is greater than or equal 5.
62 ; alu_shift_reg as alu_shift_imm_*, with the shift amount specified in a
63 ; register.
64 ; alu_dsp_reg any DSP-kind instruction like QSUB8.
65 ; alus_ext From ARMv8-A: as alu_ext, setting condition flags.
66 ; AArch64 Only.
67 ; alus_imm as alu_imm, setting condition flags.
68 ; alus_sreg as alu_sreg, setting condition flags.
69 ; alus_shift_imm as alu_shift_imm_*, setting condition flags.
70 ; alus_shift_reg as alu_shift_reg, setting condition flags.
71 ; bfm bitfield move operation.
72 ; bfx bitfield extract operation.
73 ; block blockage insn, this blocks all functional units.
74 ; branch branch.
75 ; call subroutine call.
76 ; clz count leading zeros (CLZ).
77 ; csel From ARMv8-A: conditional select.
78 ; extend extend instruction (SXTB, SXTH, UXTB, UXTH).
79 ; f_cvt conversion between float representations.
80 ; f_cvtf2i conversion between float and integral types.
81 ; f_cvti2f conversion between integral and float types.
82 ; f_flag transfer of co-processor flags to the CPSR.
83 ; f_load[d,s] double/single load from memory. Used for VFP unit.
84 ; f_mcr transfer arm to vfp reg.
85 ; f_mcrr transfer two arm regs to vfp reg.
86 ; f_minmax[d,s] double/single floating point minimum/maximum.
87 ; f_mrc transfer vfp to arm reg.
88 ; f_mrrc transfer vfp to two arm regs.
89 ; f_rint[d,s] double/single floating point rount to integral.
90 ; f_store[d,s] double/single store to memory. Used for VFP unit.
91 ; fadd[d,s] double/single floating-point scalar addition.
92 ; fccmp[d,s] From ARMv8-A: floating-point conditional compare.
93 ; fcmp[d,s] double/single floating-point compare.
94 ; fconst[d,s] double/single load immediate.
95 ; fcsel From ARMv8-A: Floating-point conditional select.
96 ; fdiv[d,s] double/single precision floating point division.
97 ; ffarith[d,s] double/single floating point abs/neg/cpy.
98 ; ffma[d,s] double/single floating point fused multiply-accumulate.
99 ; float floating point arithmetic operation.
100 ; fmac[d,s] double/single floating point multiply-accumulate.
101 ; fmov floating point to floating point register move.
102 ; fmul[d,s] double/single floating point multiply.
103 ; fsqrt[d,s] double/single precision floating point square root.
104 ; load_acq load-acquire.
105 ; load_byte load 1 byte from memory.
106 ; load_4 load 4 bytes from memory.
107 ; load_8 load 8 bytes from memory.
108 ; load_12 load 12 bytes from memory.
109 ; load_16 load 16 bytes from memory.
110 ; logic_imm any logical instruction that doesn't have a shifted
111 ; operand and has an immediate operand.
112 ; logic_reg any logical instruction that doesn't have a shifted
113 ; operand or an immediate operand.
114 ; logic_shift_imm any logical instruction that has a source operand
115 ; shifted by a constant. This excludes simple shifts.
116 ; logic_shift_reg as logic_shift_imm, with the shift amount specified in a
117 ; register.
118 ; logics_imm as logic_imm, setting condition flags.
119 ; logics_reg as logic_reg, setting condition flags.
120 ; logics_shift_imm as logic_shift_imm, setting condition flags.
121 ; logics_shift_reg as logic_shift_reg, setting condition flags.
122 ; mla integer multiply accumulate.
123 ; mlas integer multiply accumulate, flag setting.
124 ; mov_imm simple MOV instruction that moves an immediate to
125 ; register. This includes MOVW, but not MOVT.
126 ; mov_reg simple MOV instruction that moves a register to another
127 ; register. This includes MOVW, but not MOVT.
128 ; mov_shift simple MOV instruction, shifted operand by a constant.
129 ; mov_shift_reg simple MOV instruction, shifted operand by a register.
130 ; mrs system/special/co-processor register move.
131 ; mul integer multiply.
132 ; muls integer multiply, flag setting.
133 ; multiple more than one instruction, candidate for future
134 ; splitting, or better modeling.
135 ; mvn_imm inverting move instruction, immediate.
136 ; mvn_reg inverting move instruction, register.
137 ; mvn_shift inverting move instruction, shifted operand by a constant.
138 ; mvn_shift_reg inverting move instruction, shifted operand by a register.
139 ; no_insn an insn which does not represent an instruction in the
140 ; final output, thus having no impact on scheduling.
141 ; rbit reverse bits.
142 ; rev reverse bytes.
143 ; rotate_imm rotate by immediate.
144 ; sdiv signed division.
145 ; shift_imm simple shift operation (LSL, LSR, ASR, ROR) with an
146 ; immediate.
147 ; shift_reg simple shift by a register.
148 ; smlad signed multiply accumulate dual.
149 ; smladx signed multiply accumulate dual reverse.
150 ; smlal signed multiply accumulate long.
151 ; smlald signed multiply accumulate long dual.
152 ; smlals signed multiply accumulate long, flag setting.
153 ; smlalxy signed multiply accumulate, 16x16-bit, 64-bit accumulate.
154 ; smlawx signed multiply accumulate, 32x16-bit, 32-bit accumulate.
155 ; smlawy signed multiply accumulate wide, 32x16-bit,
156 ; 32-bit accumulate.
157 ; smlaxy signed multiply accumulate, 16x16-bit, 32-bit accumulate.
158 ; smlsd signed multiply subtract dual.
159 ; smlsdx signed multiply subtract dual reverse.
160 ; smlsld signed multiply subtract long dual.
161 ; smmla signed most significant word multiply accumulate.
162 ; smmul signed most significant word multiply.
163 ; smmulr signed most significant word multiply, rounded.
164 ; smuad signed dual multiply add.
165 ; smuadx signed dual multiply add reverse.
166 ; smull signed multiply long.
167 ; smulls signed multiply long, flag setting.
168 ; smulwy signed multiply wide, 32x16-bit, 32-bit accumulate.
169 ; smulxy signed multiply, 16x16-bit, 32-bit accumulate.
170 ; smusd signed dual multiply subtract.
171 ; smusdx signed dual multiply subtract reverse.
172 ; store_rel store-release.
173 ; store_4 store 4 bytes to memory.
174 ; store_8 store 8 bytes to memory.
175 ; store_12 store 12 bytes to memory.
176 ; store_16 store 16 bytes (or more) to memory.
177 ; trap cause a trap in the kernel.
178 ; udiv unsigned division.
179 ; umaal unsigned multiply accumulate accumulate long.
180 ; umlal unsigned multiply accumulate long.
181 ; umlals unsigned multiply accumulate long, flag setting.
182 ; umull unsigned multiply long.
183 ; umulls unsigned multiply long, flag setting.
184 ; untyped insn without type information - default, and error,
185 ; case.
186 ;
187 ; The classification below is for instructions used by the Wireless MMX
188 ; Technology. Each attribute value is used to classify an instruction of the
189 ; same name or family.
190 ;
191 ; wmmx_tandc
192 ; wmmx_tbcst
193 ; wmmx_textrc
194 ; wmmx_textrm
195 ; wmmx_tinsr
196 ; wmmx_tmcr
197 ; wmmx_tmcrr
198 ; wmmx_tmia
199 ; wmmx_tmiaph
200 ; wmmx_tmiaxy
201 ; wmmx_tmrc
202 ; wmmx_tmrrc
203 ; wmmx_tmovmsk
204 ; wmmx_torc
205 ; wmmx_torvsc
206 ; wmmx_wabs
207 ; wmmx_wdiff
208 ; wmmx_wacc
209 ; wmmx_wadd
210 ; wmmx_waddbhus
211 ; wmmx_waddsubhx
212 ; wmmx_waligni
213 ; wmmx_walignr
214 ; wmmx_wand
215 ; wmmx_wandn
216 ; wmmx_wavg2
217 ; wmmx_wavg4
218 ; wmmx_wcmpeq
219 ; wmmx_wcmpgt
220 ; wmmx_wmac
221 ; wmmx_wmadd
222 ; wmmx_wmax
223 ; wmmx_wmerge
224 ; wmmx_wmiawxy
225 ; wmmx_wmiaxy
226 ; wmmx_wmin
227 ; wmmx_wmov
228 ; wmmx_wmul
229 ; wmmx_wmulw
230 ; wmmx_wldr
231 ; wmmx_wor
232 ; wmmx_wpack
233 ; wmmx_wqmiaxy
234 ; wmmx_wqmulm
235 ; wmmx_wqmulwm
236 ; wmmx_wror
237 ; wmmx_wsad
238 ; wmmx_wshufh
239 ; wmmx_wsll
240 ; wmmx_wsra
241 ; wmmx_wsrl
242 ; wmmx_wstr
243 ; wmmx_wsub
244 ; wmmx_wsubaddhx
245 ; wmmx_wunpckeh
246 ; wmmx_wunpckel
247 ; wmmx_wunpckih
248 ; wmmx_wunpckil
249 ; wmmx_wxor
250 ;
251 ; The classification below is for NEON instructions. If a new neon type is
252 ; added, please ensure this is added to the is_neon_type attribute below too.
253 ;
254 ; neon_add
255 ; neon_add_q
256 ; neon_add_widen
257 ; neon_add_long
258 ; neon_qadd
259 ; neon_qadd_q
260 ; neon_add_halve
261 ; neon_add_halve_q
262 ; neon_add_halve_narrow_q
263 ; neon_sub
264 ; neon_sub_q
265 ; neon_sub_widen
266 ; neon_sub_long
267 ; neon_qsub
268 ; neon_qsub_q
269 ; neon_sub_halve
270 ; neon_sub_halve_q
271 ; neon_sub_halve_narrow_q
272 ; neon_abs
273 ; neon_abs_q
274 ; neon_neg
275 ; neon_neg_q
276 ; neon_qneg
277 ; neon_qneg_q
278 ; neon_qabs
279 ; neon_qabs_q
280 ; neon_abd
281 ; neon_abd_q
282 ; neon_abd_long
283 ; neon_minmax
284 ; neon_minmax_q
285 ; neon_compare
286 ; neon_compare_q
287 ; neon_compare_zero
288 ; neon_compare_zero_q
289 ; neon_arith_acc
290 ; neon_arith_acc_q
291 ; neon_reduc_add
292 ; neon_reduc_add_q
293 ; neon_reduc_add_long
294 ; neon_reduc_add_acc
295 ; neon_reduc_add_acc_q
296 ; neon_reduc_minmax
297 ; neon_reduc_minmax_q
298 ; neon_logic
299 ; neon_logic_q
300 ; neon_tst
301 ; neon_tst_q
302 ; neon_shift_imm
303 ; neon_shift_imm_q
304 ; neon_shift_imm_narrow_q
305 ; neon_shift_imm_long
306 ; neon_shift_reg
307 ; neon_shift_reg_q
308 ; neon_shift_acc
309 ; neon_shift_acc_q
310 ; neon_sat_shift_imm
311 ; neon_sat_shift_imm_q
312 ; neon_sat_shift_imm_narrow_q
313 ; neon_sat_shift_reg
314 ; neon_sat_shift_reg_q
315 ; neon_ins
316 ; neon_ins_q
317 ; neon_move
318 ; neon_move_q
319 ; neon_move_narrow_q
320 ; neon_permute
321 ; neon_permute_q
322 ; neon_zip
323 ; neon_zip_q
324 ; neon_tbl1
325 ; neon_tbl1_q
326 ; neon_tbl2
327 ; neon_tbl2_q
328 ; neon_tbl3
329 ; neon_tbl3_q
330 ; neon_tbl4
331 ; neon_tbl4_q
332 ; neon_bsl
333 ; neon_bsl_q
334 ; neon_cls
335 ; neon_cls_q
336 ; neon_cnt
337 ; neon_cnt_q
338 ; neon_dot
339 ; neon_dot_q
340 ; neon_ext
341 ; neon_ext_q
342 ; neon_rbit
343 ; neon_rbit_q
344 ; neon_rev
345 ; neon_rev_q
346 ; neon_mul_b
347 ; neon_mul_b_q
348 ; neon_mul_h
349 ; neon_mul_h_q
350 ; neon_mul_s
351 ; neon_mul_s_q
352 ; neon_mul_b_long
353 ; neon_mul_h_long
354 ; neon_mul_s_long
355 ; neon_mul_d_long
356 ; neon_mul_h_scalar
357 ; neon_mul_h_scalar_q
358 ; neon_mul_s_scalar
359 ; neon_mul_s_scalar_q
360 ; neon_mul_h_scalar_long
361 ; neon_mul_s_scalar_long
362 ; neon_sat_mul_b
363 ; neon_sat_mul_b_q
364 ; neon_sat_mul_h
365 ; neon_sat_mul_h_q
366 ; neon_sat_mul_s
367 ; neon_sat_mul_s_q
368 ; neon_sat_mul_b_long
369 ; neon_sat_mul_h_long
370 ; neon_sat_mul_s_long
371 ; neon_sat_mul_h_scalar
372 ; neon_sat_mul_h_scalar_q
373 ; neon_sat_mul_s_scalar
374 ; neon_sat_mul_s_scalar_q
375 ; neon_sat_mul_h_scalar_long
376 ; neon_sat_mul_s_scalar_long
377 ; neon_mla_b
378 ; neon_mla_b_q
379 ; neon_mla_h
380 ; neon_mla_h_q
381 ; neon_mla_s
382 ; neon_mla_s_q
383 ; neon_mla_b_long
384 ; neon_mla_h_long
385 ; neon_mla_s_long
386 ; neon_mla_h_scalar
387 ; neon_mla_h_scalar_q
388 ; neon_mla_s_scalar
389 ; neon_mla_s_scalar_q
390 ; neon_mla_h_scalar_long
391 ; neon_mla_s_scalar_long
392 ; neon_sat_mla_b_long
393 ; neon_sat_mla_h_long
394 ; neon_sat_mla_s_long
395 ; neon_sat_mla_h_scalar_long
396 ; neon_sat_mla_s_scalar_long
397 ; neon_to_gp
398 ; neon_to_gp_q
399 ; neon_from_gp
400 ; neon_from_gp_q
401 ; neon_ldr
402 ; neon_ldp
403 ; neon_ldp_q
404 ; neon_load1_1reg
405 ; neon_load1_1reg_q
406 ; neon_load1_2reg
407 ; neon_load1_2reg_q
408 ; neon_load1_3reg
409 ; neon_load1_3reg_q
410 ; neon_load1_4reg
411 ; neon_load1_4reg_q
412 ; neon_load1_all_lanes
413 ; neon_load1_all_lanes_q
414 ; neon_load1_one_lane
415 ; neon_load1_one_lane_q
416 ; neon_load2_2reg
417 ; neon_load2_2reg_q
418 ; neon_load2_4reg
419 ; neon_load2_4reg_q
420 ; neon_load2_all_lanes
421 ; neon_load2_all_lanes_q
422 ; neon_load2_one_lane
423 ; neon_load2_one_lane_q
424 ; neon_load3_3reg
425 ; neon_load3_3reg_q
426 ; neon_load3_all_lanes
427 ; neon_load3_all_lanes_q
428 ; neon_load3_one_lane
429 ; neon_load3_one_lane_q
430 ; neon_load4_4reg
431 ; neon_load4_4reg_q
432 ; neon_load4_all_lanes
433 ; neon_load4_all_lanes_q
434 ; neon_load4_one_lane
435 ; neon_load4_one_lane_q
436 ; neon_str
437 ; neon_stp
438 ; neon_stp_q
439 ; neon_store1_1reg
440 ; neon_store1_1reg_q
441 ; neon_store1_2reg
442 ; neon_store1_2reg_q
443 ; neon_store1_3reg
444 ; neon_store1_3reg_q
445 ; neon_store1_4reg
446 ; neon_store1_4reg_q
447 ; neon_store1_one_lane
448 ; neon_store1_one_lane_q
449 ; neon_store2_2reg
450 ; neon_store2_2reg_q
451 ; neon_store2_4reg
452 ; neon_store2_4reg_q
453 ; neon_store2_one_lane
454 ; neon_store2_one_lane_q
455 ; neon_store3_3reg
456 ; neon_store3_3reg_q
457 ; neon_store3_one_lane
458 ; neon_store3_one_lane_q
459 ; neon_store4_4reg
460 ; neon_store4_4reg_q
461 ; neon_store4_one_lane
462 ; neon_store4_one_lane_q
463 ; neon_fp_abs_s
464 ; neon_fp_abs_s_q
465 ; neon_fp_abs_d
466 ; neon_fp_abs_d_q
467 ; neon_fp_neg_s
468 ; neon_fp_neg_s_q
469 ; neon_fp_neg_d
470 ; neon_fp_neg_d_q
471 ; neon_fp_abd_s
472 ; neon_fp_abd_s_q
473 ; neon_fp_abd_d
474 ; neon_fp_abd_d_q
475 ; neon_fp_addsub_s
476 ; neon_fp_addsub_s_q
477 ; neon_fp_addsub_d
478 ; neon_fp_addsub_d_q
479 ; neon_fp_compare_s
480 ; neon_fp_compare_s_q
481 ; neon_fp_compare_d
482 ; neon_fp_compare_d_q
483 ; neon_fp_minmax_s
484 ; neon_fp_minmax_s_q
485 ; neon_fp_minmax_d
486 ; neon_fp_minmax_d_q
487 ; neon_fp_reduc_add_s
488 ; neon_fp_reduc_add_s_q
489 ; neon_fp_reduc_add_d
490 ; neon_fp_reduc_add_d_q
491 ; neon_fp_reduc_minmax_s
492 ; neon_fp_reduc_minmax_s_q
493 ; neon_fp_reduc_minmax_d
494 ; neon_fp_reduc_minmax_d_q
495 ; neon_fp_cvt_narrow_s_q
496 ; neon_fp_cvt_narrow_d_q
497 ; neon_fp_cvt_widen_h
498 ; neon_fp_cvt_widen_s
499 ; neon_fp_to_int_s
500 ; neon_fp_to_int_s_q
501 ; neon_fp_to_int_d
502 ; neon_fp_to_int_d_q
503 ; neon_int_to_fp_s
504 ; neon_int_to_fp_s_q
505 ; neon_int_to_fp_d
506 ; neon_int_to_fp_d_q
507 ; neon_fp_round_s
508 ; neon_fp_round_s_q
509 ; neon_fp_round_d
510 ; neon_fp_round_d_q
511 ; neon_fp_recpe_s
512 ; neon_fp_recpe_s_q
513 ; neon_fp_recpe_d
514 ; neon_fp_recpe_d_q
515 ; neon_fp_recps_s
516 ; neon_fp_recps_s_q
517 ; neon_fp_recps_d
518 ; neon_fp_recps_d_q
519 ; neon_fp_recpx_s
520 ; neon_fp_recpx_s_q
521 ; neon_fp_recpx_d
522 ; neon_fp_recpx_d_q
523 ; neon_fp_rsqrte_s
524 ; neon_fp_rsqrte_s_q
525 ; neon_fp_rsqrte_d
526 ; neon_fp_rsqrte_d_q
527 ; neon_fp_rsqrts_s
528 ; neon_fp_rsqrts_s_q
529 ; neon_fp_rsqrts_d
530 ; neon_fp_rsqrts_d_q
531 ; neon_fp_mul_s
532 ; neon_fp_mul_s_q
533 ; neon_fp_mul_s_scalar
534 ; neon_fp_mul_s_scalar_q
535 ; neon_fp_mul_d
536 ; neon_fp_mul_d_q
537 ; neon_fp_mul_d_scalar_q
538 ; neon_fp_mla_s
539 ; neon_fp_mla_s_q
540 ; neon_fp_mla_s_scalar
541 ; neon_fp_mla_s_scalar_q
542 ; neon_fp_mla_d
543 ; neon_fp_mla_d_q
544 ; neon_fp_mla_d_scalar_q
545 ; neon_fp_sqrt_s
546 ; neon_fp_sqrt_s_q
547 ; neon_fp_sqrt_d
548 ; neon_fp_sqrt_d_q
549 ; neon_fp_div_s
550 ; neon_fp_div_s_q
551 ; neon_fp_div_d
552 ; neon_fp_div_d_q
553 ;
554 ; The classification below is for Crypto instructions.
555 ;
556 ; crypto_aese
557 ; crypto_aesmc
558 ; crypto_sha1_xor
559 ; crypto_sha1_fast
560 ; crypto_sha1_slow
561 ; crypto_sha256_fast
562 ; crypto_sha256_slow
563 ; crypto_pmull
564 ;
565 ; The classification below is for coprocessor instructions
566 ;
567 ; coproc
568 ;
569 ; The classification below is for TME instructions
570 ;
571 ; tme
572 ; The classification below is for M-profile Vector Extension instructions
573 ;
574 ; mve_move
575 ; mve_store
576 ; mve_load
577 ; mve_misc
579 (define_attr "type"
580 "adc_imm,\
581 adc_reg,\
582 adcs_imm,\
583 adcs_reg,\
584 adr,\
585 alu_ext,\
586 alu_imm,\
587 alu_sreg,\
588 alu_shift_imm_lsl_1to4,\
589 alu_shift_imm_other,\
590 alu_shift_reg,\
591 alu_dsp_reg,\
592 alus_ext,\
593 alus_imm,\
594 alus_sreg,\
595 alus_shift_imm,\
596 alus_shift_reg,\
597 bfm,\
598 bfx,\
599 block,\
600 branch,\
601 call,\
602 clz,\
603 no_insn,\
604 csel,\
605 crc,\
606 extend,\
607 f_cvt,\
608 f_cvtf2i,\
609 f_cvti2f,\
610 f_flag,\
611 f_loadd,\
612 f_loads,\
613 f_mcr,\
614 f_mcrr,\
615 f_minmaxd,\
616 f_minmaxs,\
617 f_mrc,\
618 f_mrrc,\
619 f_rintd,\
620 f_rints,\
621 f_stored,\
622 f_stores,\
623 faddd,\
624 fadds,\
625 fccmpd,\
626 fccmps,\
627 fcmpd,\
628 fcmps,\
629 fconstd,\
630 fconsts,\
631 fcsel,\
632 fdivd,\
633 fdivs,\
634 ffarithd,\
635 ffariths,\
636 ffmad,\
637 ffmas,\
638 float,\
639 fmacd,\
640 fmacs,\
641 fmov,\
642 fmuld,\
643 fmuls,\
644 fsqrts,\
645 fsqrtd,\
646 load_acq,\
647 load_byte,\
648 load_4,\
649 load_8,\
650 load_12,\
651 load_16,\
652 logic_imm,\
653 logic_reg,\
654 logic_shift_imm,\
655 logic_shift_reg,\
656 logics_imm,\
657 logics_reg,\
658 logics_shift_imm,\
659 logics_shift_reg,\
660 mla,\
661 mlas,\
662 mov_imm,\
663 mov_reg,\
664 mov_shift,\
665 mov_shift_reg,\
666 mrs,\
667 mul,\
668 muls,\
669 multiple,\
670 mvn_imm,\
671 mvn_reg,\
672 mvn_shift,\
673 mvn_shift_reg,\
674 nop,\
675 rbit,\
676 rev,\
677 rotate_imm,\
678 sdiv,\
679 shift_imm,\
680 shift_reg,\
681 smlad,\
682 smladx,\
683 smlal,\
684 smlald,\
685 smlals,\
686 smlalxy,\
687 smlawx,\
688 smlawy,\
689 smlaxy,\
690 smlsd,\
691 smlsdx,\
692 smlsld,\
693 smmla,\
694 smmul,\
695 smmulr,\
696 smuad,\
697 smuadx,\
698 smull,\
699 smulls,\
700 smulwy,\
701 smulxy,\
702 smusd,\
703 smusdx,\
704 store_rel,\
705 store_4,\
706 store_8,\
707 store_12,\
708 store_16,\
709 trap,\
710 udiv,\
711 umaal,\
712 umlal,\
713 umlals,\
714 umull,\
715 umulls,\
716 untyped,\
717 wmmx_tandc,\
718 wmmx_tbcst,\
719 wmmx_textrc,\
720 wmmx_textrm,\
721 wmmx_tinsr,\
722 wmmx_tmcr,\
723 wmmx_tmcrr,\
724 wmmx_tmia,\
725 wmmx_tmiaph,\
726 wmmx_tmiaxy,\
727 wmmx_tmrc,\
728 wmmx_tmrrc,\
729 wmmx_tmovmsk,\
730 wmmx_torc,\
731 wmmx_torvsc,\
732 wmmx_wabs,\
733 wmmx_wabsdiff,\
734 wmmx_wacc,\
735 wmmx_wadd,\
736 wmmx_waddbhus,\
737 wmmx_waddsubhx,\
738 wmmx_waligni,\
739 wmmx_walignr,\
740 wmmx_wand,\
741 wmmx_wandn,\
742 wmmx_wavg2,\
743 wmmx_wavg4,\
744 wmmx_wcmpeq,\
745 wmmx_wcmpgt,\
746 wmmx_wmac,\
747 wmmx_wmadd,\
748 wmmx_wmax,\
749 wmmx_wmerge,\
750 wmmx_wmiawxy,\
751 wmmx_wmiaxy,\
752 wmmx_wmin,\
753 wmmx_wmov,\
754 wmmx_wmul,\
755 wmmx_wmulw,\
756 wmmx_wldr,\
757 wmmx_wor,\
758 wmmx_wpack,\
759 wmmx_wqmiaxy,\
760 wmmx_wqmulm,\
761 wmmx_wqmulwm,\
762 wmmx_wror,\
763 wmmx_wsad,\
764 wmmx_wshufh,\
765 wmmx_wsll,\
766 wmmx_wsra,\
767 wmmx_wsrl,\
768 wmmx_wstr,\
769 wmmx_wsub,\
770 wmmx_wsubaddhx,\
771 wmmx_wunpckeh,\
772 wmmx_wunpckel,\
773 wmmx_wunpckih,\
774 wmmx_wunpckil,\
775 wmmx_wxor,\
776 \
777 neon_add,\
778 neon_add_q,\
779 neon_add_widen,\
780 neon_add_long,\
781 neon_qadd,\
782 neon_qadd_q,\
783 neon_add_halve,\
784 neon_add_halve_q,\
785 neon_add_halve_narrow_q,\
786 \
787 neon_sub,\
788 neon_sub_q,\
789 neon_sub_widen,\
790 neon_sub_long,\
791 neon_qsub,\
792 neon_qsub_q,\
793 neon_sub_halve,\
794 neon_sub_halve_q,\
795 neon_sub_halve_narrow_q,\
796 \
797 neon_fcadd,\
798 neon_fcmla,\
799 \
800 neon_abs,\
801 neon_abs_q,\
802 neon_dot,\
803 neon_dot_q,\
804 neon_neg,\
805 neon_neg_q,\
806 neon_qneg,\
807 neon_qneg_q,\
808 neon_qabs,\
809 neon_qabs_q,\
810 neon_abd,\
811 neon_abd_q,\
812 neon_abd_long,\
813 \
814 neon_minmax,\
815 neon_minmax_q,\
816 neon_compare,\
817 neon_compare_q,\
818 neon_compare_zero,\
819 neon_compare_zero_q,\
820 \
821 neon_arith_acc,\
822 neon_arith_acc_q,\
823 neon_reduc_add,\
824 neon_reduc_add_q,\
825 neon_reduc_add_long,\
826 neon_reduc_add_acc,\
827 neon_reduc_add_acc_q,\
828 neon_reduc_minmax,\
829 neon_reduc_minmax_q,\
830 neon_logic,\
831 neon_logic_q,\
832 neon_tst,\
833 neon_tst_q,\
834 \
835 neon_shift_imm,\
836 neon_shift_imm_q,\
837 neon_shift_imm_narrow_q,\
838 neon_shift_imm_long,\
839 neon_shift_reg,\
840 neon_shift_reg_q,\
841 neon_shift_acc,\
842 neon_shift_acc_q,\
843 neon_sat_shift_imm,\
844 neon_sat_shift_imm_q,\
845 neon_sat_shift_imm_narrow_q,\
846 neon_sat_shift_reg,\
847 neon_sat_shift_reg_q,\
848 \
849 neon_ins,\
850 neon_ins_q,\
851 neon_move,\
852 neon_move_q,\
853 neon_move_narrow_q,\
854 neon_permute,\
855 neon_permute_q,\
856 neon_zip,\
857 neon_zip_q,\
858 neon_tbl1,\
859 neon_tbl1_q,\
860 neon_tbl2,\
861 neon_tbl2_q,\
862 neon_tbl3,\
863 neon_tbl3_q,\
864 neon_tbl4,\
865 neon_tbl4_q,\
866 \
867 neon_bsl,\
868 neon_bsl_q,\
869 neon_cls,\
870 neon_cls_q,\
871 neon_cnt,\
872 neon_cnt_q,\
873 neon_dup,\
874 neon_dup_q,\
875 neon_ext,\
876 neon_ext_q,\
877 neon_rbit,\
878 neon_rbit_q,\
879 neon_rev,\
880 neon_rev_q,\
881 \
882 neon_mul_b,\
883 neon_mul_b_q,\
884 neon_mul_h,\
885 neon_mul_h_q,\
886 neon_mul_s,\
887 neon_mul_s_q,\
888 neon_mul_b_long,\
889 neon_mul_h_long,\
890 neon_mul_s_long,\
891 neon_mul_d_long,\
892 neon_mul_h_scalar,\
893 neon_mul_h_scalar_q,\
894 neon_mul_s_scalar,\
895 neon_mul_s_scalar_q,\
896 neon_mul_h_scalar_long,\
897 neon_mul_s_scalar_long,\
898 \
899 neon_sat_mul_b,\
900 neon_sat_mul_b_q,\
901 neon_sat_mul_h,\
902 neon_sat_mul_h_q,\
903 neon_sat_mul_s,\
904 neon_sat_mul_s_q,\
905 neon_sat_mul_b_long,\
906 neon_sat_mul_h_long,\
907 neon_sat_mul_s_long,\
908 neon_sat_mul_h_scalar,\
909 neon_sat_mul_h_scalar_q,\
910 neon_sat_mul_s_scalar,\
911 neon_sat_mul_s_scalar_q,\
912 neon_sat_mul_h_scalar_long,\
913 neon_sat_mul_s_scalar_long,\
914 \
915 neon_mla_b,\
916 neon_mla_b_q,\
917 neon_mla_h,\
918 neon_mla_h_q,\
919 neon_mla_s,\
920 neon_mla_s_q,\
921 neon_mla_b_long,\
922 neon_mla_h_long,\
923 neon_mla_s_long,\
924 neon_mla_h_scalar,\
925 neon_mla_h_scalar_q,\
926 neon_mla_s_scalar,\
927 neon_mla_s_scalar_q,\
928 neon_mla_h_scalar_long,\
929 neon_mla_s_scalar_long,\
930 \
931 neon_sat_mla_b_long,\
932 neon_sat_mla_h_long,\
933 neon_sat_mla_s_long,\
934 neon_sat_mla_h_scalar_long,\
935 neon_sat_mla_s_scalar_long,\
936 \
937 neon_to_gp,\
938 neon_to_gp_q,\
939 neon_from_gp,\
940 neon_from_gp_q,\
941 \
942 neon_ldr,\
943 neon_ldp,\
944 neon_ldp_q,\
945 neon_load1_1reg,\
946 neon_load1_1reg_q,\
947 neon_load1_2reg,\
948 neon_load1_2reg_q,\
949 neon_load1_3reg,\
950 neon_load1_3reg_q,\
951 neon_load1_4reg,\
952 neon_load1_4reg_q,\
953 neon_load1_all_lanes,\
954 neon_load1_all_lanes_q,\
955 neon_load1_one_lane,\
956 neon_load1_one_lane_q,\
957 \
958 neon_load2_2reg,\
959 neon_load2_2reg_q,\
960 neon_load2_4reg,\
961 neon_load2_4reg_q,\
962 neon_load2_all_lanes,\
963 neon_load2_all_lanes_q,\
964 neon_load2_one_lane,\
965 neon_load2_one_lane_q,\
966 \
967 neon_load3_3reg,\
968 neon_load3_3reg_q,\
969 neon_load3_all_lanes,\
970 neon_load3_all_lanes_q,\
971 neon_load3_one_lane,\
972 neon_load3_one_lane_q,\
973 \
974 neon_load4_4reg,\
975 neon_load4_4reg_q,\
976 neon_load4_all_lanes,\
977 neon_load4_all_lanes_q,\
978 neon_load4_one_lane,\
979 neon_load4_one_lane_q,\
980 \
981 neon_str,\
982 neon_stp,\
983 neon_stp_q,\
984 neon_store1_1reg,\
985 neon_store1_1reg_q,\
986 neon_store1_2reg,\
987 neon_store1_2reg_q,\
988 neon_store1_3reg,\
989 neon_store1_3reg_q,\
990 neon_store1_4reg,\
991 neon_store1_4reg_q,\
992 neon_store1_one_lane,\
993 neon_store1_one_lane_q,\
994 \
995 neon_store2_2reg,\
996 neon_store2_2reg_q,\
997 neon_store2_4reg,\
998 neon_store2_4reg_q,\
999 neon_store2_one_lane,\
1000 neon_store2_one_lane_q,\
1001 \
1002 neon_store3_3reg,\
1003 neon_store3_3reg_q,\
1004 neon_store3_one_lane,\
1005 neon_store3_one_lane_q,\
1006 \
1007 neon_store4_4reg,\
1008 neon_store4_4reg_q,\
1009 neon_store4_one_lane,\
1010 neon_store4_one_lane_q,\
1011 \
1012 neon_fp_abs_s,\
1013 neon_fp_abs_s_q,\
1014 neon_fp_abs_d,\
1015 neon_fp_abs_d_q,\
1016 neon_fp_neg_s,\
1017 neon_fp_neg_s_q,\
1018 neon_fp_neg_d,\
1019 neon_fp_neg_d_q,\
1020 \
1021 neon_fp_abd_s,\
1022 neon_fp_abd_s_q,\
1023 neon_fp_abd_d,\
1024 neon_fp_abd_d_q,\
1025 neon_fp_addsub_s,\
1026 neon_fp_addsub_s_q,\
1027 neon_fp_addsub_d,\
1028 neon_fp_addsub_d_q,\
1029 neon_fp_compare_s,\
1030 neon_fp_compare_s_q,\
1031 neon_fp_compare_d,\
1032 neon_fp_compare_d_q,\
1033 neon_fp_minmax_s,\
1034 neon_fp_minmax_s_q,\
1035 neon_fp_minmax_d,\
1036 neon_fp_minmax_d_q,\
1037 \
1038 neon_fp_reduc_add_s,\
1039 neon_fp_reduc_add_s_q,\
1040 neon_fp_reduc_add_d,\
1041 neon_fp_reduc_add_d_q,\
1042 neon_fp_reduc_minmax_s,\
1043 neon_fp_reduc_minmax_s_q,\
1044 neon_fp_reduc_minmax_d,\
1045 neon_fp_reduc_minmax_d_q,\
1046 \
1047 neon_fp_cvt_narrow_s_q,\
1048 neon_fp_cvt_narrow_d_q,\
1049 neon_fp_cvt_widen_h,\
1050 neon_fp_cvt_widen_s,\
1051 \
1052 neon_fp_to_int_s,\
1053 neon_fp_to_int_s_q,\
1054 neon_fp_to_int_d,\
1055 neon_fp_to_int_d_q,\
1056 neon_int_to_fp_s,\
1057 neon_int_to_fp_s_q,\
1058 neon_int_to_fp_d,\
1059 neon_int_to_fp_d_q,\
1060 neon_fp_round_s,\
1061 neon_fp_round_s_q,\
1062 neon_fp_round_d,\
1063 neon_fp_round_d_q,\
1064 \
1065 neon_fp_recpe_s,\
1066 neon_fp_recpe_s_q,\
1067 neon_fp_recpe_d,\
1068 neon_fp_recpe_d_q,\
1069 neon_fp_recps_s,\
1070 neon_fp_recps_s_q,\
1071 neon_fp_recps_d,\
1072 neon_fp_recps_d_q,\
1073 neon_fp_recpx_s,\
1074 neon_fp_recpx_s_q,\
1075 neon_fp_recpx_d,\
1076 neon_fp_recpx_d_q,\
1077 \
1078 neon_fp_rsqrte_s,\
1079 neon_fp_rsqrte_s_q,\
1080 neon_fp_rsqrte_d,\
1081 neon_fp_rsqrte_d_q,\
1082 neon_fp_rsqrts_s,\
1083 neon_fp_rsqrts_s_q,\
1084 neon_fp_rsqrts_d,\
1085 neon_fp_rsqrts_d_q,\
1086 \
1087 neon_fp_mul_s,\
1088 neon_fp_mul_s_q,\
1089 neon_fp_mul_s_scalar,\
1090 neon_fp_mul_s_scalar_q,\
1091 neon_fp_mul_d,\
1092 neon_fp_mul_d_q,\
1093 neon_fp_mul_d_scalar_q,\
1094 \
1095 neon_fp_mla_s,\
1096 neon_fp_mla_s_q,\
1097 neon_fp_mla_s_scalar,\
1098 neon_fp_mla_s_scalar_q,\
1099 neon_fp_mla_d,\
1100 neon_fp_mla_d_q,\
1101 neon_fp_mla_d_scalar_q,\
1102 \
1103 neon_fp_sqrt_s,\
1104 neon_fp_sqrt_s_q,\
1105 neon_fp_sqrt_d,\
1106 neon_fp_sqrt_d_q,\
1107 neon_fp_div_s,\
1108 neon_fp_div_s_q,\
1109 neon_fp_div_d,\
1110 neon_fp_div_d_q,\
1111 \
1112 crypto_aese,\
1113 crypto_aesmc,\
1114 crypto_sha1_xor,\
1115 crypto_sha1_fast,\
1116 crypto_sha1_slow,\
1117 crypto_sha256_fast,\
1118 crypto_sha256_slow,\
1119 crypto_pmull,\
1120 crypto_sha512,\
1121 crypto_sha3,\
1122 crypto_sm3,\
1123 crypto_sm4,\
1124 coproc,\
1125 tme,\
1126 memtag,\
1127 ls64,\
1128 mve_move,\
1129 mve_store,\
1130 mve_load, \
1131 mve_misc"
1132 (cond [(eq_attr "autodetect_type" "alu_shift_lsr_op2,alu_shift_asr_op2")
1133 (const_string "alu_shift_imm_other")
1134 (eq_attr "autodetect_type" "alu_shift_lsl_op2")
1135 (if_then_else (match_operand 2 "const_1_to_4_operand")
1136 (const_string "alu_shift_imm_lsl_1to4")
1137 (const_string "alu_shift_imm_other"))
1138 (eq_attr "autodetect_type" "alu_shift_mul_op3")
1139 (if_then_else (match_operand 3 "const_2_4_8_16_operand")
1140 (const_string "alu_shift_imm_lsl_1to4")
1141 (const_string "alu_shift_imm_other"))
1142 (eq_attr "autodetect_type" "alu_shift_operator1")
1143 (if_then_else (match_operand 1 "alu_shift_reg_p")
1144 (const_string "alu_shift_reg")
1145 (if_then_else (match_operand 1 "alu_shift_operator_lsl_1_to_4")
1146 (const_string "alu_shift_imm_lsl_1to4")
1147 (const_string "alu_shift_imm_other")))
1148 (eq_attr "autodetect_type" "alu_shift_operator2")
1149 (if_then_else (match_operand 2 "alu_shift_reg_p")
1150 (const_string "alu_shift_reg")
1151 (if_then_else (match_operand 2 "alu_shift_operator_lsl_1_to_4")
1152 (const_string "alu_shift_imm_lsl_1to4")
1153 (const_string "alu_shift_imm_other")))
1154 (eq_attr "autodetect_type" "alu_shift_operator3")
1155 (if_then_else (match_operand 3 "alu_shift_reg_p")
1156 (const_string "alu_shift_reg")
1157 (if_then_else (match_operand 3 "alu_shift_operator_lsl_1_to_4")
1158 (const_string "alu_shift_imm_lsl_1to4")
1159 (const_string "alu_shift_imm_other")))
1160 (eq_attr "autodetect_type" "alu_shift_operator4")
1161 (if_then_else (match_operand 4 "alu_shift_reg_p")
1162 (const_string "alu_shift_reg")
1163 (if_then_else (match_operand 4 "alu_shift_operator_lsl_1_to_4")
1164 (const_string "alu_shift_imm_lsl_1to4")
1165 (const_string "alu_shift_imm_other")))
1166 ]
1167 (const_string "untyped")))
1170 ; Is this an (integer side) multiply with a 32-bit (or smaller) result?
1171 (define_attr "mul32" "no,yes"
1172 (if_then_else
1173 (eq_attr "type"
1174 "smulxy,smlaxy,smulwy,smlawx,mul,muls,mla,mlas,smlawy,smuad,smuadx,\
1175 smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,smlald,smlsld")
1176 (const_string "yes")
1177 (const_string "no")))
1179 ; Is this an (integer side) widening multiply with a 64-bit result?
1180 (define_attr "widen_mul64" "no,yes"
1181 (if_then_else
1182 (eq_attr "type"
1183 "smlalxy,umull,umulls,umaal,umlal,umlals,smull,smulls,smlal,smlals")
1184 (const_string "yes")
1185 (const_string "no")))
1187 ; YES if the "type" attribute assigned to the insn denotes an
1188 ; Advanced SIMD instruction, NO otherwise.
1189 (define_attr "is_neon_type" "yes,no"
1190 (if_then_else (eq_attr "type"
1191 "neon_add, neon_add_q, neon_add_widen, neon_add_long,\
1192 neon_qadd, neon_qadd_q, neon_add_halve, neon_add_halve_q,\
1193 neon_add_halve_narrow_q,\
1194 neon_sub, neon_sub_q, neon_sub_widen, neon_sub_long, neon_qsub,\
1195 neon_qsub_q, neon_sub_halve, neon_sub_halve_q,\
1196 neon_sub_halve_narrow_q,\
1197 neon_abs, neon_abs_q, neon_dot, neon_dot_q, neon_neg, neon_neg_q,\
1198 neon_qneg, neon_qneg_q, neon_qabs, neon_qabs_q, neon_abd, neon_abd_q,\
1199 neon_abd_long, neon_minmax, neon_minmax_q, neon_compare,\
1200 neon_compare_q, neon_compare_zero, neon_compare_zero_q,\
1201 neon_arith_acc, neon_arith_acc_q, neon_reduc_add,\
1202 neon_reduc_add_q, neon_reduc_add_long, neon_reduc_add_acc,\
1203 neon_reduc_add_acc_q, neon_reduc_minmax, neon_reduc_minmax_q,\
1204 neon_logic, neon_logic_q, neon_tst, neon_tst_q,\
1205 neon_shift_imm, neon_shift_imm_q, neon_shift_imm_narrow_q,\
1206 neon_shift_imm_long, neon_shift_reg, neon_shift_reg_q,\
1207 neon_shift_acc, neon_shift_acc_q, neon_sat_shift_imm,\
1208 neon_sat_shift_imm_q, neon_sat_shift_imm_narrow_q,\
1209 neon_sat_shift_reg, neon_sat_shift_reg_q,\
1210 neon_ins, neon_ins_q, neon_move, neon_move_q, neon_move_narrow_q,\
1211 neon_permute, neon_permute_q, neon_zip, neon_zip_q, neon_tbl1,\
1212 neon_tbl1_q, neon_tbl2, neon_tbl2_q, neon_tbl3, neon_tbl3_q,\
1213 neon_tbl4, neon_tbl4_q, neon_bsl, neon_bsl_q, neon_cls,\
1214 neon_cls_q, neon_cnt, neon_cnt_q, neon_dup, neon_dup_q,\
1215 neon_ext, neon_ext_q, neon_rbit, neon_rbit_q,\
1216 neon_rev, neon_rev_q, neon_mul_b, neon_mul_b_q, neon_mul_h,\
1217 neon_mul_h_q, neon_mul_s, neon_mul_s_q, neon_mul_b_long,\
1218 neon_mul_h_long, neon_mul_s_long, neon_mul_d_long, neon_mul_h_scalar,\
1219 neon_mul_h_scalar_q, neon_mul_s_scalar, neon_mul_s_scalar_q,\
1220 neon_mul_h_scalar_long, neon_mul_s_scalar_long, neon_sat_mul_b,\
1221 neon_sat_mul_b_q, neon_sat_mul_h, neon_sat_mul_h_q,\
1222 neon_sat_mul_s, neon_sat_mul_s_q, neon_sat_mul_b_long,\
1223 neon_sat_mul_h_long, neon_sat_mul_s_long, neon_sat_mul_h_scalar,\
1224 neon_sat_mul_h_scalar_q, neon_sat_mul_s_scalar,\
1225 neon_sat_mul_s_scalar_q, neon_sat_mul_h_scalar_long,\
1226 neon_sat_mul_s_scalar_long, neon_mla_b, neon_mla_b_q, neon_mla_h,\
1227 neon_mla_h_q, neon_mla_s, neon_mla_s_q, neon_mla_b_long,\
1228 neon_mla_h_long, neon_mla_s_long, neon_mla_h_scalar,\
1229 neon_mla_h_scalar_q, neon_mla_s_scalar, neon_mla_s_scalar_q,\
1230 neon_mla_h_scalar_long, neon_mla_s_scalar_long,\
1231 neon_sat_mla_b_long, neon_sat_mla_h_long,\
1232 neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\
1233 neon_sat_mla_s_scalar_long,\
1234 neon_to_gp, neon_to_gp_q, neon_from_gp, neon_from_gp_q,\
1235 neon_ldr, neon_ldp, neon_ldp_q,\
1236 neon_load1_1reg, neon_load1_1reg_q, neon_load1_2reg,\
1237 neon_load1_2reg_q, neon_load1_3reg, neon_load1_3reg_q,\
1238 neon_load1_4reg, neon_load1_4reg_q, neon_load1_all_lanes,\
1239 neon_load1_all_lanes_q, neon_load1_one_lane, neon_load1_one_lane_q,\
1240 neon_load2_2reg, neon_load2_2reg_q, neon_load2_4reg,\
1241 neon_load2_4reg_q, neon_load2_all_lanes, neon_load2_all_lanes_q,\
1242 neon_load2_one_lane, neon_load2_one_lane_q,\
1243 neon_load3_3reg, neon_load3_3reg_q, neon_load3_all_lanes,\
1244 neon_load3_all_lanes_q, neon_load3_one_lane, neon_load3_one_lane_q,\
1245 neon_load4_4reg, neon_load4_4reg_q, neon_load4_all_lanes,\
1246 neon_load4_all_lanes_q, neon_load4_one_lane, neon_load4_one_lane_q,\
1247 neon_str, neon_stp, neon_stp_q,\
1248 neon_store1_1reg, neon_store1_1reg_q, neon_store1_2reg,\
1249 neon_store1_2reg_q, neon_store1_3reg, neon_store1_3reg_q,\
1250 neon_store1_4reg, neon_store1_4reg_q, neon_store1_one_lane,\
1251 neon_store1_one_lane_q, neon_store2_2reg, neon_store2_2reg_q,\
1252 neon_store2_4reg, neon_store2_4reg_q, neon_store2_one_lane,\
1253 neon_store2_one_lane_q, neon_store3_3reg, neon_store3_3reg_q,\
1254 neon_store3_one_lane, neon_store3_one_lane_q, neon_store4_4reg,\
1255 neon_store4_4reg_q, neon_store4_one_lane, neon_store4_one_lane_q,\
1256 neon_fp_abd_s, neon_fp_abd_s_q, neon_fp_abd_d, neon_fp_abd_d_q,\
1257 neon_fp_abs_s, neon_fp_abs_s_q, neon_fp_abs_d, neon_fp_abs_d_q,\
1258 neon_fp_addsub_s, neon_fp_addsub_s_q, neon_fp_addsub_d,\
1259 neon_fp_addsub_d_q, neon_fp_compare_s, neon_fp_compare_s_q,\
1260 neon_fp_compare_d, neon_fp_compare_d_q, neon_fp_minmax_s,\
1261 neon_fp_minmax_s_q, neon_fp_minmax_d, neon_fp_minmax_d_q,\
1262 neon_fp_neg_s, neon_fp_neg_s_q, neon_fp_neg_d, neon_fp_neg_d_q,\
1263 neon_fp_reduc_add_s, neon_fp_reduc_add_s_q, neon_fp_reduc_add_d,\
1264 neon_fp_reduc_add_d_q, neon_fp_reduc_minmax_s,
1265 neon_fp_reduc_minmax_s_q, neon_fp_reduc_minmax_d,\
1266 neon_fp_reduc_minmax_d_q,\
1267 neon_fp_cvt_narrow_s_q, neon_fp_cvt_narrow_d_q,\
1268 neon_fp_cvt_widen_h, neon_fp_cvt_widen_s, neon_fp_to_int_s,\
1269 neon_fp_to_int_s_q, neon_int_to_fp_s, neon_int_to_fp_s_q,\
1270 neon_fp_to_int_d, neon_fp_to_int_d_q,\
1271 neon_int_to_fp_d, neon_int_to_fp_d_q,\
1272 neon_fp_round_s, neon_fp_round_s_q, neon_fp_recpe_s,\
1273 neon_fp_recpe_s_q,\
1274 neon_fp_recpe_d, neon_fp_recpe_d_q, neon_fp_recps_s,\
1275 neon_fp_recps_s_q, neon_fp_recps_d, neon_fp_recps_d_q,\
1276 neon_fp_recpx_s, neon_fp_recpx_s_q, neon_fp_recpx_d,\
1277 neon_fp_recpx_d_q, neon_fp_rsqrte_s, neon_fp_rsqrte_s_q,\
1278 neon_fp_rsqrte_d, neon_fp_rsqrte_d_q, neon_fp_rsqrts_s,\
1279 neon_fp_rsqrts_s_q, neon_fp_rsqrts_d, neon_fp_rsqrts_d_q,\
1280 neon_fp_mul_s, neon_fp_mul_s_q, neon_fp_mul_s_scalar,\
1281 neon_fp_mul_s_scalar_q, neon_fp_mul_d, neon_fp_mul_d_q,\
1282 neon_fp_mul_d_scalar_q, neon_fp_mla_s, neon_fp_mla_s_q,\
1283 neon_fp_mla_s_scalar, neon_fp_mla_s_scalar_q, neon_fp_mla_d,\
1284 neon_fp_mla_d_q, neon_fp_mla_d_scalar_q, neon_fp_sqrt_s,\
1285 neon_fp_sqrt_s_q, neon_fp_sqrt_d, neon_fp_sqrt_d_q,\
1286 neon_fp_div_s, neon_fp_div_s_q, neon_fp_div_d, neon_fp_div_d_q, crypto_aese,\
1287 neon_fcadd, neon_fcmla, \
1288 crypto_aesmc, crypto_sha1_xor, crypto_sha1_fast, crypto_sha1_slow,\
1289 crypto_sha256_fast, crypto_sha256_slow")
1290 (const_string "yes")
1291 (const_string "no")))
1293 ;; YES if the "type" attribute assigned to the insn denotes an MVE instruction,
1294 ;; No otherwise.
1295 (define_attr "is_mve_type" "yes,no"
1296 (if_then_else (eq_attr "type"
1297 "mve_move, mve_load, mve_store, mrs, mve_misc")
1298 (const_string "yes")
1299 (const_string "no")))
1301 (define_insn_reservation "no_reservation" 0
1302 (eq_attr "type" "no_insn")
1303 "nothing")