modules/hdd/hdpro_atad/atad.c

   1 /*
   2   Copyright 2011, jimmikaelkael
   3   Licenced under Academic Free License version 3.0
   4   Review Open PS2 Loader README & LICENSE files for further details.
   5
   6   ATA Driver for the HD Pro Kit, based on original ATAD form ps2sdk:
   7
   8   Copyright (c) 2003 Marcus R. Brown <mrbrown@0xd6.org>
   9   Licenced under Academic Free License version 2.0
  10   Review ps2sdk README & LICENSE files for further details.
  11
  12   $Id: ps2atad.c 1455 2007-11-04 23:46:27Z roman_ps2dev $
  13   ATA device driver.
  14 */
  15
  16 #include <loadcore.h>
  17 #include <intrman.h>
  18 #include <thbase.h>
  19 #include <thevent.h>
  20 #include <stdio.h>
  21 #include <sysclib.h>
  22 #include <atahw.h>
  23
  24 #define MODNAME "atad_driver"
  25 IRX_ID(MODNAME, 1, 1);
  26
  27 #define M_PRINTF(format, args...)       \
  28         printf(MODNAME ": " format, ## args)
  29
  30 #define BANNER "ATA device driver for HD Pro Kit %s\n"
  31 #define VERSION "v1.0"
  32
  33
  34 // HD Pro Kit is mapping the 1st word in ROM0 seg as a main ATA controller,
  35 // The pseudo ATA controller registers are accessed (input/ouput) by writing
  36 // an id to the main ATA controller (id specific to HDpro, see registers id below).
  37 #define HDPROreg_IO8          (*(volatile unsigned char *)0xBFC00000)
  38 #define HDPROreg_IO32         (*(volatile unsigned int  *)0xBFC00000)
  39
  40 #define CDVDreg_STATUS        (*(volatile unsigned char *)0xBF40200A)
  41
  42 // Pseudo ATA controller registers id - Output
  43 #define ATAreg_CONTROL_RD       0x68
  44 #define ATAreg_SELECT_RD        0x70
  45 #define ATAreg_STATUS_RD        0xf0
  46 #define ATAreg_ERROR_RD         0x90
  47 #define ATAreg_NSECTOR_RD       0x50
  48 #define ATAreg_SECTOR_RD        0xd0
  49 #define ATAreg_LCYL_RD          0x30
  50 #define ATAreg_HCYL_RD          0xb0
  51 #define ATAreg_DATA_RD          0x41
  52
  53 // Pseudo ATA controller registers id - Input
  54 #define ATAreg_CONTROL_WR       0x6a
  55 #define ATAreg_SELECT_WR        0x72
  56 #define ATAreg_COMMAND_WR       0xf2
  57 #define ATAreg_FEATURE_WR       0x92
  58 #define ATAreg_NSECTOR_WR       0x52
  59 #define ATAreg_SECTOR_WR        0xd2
  60 #define ATAreg_LCYL_WR          0x32
  61 #define ATAreg_HCYL_WR          0xb2
  62 #define ATAreg_DATA_WR          0x12
  63
  64 // HD Pro uses PIO commands for reading/writing from HDD
  65 #define ATA_C_READ_PIO          0x20
  66 #define ATA_C_READ_PIO_EXT      0x24
  67 #define ATA_C_WRITE_PIO         0x30
  68 #define ATA_C_WRITE_PIO_EXT     0x34
  69
  70
  71 typedef struct _ata_devinfo {
  72         int     exists;                 /* Was successfully probed.             */
  73         int     has_packet;             /* Supports the PACKET command set.     */
  74         u32     total_sectors;          /* Total number of user sectors.        */
  75         u32     security_status;        /* Word 0x100 of the identify info.     */
  76 } ata_devinfo_t;
  77
  78 static int ata_evflg = -1;
  79
  80 /* Used for indicating 48-bit LBA support.  */
  81 static int lba_48bit[2] = {0, 0};
  82
  83 /* Local device info kept for drives 0 and 1.  */
  84 static ata_devinfo_t atad_devinfo[2];
  85
  86 /* Data returned from DEVICE IDENTIFY is kept here.  Also, this is used by the
  87    security commands to set and unlock the password.  */
  88 static u16 ata_param[256];
  89
  90 /* ATA command info.  */
  91 typedef struct _ata_cmd_info {
  92         u8      command;
  93         u8      type;
  94 } ata_cmd_info_t;
  95
  96 static ata_cmd_info_t ata_cmd_table[] = {
  97         {0,1},{3,1},{8,5},{0x20,2},{0x30,3},{0x24,2},{0x34,3},{0x32,8},{0x38,3},
  98         {0x40,1},{0x70,1},{0x87,2},{0x8e,7},{0x90,6},{0x91,1},{0x92,3},{0xa1,2},
  99         {0xb0,7},{0xc0,1},{0xc4,2},{0xc5,3},{0xc6,1},{0xc8,4},{0xca,4},{0xcd,3},
 100         {0xda,1},{0xde,1},{0xdf,1},{0xe0,1},{0xe1,1},{0xe2,1},{0xe3,1},{0xe4,2},
 101         {0xe5,1},{0xe6,1},{0xe7,1},{0xe8,3},{0xec,2},{0xed,1},{0xef,1},{0xf1,3},
 102         {0xf2,3},{0xf3,1},{0xf4,3},{0xf5,1},{0xf6,3},{0xf8,1},{0xf9,1},{0x25,4},
 103         {0x35,4},{0xea,1}
 104 };
 105 #define ATA_CMD_TABLE_SIZE      (sizeof ata_cmd_table/sizeof(ata_cmd_info_t))
 106
 107 static ata_cmd_info_t sec_ctrl_cmd_table[] = {
 108         {0xec,2},{0xf3,1},{0xf4,1},{0xf5,1},{0xf1,3},{0xf2,3},{0x30,3},{0x20,2}
 109 };
 110 #define SEC_CTRL_CMD_TABLE_SIZE (sizeof sec_ctrl_cmd_table/sizeof(ata_cmd_info_t))
 111
 112 static ata_cmd_info_t smart_cmd_table[] = {
 113         {0xd0,2},{0xd2,1},{0xd3,1},{0xd4,1},{0xd5,2},{0xd6,3},{0xd8,1},{0xd9,1},
 114         {0xda,1}
 115 };
 116 #define SMART_CMD_TABLE_SIZE    (sizeof smart_cmd_table/sizeof(ata_cmd_info_t))
 117
 118 /* This is the state info tracked between ata_io_start() and ata_io_finish().  */
 119 typedef struct _ata_cmd_state {
 120         int     type;           /* The ata_cmd_info_t type field. */
 121         void    *buf;
 122         u32     blkcount;       /* The number of 512-byte blocks (sectors) to transfer.  */
 123         int     dir;            /* DMA direction: 0 - to RAM, 1 - from RAM.  */
 124 } ata_cmd_state_t;
 125
 126 static ata_cmd_state_t atad_cmd_state;
 127
 128 static int hdpro_io_active = 0;
 129 static int intr_suspended = 0;
 130 static int intr_state;
 131
 132 static int ata_init_devices(ata_devinfo_t *devinfo);
 133 static int ata_wait_busy(int bits);
 134 int ata_io_finish(void);
 135 int ata_device_flush_cache(int device);
 136
 137 struct irx_export_table _exp_atad;
 138
 139 static u32 ata_alarm_cb(void *unused)
 140 {
 141         iSetEventFlag(ata_evflg, 0x01);
 142         return 0;
 143 }
 144
 145 static void suspend_intr(void)
 146 {
 147         if (!intr_suspended) {
 148                 CpuSuspendIntr(&intr_state);
 149
 150                 intr_suspended = 1;
 151         }
 152 }
 153
 154 static void resume_intr(void)
 155 {
 156         if (intr_suspended) {
 157                 CpuResumeIntr(intr_state);
 158
 159                 intr_suspended = 0;
 160         }
 161 }
 162
 163 static int hdpro_io_start(void)
 164 {
 165         if (hdpro_io_active)
 166                 return 0;
 167
 168         hdpro_io_active = 0;
 169
 170         suspend_intr();
 171
 172         // HD Pro IO start commands sequence
 173         HDPROreg_IO8 = 0x72;
 174         CDVDreg_STATUS = 0;
 175         HDPROreg_IO8 = 0x34;
 176         CDVDreg_STATUS = 0;
 177         HDPROreg_IO8 = 0x61;
 178         CDVDreg_STATUS = 0;
 179         u32 res = HDPROreg_IO8;
 180         CDVDreg_STATUS = 0;
 181
 182         resume_intr();
 183
 184         // check result
 185         if ((res & 0xff) == 0xe7)
 186                 hdpro_io_active = 1;
 187
 188         return hdpro_io_active;
 189 }
 190
 191 static int hdpro_io_finish(void)
 192 {
 193         if (!hdpro_io_active)
 194                 return 0;
 195
 196         suspend_intr();
 197
 198         // HD Pro IO finish commands sequence
 199         HDPROreg_IO8 = 0xf3;
 200         CDVDreg_STATUS = 0;
 201
 202         resume_intr();
 203
 204         DelayThread(200);
 205
 206         if (HDPROreg_IO32 == 0x401a7800) // check the 1st in ROM0 seg get
 207                 hdpro_io_active = 0;     // back to it's original state
 208
 209         return hdpro_io_active ^ 1;
 210 }
 211
 212 static void hdpro_io_write(u8 cmd, u16 val)
 213 {
 214         suspend_intr();
 215
 216         // IO write to HD Pro
 217         HDPROreg_IO8 = cmd;
 218         CDVDreg_STATUS = 0;
 219         HDPROreg_IO8 = val;
 220         CDVDreg_STATUS = 0;
 221         HDPROreg_IO8 = (val & 0xffff) >> 8;
 222         CDVDreg_STATUS = 0;
 223
 224         resume_intr();
 225 }
 226
 227 static int hdpro_io_read(u8 cmd)
 228 {
 229         suspend_intr();
 230
 231         // IO read from HD Pro
 232         HDPROreg_IO8 = cmd;
 233         CDVDreg_STATUS = 0;
 234         u32 res0 = HDPROreg_IO8;
 235         CDVDreg_STATUS = 0;
 236         u32 res1 = HDPROreg_IO8;
 237         CDVDreg_STATUS = 0;
 238         res0 = (res0 & 0xff) | (res1 << 8);
 239
 240         resume_intr();
 241
 242         return res0 & 0xffff;
 243 }
 244
 245 static int hdpro_io_init(void)
 246 {
 247         suspend_intr();
 248
 249         // HD Pro IO initialization commands sequence
 250         HDPROreg_IO8 = 0x13;
 251         CDVDreg_STATUS = 0;
 252         HDPROreg_IO8 = 0x00;
 253         CDVDreg_STATUS = 0;
 254
 255         resume_intr();
 256
 257         DelayThread(100);
 258
 259         suspend_intr();
 260
 261         HDPROreg_IO8 = 0x13;
 262         CDVDreg_STATUS = 0;
 263         HDPROreg_IO8 = 0x01;
 264         CDVDreg_STATUS = 0;
 265
 266         resume_intr();
 267
 268         DelayThread(3000);
 269
 270         return ata_wait_busy(0x80);
 271 }
 272
 273 int _start(int argc, char *argv[])
 274 {
 275         int res = MODULE_NO_RESIDENT_END;
 276         iop_event_t event;
 277
 278         printf(BANNER, VERSION);
 279
 280         if ((res = RegisterLibraryEntries(&_exp_atad)) != 0) {
 281                 M_PRINTF("Library is already registered, exiting.\n");
 282                 goto out;
 283         }
 284
 285         event.attr = 0;
 286         event.bits = 0;
 287         if ((ata_evflg = CreateEventFlag(&event)) < 0) {
 288                 M_PRINTF("Couldn't create event flag, exiting.\n");
 289                 goto out;
 290         }
 291
 292         hdpro_io_start();
 293
 294         HDPROreg_IO8 = 0xe3;
 295         CDVDreg_STATUS = 0;
 296
 297         if (hdpro_io_init() != 0)
 298                 goto out;
 299
 300         if (ata_init_devices(atad_devinfo) != 0)
 301                 goto out;
 302
 303         res = MODULE_RESIDENT_END;
 304         M_PRINTF("Driver loaded.\n");
 305
 306 out:
 307         hdpro_io_finish();
 308         return res;
 309 }
 310
 311 int shutdown(void)
 312 {
 313         ata_device_flush_cache(0);
 314         hdpro_io_finish();
 315
 316         return 0;
 317 }
 318
 319 /* Export 8 */
 320 int ata_get_error()
 321 {
 322         return hdpro_io_read(ATAreg_ERROR_RD) & 0xff;
 323 }
 324
 325 /* 0x80 for busy, 0x88 for bus busy.  */
 326 static int ata_wait_busy(int bits)
 327 {
 328         int i, didx, delay;
 329         int res = 0;
 330
 331         for (i = 0; i < 80; i++) {
 332
 333                 hdpro_io_start();
 334
 335                 u16 r_control = hdpro_io_read(ATAreg_CONTROL_RD);
 336
 337                 hdpro_io_finish();
 338
 339                 if (!((r_control & 0xffff) & bits))
 340                         goto out;
 341
 342                 didx = i / 10;
 343                 switch (didx) {
 344                         case 0:
 345                                 continue;
 346                         case 1:
 347                                 delay = 100;
 348                                 break;
 349                         case 2:
 350                                 delay = 1000;
 351                                 break;
 352                         case 3:
 353                                 delay = 10000;
 354                                 break;
 355                         case 4:
 356                                 delay = 100000;
 357                                 break;
 358                         default:
 359                                 delay = 1000000;
 360
 361                 }
 362
 363                 DelayThread(delay);
 364         }
 365
 366         res = -502;
 367         M_PRINTF("Timeout while waiting on busy (0x%02x).\n", bits);
 368
 369 out:
 370         hdpro_io_start();
 371
 372         return res;
 373 }
 374
 375 static int ata_device_select(int device)
 376 {
 377         int res;
 378
 379         if ((res = ata_wait_busy(0x88)) < 0)
 380                 return res;
 381
 382         /* If the device was already selected, nothing to do.  */
 383         if (((hdpro_io_read(ATAreg_SELECT_RD) >> 4) & 1) == device)
 384                 return 0;
 385
 386         /* Select the device.  */
 387         hdpro_io_write(ATAreg_SELECT_WR, (device & 1) << 4);
 388         res = hdpro_io_read(ATAreg_CONTROL_RD);
 389
 390         return ata_wait_busy(0x88);
 391 }
 392
 393 /* Export 6 */
 394 int ata_io_start(void *buf, u32 blkcount, u16 feature, u16 nsector, u16 sector,
 395                 u16 lcyl, u16 hcyl, u16 select, u16 command)
 396 {
 397         iop_sys_clock_t cmd_timeout;
 398         ata_cmd_info_t *cmd_table;
 399         int i, res, type, cmd_table_size;
 400         int using_timeout, device = (select >> 4) & 1;
 401         u32 searchcmd;
 402
 403         ClearEventFlag(ata_evflg, 0);
 404
 405         if (!atad_devinfo[device & 1].exists)
 406                 return -505;
 407
 408         if ((res = ata_device_select(device & 1)) != 0)
 409                 return res;
 410
 411         /* For the SCE and SMART commands, we need to search on the subcommand
 412         specified in the feature register.  */
 413         if (command == ATA_C_SCE_SEC_CONTROL) {
 414                 cmd_table = sec_ctrl_cmd_table;
 415                 cmd_table_size = SEC_CTRL_CMD_TABLE_SIZE;
 416                 searchcmd = feature;
 417         } else if (command == ATA_C_SMART) {
 418                 cmd_table = smart_cmd_table;
 419                 cmd_table_size = SMART_CMD_TABLE_SIZE;
 420                 searchcmd = feature;
 421         } else {
 422                 cmd_table = ata_cmd_table;
 423                 cmd_table_size = ATA_CMD_TABLE_SIZE;
 424                 searchcmd = command;
 425         }
 426
 427         type = 0;
 428         for (i = 0; i < cmd_table_size; i++) {
 429                 if ((searchcmd & 0xff) == cmd_table[i].command) {
 430                         type = cmd_table[i].type;
 431                         break;
 432                 }
 433         }
 434
 435         if (!(atad_cmd_state.type = type))
 436                 return -506;
 437
 438         atad_cmd_state.buf = buf;
 439         atad_cmd_state.blkcount = blkcount;
 440
 441         /* Check that the device is ready if this the appropiate command.  */
 442         if (!(hdpro_io_read(ATAreg_CONTROL_RD) & 0x40)) {
 443                 switch (command) {
 444                         case 0x08:
 445                         case 0x90:
 446                         case 0x91:
 447                         case 0xa0:
 448                         case 0xa1:
 449                                 break;
 450                         default:
 451                                 M_PRINTF("Error: Device %d is not ready.\n", device);
 452                                 return -501;
 453                 }
 454         }
 455
 456         /* Does this command need a timeout?  */
 457         using_timeout = 0;
 458         switch (type) {
 459                 case 1:
 460                 case 6:
 461                         using_timeout = 1;
 462                         break;
 463                 case 4:
 464                         /* Modified to include ATA_C_READ_DMA_EXT.  */
 465                         atad_cmd_state.dir = ((command != 0xc8) && (command != 0x25));
 466                         using_timeout = 1;
 467         }
 468
 469         if (using_timeout) {
 470                 cmd_timeout.lo = 0x41eb0000;
 471                 cmd_timeout.hi = 0;
 472
 473                 if ((res = SetAlarm(&cmd_timeout, (void *)ata_alarm_cb, NULL)) < 0)
 474                         return res;
 475         }
 476
 477         /* Enable the command completion interrupt.  */
 478         suspend_intr();
 479         HDPROreg_IO8 = 0x21;
 480         CDVDreg_STATUS = 0;
 481         u32 dummy = HDPROreg_IO8;
 482         CDVDreg_STATUS = 0;
 483         resume_intr();
 484         dummy = 0;
 485
 486         /* Finally!  We send off the ATA command with arguments.  */
 487         hdpro_io_write(ATAreg_CONTROL_WR, (using_timeout == 0) << 1);
 488
 489         /* 48-bit LBA requires writing to the address registers twice,
 490            24 bits of the LBA address is written each time.
 491            Writing to registers twice does not affect 28-bit LBA since
 492            only the latest data stored in address registers is used.  */
 493         hdpro_io_write(ATAreg_FEATURE_WR, (feature & 0xffff) >> 8);
 494         hdpro_io_write(ATAreg_NSECTOR_WR, (nsector & 0xffff) >> 8);
 495         hdpro_io_write(ATAreg_SECTOR_WR, (sector & 0xffff) >> 8);
 496         hdpro_io_write(ATAreg_LCYL_WR, (lcyl & 0xffff) >> 8);
 497         hdpro_io_write(ATAreg_HCYL_WR, (hcyl & 0xffff) >> 8);
 498
 499         hdpro_io_write(ATAreg_FEATURE_WR, feature & 0xff);
 500         hdpro_io_write(ATAreg_NSECTOR_WR, nsector & 0xff);
 501         hdpro_io_write(ATAreg_SECTOR_WR, sector & 0xff);
 502         hdpro_io_write(ATAreg_LCYL_WR, lcyl & 0xff);
 503         hdpro_io_write(ATAreg_HCYL_WR, hcyl & 0xff);
 504
 505         hdpro_io_write(ATAreg_SELECT_WR, select & 0xff);
 506         hdpro_io_write(ATAreg_COMMAND_WR, command & 0xff);
 507
 508         return 0;
 509 }
 510
 511 /* Do a PIO transfer, to or from the device.  */
 512 static int ata_pio_transfer(ata_cmd_state_t *cmd_state)
 513 {
 514         void *buf;
 515         int i, type;
 516         int res = 0, chk = 0;
 517         u16 status = hdpro_io_read(ATAreg_STATUS_RD);
 518
 519         if (status & ATA_STAT_ERR) {
 520                 M_PRINTF("Error: Command error: status 0x%02x, error 0x%02x.\n",
 521                                 status, ata_get_error());
 522                 return -503;
 523         }
 524
 525         /* DRQ must be set (data request).  */
 526         if (!(status & ATA_STAT_DRQ))
 527                 return -504;
 528
 529         type = cmd_state->type;
 530
 531         if (type == 3 || type == 8) {
 532                 /* PIO data out */
 533                 buf = cmd_state->buf;
 534
 535                 HDPROreg_IO8 = 0x43;
 536                 CDVDreg_STATUS = 0;
 537
 538                 for (i = 0; i < 256; i++) {
 539                         u16 r_data = *(u16 *)buf;
 540                         hdpro_io_write(ATAreg_DATA_WR, r_data);
 541                         chk ^= r_data + i;
 542                         cmd_state->buf = ++((u16 *)buf);
 543                 }
 544
 545                 u16 out = hdpro_io_read(ATAreg_DATA_RD) & 0xffff;
 546                 if (out != (chk & 0xffff))
 547                         return -504;
 548
 549                 if (cmd_state->type == 8) {
 550                         for (i = 0; i < 4; i++) {
 551                                 hdpro_io_write(ATAreg_DATA_WR, *(u8 *)buf);
 552                                 cmd_state->buf = ++((u8 *)buf);
 553                         }
 554                 }
 555
 556         } else if (type == 2) {
 557                 /* PIO data in  */
 558                 buf = cmd_state->buf;
 559
 560                 suspend_intr();
 561
 562                 HDPROreg_IO8 = 0x53;
 563                 CDVDreg_STATUS = 0;
 564                 CDVDreg_STATUS = 0;
 565
 566                 for (i = 0; i < 256; i++) {
 567
 568                         u32 res0 = HDPROreg_IO8;
 569                         CDVDreg_STATUS = 0;
 570                         u32 res1 = HDPROreg_IO8;
 571                         CDVDreg_STATUS = 0;
 572
 573                         res0 = (res0 & 0xff) | (res1 << 8);
 574                         chk ^= res0 + i;
 575
 576                         *(u16 *)buf = res0 & 0xffff;
 577                         cmd_state->buf = ++((u16 *)buf);
 578                 }
 579
 580                 HDPROreg_IO8 = 0x51;
 581                 CDVDreg_STATUS = 0;
 582                 CDVDreg_STATUS = 0;
 583
 584                 resume_intr();
 585
 586                 u16 r_data = hdpro_io_read(ATAreg_DATA_RD) & 0xffff;
 587                 if (r_data != (chk & 0xffff))
 588                         return -504;
 589         }
 590
 591         return res;
 592 }
 593
 594 /* Export 5 */
 595 /* Not sure if it's reset, but it disables ATA interrupts.  */
 596 int ata_reset_devices()
 597 {
 598         if (hdpro_io_read(ATAreg_CONTROL_RD) & 0x80)
 599                 return -501;
 600
 601         /* Dunno what this does.  */
 602         hdpro_io_write(ATAreg_CONTROL_WR, 6);
 603         DelayThread(100);
 604
 605         /* Disable ATA interrupts.  */
 606         hdpro_io_write(ATAreg_CONTROL_WR, 2);
 607         DelayThread(3000);
 608
 609         return ata_wait_busy(0x80);
 610 }
 611
 612 static void ata_device_probe(ata_devinfo_t *devinfo)
 613 {
 614         u16 nsector, sector, lcyl, hcyl, select;
 615
 616         devinfo->exists = 0;
 617         devinfo->has_packet = 0;
 618
 619         if (hdpro_io_read(ATAreg_CONTROL_RD) & 0x88)
 620                 return;
 621
 622         nsector = hdpro_io_read(ATAreg_NSECTOR_RD) & 0xff;
 623         sector = hdpro_io_read(ATAreg_SECTOR_RD) & 0xff;
 624         lcyl = hdpro_io_read(ATAreg_LCYL_RD) & 0xff;
 625         hcyl = hdpro_io_read(ATAreg_HCYL_RD) & 0xff;
 626         select = hdpro_io_read(ATAreg_SELECT_RD) & 0xff;
 627
 628         if (nsector != 1)
 629                 return;
 630
 631         devinfo->exists = 1;
 632
 633         if ((lcyl == 0x14) && (hcyl == 0xeb))
 634                 devinfo->has_packet = 1;
 635 }
 636
 637 /* Export 17 */
 638 int ata_device_flush_cache(int device)
 639 {
 640         int res;
 641
 642         if (!hdpro_io_start())
 643                 return -1;
 644
 645         if (lba_48bit[device]) {
 646                 res = ata_io_start(NULL, 1, 0, 0, 0, 0, 0, (device << 4) & 0xffff,
 647                                 ATA_C_FLUSH_CACHE_EXT);
 648         } else {
 649                 res = ata_io_start(NULL, 1, 0, 0, 0, 0, 0, (device << 4) & 0xffff,
 650                                 ATA_C_FLUSH_CACHE);
 651         }
 652         if (!res)
 653                 res = ata_io_finish();
 654
 655         if (!hdpro_io_finish())
 656                 return -2;
 657
 658         return res;
 659 }
 660
 661 /* Export 13 */
 662 int ata_device_idle(int device, int period)
 663 {
 664         int res;
 665
 666         res = ata_io_start(NULL, 1, 0, period & 0xff, 0, 0, 0,
 667                         (device << 4) & 0xffff, ATA_C_IDLE);
 668         if (res)
 669                 return res;
 670
 671         return ata_io_finish();
 672 }
 673
 674 /* Set features - set transfer mode.  */
 675 int ata_device_set_transfer_mode(int device, int type, int mode)
 676 {
 677         int res;
 678
 679         res = ata_io_start(NULL, 1, 3, (type|mode) & 0xff, 0, 0, 0,
 680                         (device << 4) & 0xffff, ATA_C_SET_FEATURES);
 681         if (res)
 682                 return res;
 683
 684         res = ata_io_finish();
 685         if (res)
 686                 return res;
 687
 688         return 0;
 689 }
 690
 691 static int ata_device_identify(int device, void *info)
 692 {
 693         int res;
 694
 695         res = ata_io_start(info, 1, 0, 0, 0, 0, 0, (device << 4) & 0xffff,
 696                         ATA_C_IDENTIFY_DEVICE);
 697         if (res)
 698                 return res;
 699
 700         return ata_io_finish();
 701 }
 702
 703 static int ata_init_devices(ata_devinfo_t *devinfo)
 704 {
 705         int i, res;
 706
 707         ata_reset_devices();
 708
 709         ata_device_probe(&devinfo[0]);
 710         if (!devinfo[0].exists) {
 711                 M_PRINTF("Error: Unable to detect HDD 0.\n");
 712                 devinfo[1].exists = 0;
 713                 return 0;
 714         }
 715
 716         /* If there is a device 1, grab it's info too.  */
 717         if ((res = ata_device_select(1)) != 0)
 718                 return res;
 719         if (hdpro_io_read(ATAreg_CONTROL_RD) & 0xff)
 720                 ata_device_probe(&devinfo[1]);
 721         else
 722                 devinfo[1].exists = 0;
 723
 724         for (i = 0; i < 2; i++) {
 725                 if (!devinfo[i].exists)
 726                         continue;
 727
 728                 /* Send the IDENTIFY DEVICE command. if it doesn't succeed
 729                    devinfo is disabled.  */
 730                 if (!devinfo[i].has_packet) {
 731                         res = ata_device_identify(i, ata_param);
 732                         devinfo[i].exists = (res == 0);
 733                 }
 734
 735                 /* This next section is HDD-specific: if no device or it's a
 736                    packet (ATAPI) device, we're done.  */
 737                 if (!devinfo[i].exists || devinfo[i].has_packet)
 738                         continue;
 739
 740                 /* This section is to detect whether the HDD supports 48-bit LBA
 741                    (IDENITFY DEVICE bit 10 word 83) and get the total sectors from
 742                    either words(61:60) for 28-bit or words(103:100) for 48-bit.  */
 743                 if (ata_param[ATA_ID_COMMAND_SETS_SUPPORTED] & 0x0400) {
 744                         lba_48bit[i] = 1;
 745                         /* I don't think anyone would use a >2TB HDD but just in case.  */
 746                         if (ata_param[ATA_ID_48BIT_SECTOTAL_HI]) {
 747                                 devinfo[i].total_sectors = 0xffffffff;
 748                         } else {
 749                                 devinfo[i].total_sectors =
 750                                         (ata_param[ATA_ID_48BIT_SECTOTAL_MI] << 16)|
 751                                         ata_param[ATA_ID_48BIT_SECTOTAL_LO];
 752                         }
 753                 } else {
 754                         lba_48bit[i] = 0;
 755                         devinfo[i].total_sectors = (ata_param[ATA_ID_SECTOTAL_HI] << 16)|
 756                                 ata_param[ATA_ID_SECTOTAL_LO];
 757                 }
 758                 devinfo[i].security_status = ata_param[ATA_ID_SECURITY_STATUS];
 759
 760                 ata_device_set_transfer_mode(i, 8, 0); /* PIO (flow control).  */
 761                 ata_device_idle(i, 0);
 762         }
 763         return 0;
 764 }
 765
 766 /* Export 7 */
 767 int ata_io_finish(void)
 768 {
 769         ata_cmd_state_t *cmd_state = &atad_cmd_state;
 770         u32 bits;
 771         int res = 0, type = cmd_state->type;
 772         u16 stat;
 773
 774         if (type == 1 || type == 6) {   /* Non-data commands.  */
 775
 776 retry:
 777                 suspend_intr();
 778
 779                 HDPROreg_IO8 = 0x21;
 780                 CDVDreg_STATUS = 0;
 781                 u32 ret = HDPROreg_IO8;
 782                 CDVDreg_STATUS = 0;
 783
 784                 resume_intr();
 785
 786                 if (((ret & 0xff) & 1) == 0) {
 787
 788                         WaitEventFlag(ata_evflg, 0x03, 0x11, &bits);
 789                         if (bits & 0x01) {      /* Timeout.  */
 790                                 M_PRINTF("Error: ATA timeout on a non-data command.\n");
 791                                 return -502;
 792                         }
 793
 794                         DelayThread(500);
 795                         goto retry;
 796                 }
 797
 798         } else if (type == 4) {         /* DMA.  */
 799                         M_PRINTF("Error: DMA mode not implemented.\n");
 800                         res = -502;
 801         } else {                        /* PIO transfers.  */
 802                 stat = hdpro_io_read(ATAreg_CONTROL_RD);
 803                 if ((res = ata_wait_busy(0x80)) < 0)
 804                         goto finish;
 805
 806                 /* Transfer each PIO data block.  */
 807                 while (--cmd_state->blkcount != -1) {
 808                         if ((res = ata_pio_transfer(cmd_state)) < 0)
 809                                 goto finish;
 810                         if ((res = ata_wait_busy(0x80)) < 0)
 811                                 goto finish;
 812                 }
 813         }
 814
 815         if (res)
 816                 goto finish;
 817
 818         /* Wait until the device isn't busy.  */
 819         if (hdpro_io_read(ATAreg_STATUS_RD) & ATA_STAT_BUSY)
 820                 res = ata_wait_busy(0x80);
 821         if ((stat = hdpro_io_read(ATAreg_STATUS_RD)) & ATA_STAT_ERR) {
 822                 M_PRINTF("Error: Command error: status 0x%02x, error 0x%02x.\n",
 823                                 stat, ata_get_error());
 824                 res = -503;
 825         }
 826
 827 finish:
 828         /* The command has completed (with an error or not), so clean things up.  */
 829         CancelAlarm((void *)ata_alarm_cb, NULL);
 830
 831         return res;
 832 }
 833
 834 /* Export 9 */
 835 int ata_device_dma_transfer(int device, void *buf, u32 lba, u32 nsectors, int dir)
 836 {
 837         int res = 0;
 838         u32 nbytes;
 839         u16 sector, lcyl, hcyl, select, command, len;
 840
 841         if (!hdpro_io_start())
 842                 return -1;
 843
 844         while (nsectors) {
 845                 len = (nsectors > 256) ? 256 : nsectors;
 846
 847                 /* Variable lba is only 32 bits so no change for lcyl and hcyl.  */
 848                 lcyl = (lba >> 8) & 0xff;
 849                 hcyl = (lba >> 16) & 0xff;
 850
 851                 if (lba_48bit[device]) {
 852                         /* Setup for 48-bit LBA.  */
 853                         /* Combine bits 24-31 and bits 0-7 of lba into sector.  */
 854                         sector = ((lba >> 16) & 0xff00) | (lba & 0xff);
 855                         /* 0x40 enables LBA.  */
 856                         select = ((device << 4) | 0x40) & 0xffff;
 857                         command = (dir == 1) ? ATA_C_WRITE_PIO_EXT : ATA_C_READ_PIO_EXT;
 858                 } else {
 859                         /* Setup for 28-bit LBA.  */
 860                         sector = lba & 0xff;
 861                         /* 0x40 enables LBA.  */
 862                         select = ((device << 4) | ((lba >> 24) & 0xf) | 0x40) & 0xffff;
 863                         command = (dir == 1) ? ATA_C_WRITE_PIO : ATA_C_READ_PIO;
 864                 }
 865
 866                 if ((res = ata_io_start(buf, len, 0, len, sector, lcyl,
 867                                         hcyl, select, command)) != 0)
 868                         continue;
 869                 if ((res = ata_io_finish()) != 0)
 870                         continue;
 871
 872                 nbytes = len * 512;
 873                 (u8 *)buf += nbytes;
 874                 lba += len;
 875                 nsectors -= len;
 876         }
 877
 878         if (!hdpro_io_finish())
 879                 return -2;
 880
 881         return res;
 882 }
 883
 884 /* Export 4 */
 885 ata_devinfo_t * ata_get_devinfo(int device)
 886 {
 887         return &atad_devinfo[device];
 888 }
 889
 890 /* Export 19 */
 891 int ata_device_is_48bit(int device)
 892 {
 893         return lba_48bit[device];
 894 }
 895