Disabling auto-refresh of game list by default, as it is causing bugs sometimes
[open-ps2-loader.git] / modules / iopcore / cdvdman / atad.c
blobd99be0a7f02b11a0621eb7930c9cc5770a32d236
1 /*
2 # _____ ___ ____ ___ ____
3 # ____| | ____| | | |____|
4 # | ___| |____ ___| ____| | \ PS2DEV Open Source Project.
5 #-----------------------------------------------------------------------
6 # Copyright (c) 2003 Marcus R. Brown <mrbrown@0xd6.org>
7 # Licenced under Academic Free License version 2.0
8 # Review ps2sdk README & LICENSE files for further details.
10 # $Id: ps2atad.c 1455 2007-11-04 23:46:27Z roman_ps2dev $
11 # ATA device driver.
12 # This module provides the low-level ATA support for hard disk drives. It is
13 # 100% compatible with its proprietary counterpart called atad.irx.
15 # This module also include support for 48-bit feature set (done by Clement).
18 #include <types.h>
19 #include <defs.h>
20 #include <irx.h>
21 #include <loadcore.h>
22 #include <thbase.h>
23 #include <thevent.h>
24 #include <stdio.h>
25 #include <sysclib.h>
26 #include "dev9.h"
27 #include "atad.h"
29 #include <speedregs.h>
30 #include <atahw.h>
32 //#define NETLOG_DEBUG
34 #ifdef NETLOG_DEBUG
35 // !!! netlog exports functions pointers !!!
36 extern int (*pNetlogSend)(const char *format, ...);
37 extern int netlog_inited;
38 #endif
40 #ifdef DEV9_DEBUG
41 #define M_PRINTF(format, args...) \
42 printf(MODNAME ": " format, ## args)
43 #else
44 #define M_PRINTF(format, args...) \
45 do {} while (0)
46 #endif
48 #define BANNER "ATA device driver %s - Copyright (c) 2003 Marcus R. Brown\n"
49 #define VERSION "v1.1"
51 extern int lba_48bit;
53 static int ata_evflg = -1;
55 #ifdef VMC_DRIVER
56 #include <thsemap.h>
58 static int io_sema = -1;
60 #define WAITIOSEMA(x) WaitSema(x)
61 #define SIGNALIOSEMA(x) SignalSema(x)
62 #define ATAWRITE 1
63 #else
64 #define WAITIOSEMA(x)
65 #define SIGNALIOSEMA(x)
66 #define ATAWRITE 0
67 #endif
69 /* Local device info. */
70 static ata_devinfo_t atad_devinfo;
72 /* ATA command info. */
73 typedef struct _ata_cmd_info {
74 u8 command;
75 u8 type;
76 } ata_cmd_info_t;
78 static ata_cmd_info_t ata_cmd_table[] = {
79 {0xc8, 0x04}, {0xec, 0x02}, {0xa1, 0x02}, {0xb0, 0x07}, {0xef, 0x01}, {0x25, 0x04}, {0xca, 0x04}, {0xe3, 0x01}, {0x35, 0x04}
81 #define ATA_CMD_TABLE_SIZE (sizeof ata_cmd_table/sizeof(ata_cmd_info_t))
83 static ata_cmd_info_t smart_cmd_table[] = {
84 {0xd8, 0x01}
86 #define SMART_CMD_TABLE_SIZE (sizeof smart_cmd_table/sizeof(ata_cmd_info_t))
88 /* This is the state info tracked between ata_io_start() and ata_io_finish(). */
89 typedef struct _ata_cmd_state {
90 int type; /* The ata_cmd_info_t type field. */
91 void *buf;
92 u32 blkcount; /* The number of 512-byte blocks (sectors) to transfer. */
93 int dir; /* DMA direction: 0 - to RAM, 1 - from RAM. */
94 } ata_cmd_state_t;
96 static ata_cmd_state_t atad_cmd_state;
98 static int ata_intr_cb(int flag);
99 static u32 ata_alarm_cb(void *unused);
101 static void ata_dma_set_dir(int dir);
103 int atad_start(void)
105 USE_SPD_REGS;
106 iop_event_t event;
107 int res = 1;
109 M_PRINTF(BANNER, VERSION);
111 if (!(SPD_REG16(SPD_R_REV_3) & SPD_CAPS_ATA) || !(SPD_REG16(SPD_R_REV_8) & 0x02)) {
112 M_PRINTF("HDD is not connected, exiting.\n");
113 goto out;
116 event.attr = 0;
117 event.bits = 0;
118 if ((ata_evflg = CreateEventFlag(&event)) < 0) {
119 M_PRINTF("Couldn't create event flag, exiting.\n");
120 res = 1;
121 goto out;
124 dev9RegisterIntrCb(1, ata_intr_cb);
125 dev9RegisterIntrCb(0, ata_intr_cb);
127 #ifdef VMC_DRIVER
128 iop_sema_t smp;
129 smp.initial = 1;
130 smp.max = 1;
131 smp.option = 0;
132 smp.attr = 1;
133 io_sema = CreateSema(&smp);
134 #endif
136 res = 0;
137 M_PRINTF("Driver loaded.\n");
138 out:
139 return res;
142 static int ata_intr_cb(int flag)
144 if (flag != 1) { /* New card, invalidate device info. */
145 dev9IntrDisable(SPD_INTR_ATA);
146 iSetEventFlag(ata_evflg, 0x02);
149 return 1;
152 static u32 ata_alarm_cb(void *unused)
154 iSetEventFlag(ata_evflg, 0x01);
155 return 0;
158 /* Export 8 */
159 int ata_get_error()
161 USE_ATA_REGS;
162 return ata_hwport->r_error & 0xff;
165 /* 0x80 for busy, 0x88 for bus busy. */
166 static int ata_wait_busy(int bits)
168 USE_ATA_REGS;
169 int i, didx, delay;
171 for (i = 0; i < 80; i++) {
172 if (!(ata_hwport->r_control & bits))
173 return 0;
175 didx = i / 10;
176 switch (didx) {
177 case 0:
178 continue;
179 case 1:
180 delay = 100;
181 break;
182 case 2:
183 delay = 1000;
184 break;
185 case 3:
186 delay = 10000;
187 break;
188 case 4:
189 delay = 100000;
190 break;
191 default:
192 delay = 1000000;
195 DelayThread(delay);
198 M_PRINTF("Timeout while waiting on busy (0x%02x).\n", bits);
199 return -502;
202 static int ata_device_select(int device)
204 USE_ATA_REGS;
205 int res;
207 if ((res = ata_wait_busy(0x88)) < 0)
208 return res;
210 /* If the device was already selected, nothing to do. */
211 if (((ata_hwport->r_select >> 4) & 1) == device)
212 return 0;
214 /* Select the device. */
215 ata_hwport->r_select = (device & 1) << 4;
216 res = ata_hwport->r_control;
218 return ata_wait_busy(0x88);
221 /* Export 6 */
222 int ata_io_start(void *buf, u32 blkcount, u16 feature, u16 nsector, u16 sector,
223 u16 lcyl, u16 hcyl, u16 select, u16 command)
225 USE_ATA_REGS;
226 USE_SPD_REGS;
227 iop_sys_clock_t cmd_timeout;
228 ata_cmd_info_t *cmd_table;
229 int i, res, type, cmd_table_size;
230 int using_timeout, device = (select >> 4) & 1;
231 u8 searchcmd;
233 ClearEventFlag(ata_evflg, 0);
235 if ((res = ata_device_select(device)) != 0)
236 return res;
238 /* For the SCE and SMART commands, we need to search on the subcommand
239 specified in the feature register. */
240 if ((command & 0xffff) == ATA_C_SMART) {
241 cmd_table = smart_cmd_table;
242 cmd_table_size = SMART_CMD_TABLE_SIZE;
243 searchcmd = feature;
244 } else {
245 cmd_table = ata_cmd_table;
246 cmd_table_size = ATA_CMD_TABLE_SIZE;
247 searchcmd = command;
250 type = 0;
251 for (i = 0; i < cmd_table_size; i++) {
252 if ((searchcmd & 0xff) == cmd_table[i].command) {
253 type = cmd_table[i].type;
254 break;
258 if (!(atad_cmd_state.type = type))
259 return -506;
261 atad_cmd_state.buf = buf;
262 atad_cmd_state.blkcount = blkcount;
264 /* Check that the device is ready if this the appropiate command. */
265 if (!(ata_hwport->r_control & 0x40)) {
266 switch (command) {
267 case 0x08:
268 case 0x90:
269 case 0x91:
270 case 0xa0:
271 case 0xa1:
272 break;
273 default:
274 M_PRINTF("Error: Device %d is not ready.\n", device);
275 return -501;
279 /* Does this command need a timeout? */
280 using_timeout = 0;
281 switch (type) {
282 case 1:
283 case 6:
284 using_timeout = 1;
285 break;
286 case 4:
287 #ifdef VMC_DRIVER
288 atad_cmd_state.dir = ((command != 0xc8) && (command != 0x25));
289 #else
290 atad_cmd_state.dir = ATA_DIR_READ;
291 #endif
292 using_timeout = 1;
295 if (using_timeout) {
296 cmd_timeout.lo = 0x41eb0000;
297 cmd_timeout.hi = 0;
299 if ((res = SetAlarm(&cmd_timeout, (void *)ata_alarm_cb, NULL)) < 0)
300 return res;
303 /* Enable the command completion interrupt. */
304 if (type == 1)
305 dev9IntrEnable(SPD_INTR_ATA0);
307 /* Finally! We send off the ATA command with arguments. */
308 ata_hwport->r_control = (using_timeout == 0) << 1;
310 /* 48-bit LBA requires writing to the address registers twice,
311 24 bits of the LBA address is written each time.
312 Writing to registers twice does not affect 28-bit LBA since
313 only the latest data stored in address registers is used. */
314 ata_hwport->r_feature = (feature >> 8) & 0xff;
315 ata_hwport->r_nsector = (nsector >> 8) & 0xff;
316 ata_hwport->r_sector = (sector >> 8) & 0xff;
317 ata_hwport->r_lcyl = (lcyl >> 8) & 0xff;
318 ata_hwport->r_hcyl = (hcyl >> 8) & 0xff;
320 ata_hwport->r_feature = feature & 0xff;
321 ata_hwport->r_nsector = nsector & 0xff;
322 ata_hwport->r_sector = sector & 0xff;
323 ata_hwport->r_lcyl = lcyl & 0xff;
324 ata_hwport->r_hcyl = hcyl & 0xff;
325 ata_hwport->r_select = select & 0xff;
326 ata_hwport->r_command = command & 0xff;
328 /* Turn on the LED. */
329 SPD_REG8(SPD_R_PIO_DIR) = 1;
330 SPD_REG8(SPD_R_PIO_DATA) = 0;
332 return 0;
335 /* Do a PIO transfer, to or from the device. */
336 static int ata_pio_transfer(ata_cmd_state_t *cmd_state)
338 USE_SPD_REGS;
339 SPD_REG8(SPD_R_PIO_DATA) = 0;
340 return 0;
342 USE_ATA_REGS;
343 void *buf;
344 int i, type;
345 u16 status = ata_hwport->r_status & 0xff;
347 if (status & ATA_STAT_ERR) {
348 M_PRINTF("Error: Command error: status 0x%02x, error 0x%02x.\n",
349 status, ata_get_error());
350 return -503;
353 /* DRQ must be set (data request). */
354 if (!(status & ATA_STAT_DRQ))
355 return -504;
357 type = cmd_state->type;
359 if (type == 3 || type == 8) {
360 /* PIO data out */
361 buf = cmd_state->buf;
362 for (i = 0; i < 256; i++) {
363 ata_hwport->r_data = *(u16 *)buf;
364 cmd_state->buf = ++((u16 *)buf);
366 if (cmd_state->type == 8) {
367 for (i = 0; i < 4; i++) {
368 ata_hwport->r_data = *(u8 *)buf;
369 cmd_state->buf = ++((u8 *)buf);
372 } else if (type == 2) {
373 /* PIO data in */
374 buf = cmd_state->buf;
375 for (i = 0; i < 256; i++) {
376 *(u16 *)buf = ata_hwport->r_data;
377 cmd_state->buf = ++((u16 *)buf);
381 return 0;
384 /* Complete a DMA transfer, to or from the device. */
385 static int ata_dma_complete(void *buf, int blkcount, int dir)
387 USE_ATA_REGS;
388 USE_SPD_REGS;
389 u32 bits, count, nbytes;
390 int i, res;
391 u16 dma_stat;
393 while (blkcount) {
394 for (i = 0; i < 20; i++)
395 if ((dma_stat = SPD_REG16(0x38) & 0x1f))
396 goto next_transfer;
398 if (dma_stat)
399 goto next_transfer;
401 dev9IntrEnable(SPD_INTR_ATA);
402 /* Wait for the previous transfer to complete or a timeout. */
403 WaitEventFlag(ata_evflg, 0x03, 0x11, &bits);
405 if (bits & 0x01) { /* Timeout. */
406 M_PRINTF("Error: DMA timeout.\n");
407 return -502;
409 /* No DMA completion bit? Spurious interrupt. */
410 if (!(SPD_REG16(SPD_R_INTR_STAT) & 0x02)) {
411 if (ata_hwport->r_control & 0x01) {
412 M_PRINTF("Error: Command error while doing DMA.\n");
413 M_PRINTF("Error: Command error status 0x%02x, error 0x%02x.\n",
414 ata_hwport->r_status, ata_get_error());
415 #ifdef NETLOG_DEBUG
416 pNetlogSend("Error: Command error status 0x%02x, error 0x%02x.\n",
417 ata_hwport->r_status, ata_get_error());
418 #endif
419 return -503;
420 } else {
421 M_PRINTF("Warning: Got command interrupt, but not an error.\n");
422 continue;
426 dma_stat = SPD_REG16(0x38) & 0x1f;
428 next_transfer:
429 count = (blkcount < dma_stat) ? blkcount : dma_stat;
430 nbytes = count * 512;
431 if ((res = dev9DmaTransfer(0, buf, (nbytes << 9)|32, dir)) < 0)
432 return res;
434 (u8 *)buf += nbytes;
435 blkcount -= count;
438 return 0;
441 /* Export 7 */
442 int ata_io_finish()
444 USE_SPD_REGS;
445 USE_ATA_REGS;
446 ata_cmd_state_t *cmd_state = &atad_cmd_state;
447 u32 bits;
448 int i, res = 0, type = cmd_state->type;
449 u16 stat;
451 if (type == 1 || type == 6) { /* Non-data commands. */
452 WaitEventFlag(ata_evflg, 0x03, 0x11, &bits);
453 if (bits & 0x01) { /* Timeout. */
454 M_PRINTF("Error: ATA timeout on a non-data command.\n");
455 return -502;
457 } else if (type == 4) { /* DMA. */
458 if ((res = ata_dma_complete(cmd_state->buf, cmd_state->blkcount,
459 cmd_state->dir)) < 0)
460 goto finish;
462 for (i = 0; i < 100; i++)
463 if ((stat = SPD_REG16(SPD_R_INTR_STAT) & 0x01))
464 break;
465 if (!stat) {
466 dev9IntrEnable(SPD_INTR_ATA0);
467 WaitEventFlag(ata_evflg, 0x03, 0x11, &bits);
468 if (bits & 0x01) {
469 M_PRINTF("Error: ATA timeout on DMA completion.\n");
470 res = -502;
473 } else { /* PIO transfers. */
474 stat = ata_hwport->r_control;
475 if ((res = ata_wait_busy(0x80)) < 0)
476 goto finish;
478 /* Transfer each PIO data block. */
479 while (--cmd_state->blkcount != -1) {
480 if ((res = ata_pio_transfer(cmd_state)) < 0)
481 goto finish;
482 if ((res = ata_wait_busy(0x80)) < 0)
483 goto finish;
487 if (res)
488 goto finish;
490 /* Wait until the device isn't busy. */
491 if (ata_hwport->r_status & ATA_STAT_BUSY)
492 res = ata_wait_busy(0x80);
493 if ((stat = ata_hwport->r_status) & ATA_STAT_ERR) {
494 M_PRINTF("Error: Command error: status 0x%02x, error 0x%02x.\n",
495 stat, ata_get_error());
496 res = -503;
499 finish:
500 /* The command has completed (with an error or not), so clean things up. */
501 CancelAlarm((void *)ata_alarm_cb, NULL);
502 /* Turn off the LED. */
503 SPD_REG8(SPD_R_PIO_DIR) = 1;
504 SPD_REG8(SPD_R_PIO_DATA) = 1;
506 return res;
509 /* Export 9 */
510 int ata_device_dma_transfer(int device, void *buf, u32 lba, u32 nsectors, int dir)
512 int res = 0;
513 u32 nbytes;
514 u16 sector, lcyl, hcyl, select, command, len;
516 WAITIOSEMA(io_sema);
518 while (nsectors) {
519 len = (nsectors > 256) ? 256 : nsectors;
521 ata_dma_set_dir(dir);
523 /* Variable lba is only 32 bits so no change for lcyl and hcyl. */
524 lcyl = (lba >> 8) & 0xff;
525 hcyl = (lba >> 16) & 0xff;
527 if (lba_48bit) {
528 /* Setup for 48-bit LBA. */
529 /* Combine bits 24-31 and bits 0-7 of lba into sector. */
530 sector = ((lba >> 16) & 0xff00) | (lba & 0xff);
531 /* 0x40 enables LBA. */
532 select = ((device << 4) | 0x40) & 0xffff;
533 command = ((dir == 1)&&(ATAWRITE)) ? ATA_C_WRITE_DMA_EXT : ATA_C_READ_DMA_EXT;
534 } else {
535 /* Setup for 28-bit LBA. */
536 sector = lba & 0xff;
537 /* 0x40 enables LBA. */
538 select = ((device << 4) | ((lba >> 24) & 0xf) | 0x40) & 0xffff;
539 command = ((dir == 1)&&(ATAWRITE)) ? ATA_C_WRITE_DMA : ATA_C_READ_DMA;
542 if ((res = ata_io_start(buf, len, 0, len, sector, lcyl,
543 hcyl, select, command)) != 0) {
544 SIGNALIOSEMA(io_sema);
545 return res;
547 if ((res = ata_io_finish()) != 0) {
548 SIGNALIOSEMA(io_sema);
549 return res;
552 nbytes = len * 512;
553 (u8 *)buf += nbytes;
554 lba += len;
555 nsectors -= len;
558 SIGNALIOSEMA(io_sema);
560 return res;
563 /* Export 4 */
564 ata_devinfo_t * ata_get_devinfo(int device)
566 return &atad_devinfo;
569 static void ata_dma_set_dir(int dir)
571 USE_SPD_REGS;
572 u16 val;
574 SPD_REG16(0x38) = 3;
575 val = SPD_REG16(SPD_R_IF_CTRL) & 1;
576 val |= (dir == 1) ? 0x4c : 0x4e;
577 SPD_REG16(SPD_R_IF_CTRL) = val;
578 SPD_REG16(SPD_R_XFR_CTRL) = dir | 0x86;