modules/iopcore/cdvdman/hdpro_atad.c

   1 /*
   2   Copyright 2011, jimmikaelkael
   3   Licenced under Academic Free License version 3.0
   4   Review Open PS2 Loader README & LICENSE files for further details.
   5
   6   ATA Driver for the HD Pro Kit, based on original ATAD form ps2sdk:
   7
   8   Copyright (c) 2003 Marcus R. Brown <mrbrown@0xd6.org>
   9   Licenced under Academic Free License version 2.0
  10   Review ps2sdk README & LICENSE files for further details.
  11
  12   $Id: ps2atad.c 1455 2007-11-04 23:46:27Z roman_ps2dev $
  13   ATA device driver.
  14 */
  15
  16 #include <loadcore.h>
  17 #include <intrman.h>
  18 #include <thbase.h>
  19 #include <thevent.h>
  20 #include <stdio.h>
  21 #include <sysclib.h>
  22 #include "atad.h"
  23
  24 #include <atahw.h>
  25
  26
  27 #ifdef __IOPCORE_DEBUG
  28 #define M_PRINTF(format, args...)       \
  29         printf(format, ## args)
  30 #else
  31 #define M_PRINTF(format, args...)       \
  32         do {} while (0)
  33 #endif
  34
  35 #define BANNER "ATA device driver for HD Pro Kit %s\n"
  36 #define VERSION "v1.0"
  37
  38
  39 // HD Pro Kit is mapping the 1st word in ROM0 seg as a main ATA controller,
  40 // The pseudo ATA controller registers are accessed (input/ouput) by writing
  41 // an id to the main ATA controller (id specific to HDpro, see registers id below).
  42 #define HDPROreg_IO8          (*(volatile unsigned char *)0xBFC00000)
  43 #define HDPROreg_IO32         (*(volatile unsigned int  *)0xBFC00000)
  44
  45 #define CDVDreg_STATUS        (*(volatile unsigned char *)0xBF40200A)
  46
  47 // Pseudo ATA controller registers id - Output
  48 #define ATAreg_CONTROL_RD       0x68
  49 #define ATAreg_SELECT_RD        0x70
  50 #define ATAreg_STATUS_RD        0xf0
  51 #define ATAreg_ERROR_RD         0x90
  52 #define ATAreg_NSECTOR_RD       0x50
  53 #define ATAreg_SECTOR_RD        0xd0
  54 #define ATAreg_LCYL_RD          0x30
  55 #define ATAreg_HCYL_RD          0xb0
  56 #define ATAreg_DATA_RD          0x41
  57
  58 // Pseudo ATA controller registers id - Input
  59 #define ATAreg_CONTROL_WR       0x6a
  60 #define ATAreg_SELECT_WR        0x72
  61 #define ATAreg_COMMAND_WR       0xf2
  62 #define ATAreg_FEATURE_WR       0x92
  63 #define ATAreg_NSECTOR_WR       0x52
  64 #define ATAreg_SECTOR_WR        0xd2
  65 #define ATAreg_LCYL_WR          0x32
  66 #define ATAreg_HCYL_WR          0xb2
  67 #define ATAreg_DATA_WR          0x12
  68
  69 // HD Pro uses PIO commands for reading/writing from HDD
  70 #define ATA_C_READ_PIO          0x20
  71 #define ATA_C_READ_PIO_EXT      0x24
  72 #define ATA_C_WRITE_PIO         0x30
  73 #define ATA_C_WRITE_PIO_EXT     0x34
  74
  75
  76 static int ata_evflg = -1;
  77
  78 /* Used for indicating 48-bit LBA support.  */
  79 extern int lba_48bit;
  80
  81 #ifdef VMC_DRIVER
  82 #include <thsemap.h>
  83
  84 static int io_sema = -1;
  85
  86 #define WAITIOSEMA(x) WaitSema(x)
  87 #define SIGNALIOSEMA(x) SignalSema(x)
  88 #define ATAWRITE 1
  89 #else
  90 #define WAITIOSEMA(x)
  91 #define SIGNALIOSEMA(x)
  92 #define ATAWRITE 0
  93 #endif
  94
  95 /* Local device info.  */
  96 static ata_devinfo_t atad_devinfo;
  97
  98 /* ATA command info.  */
  99 typedef struct _ata_cmd_info {
 100         u8      command;
 101         u8      type;
 102 } ata_cmd_info_t;
 103
 104 static ata_cmd_info_t ata_cmd_table[] = {
 105         {0xc8, 0x04}, {0xec, 0x02}, {0xa1, 0x02}, {0xb0, 0x07}, {0xef, 0x01}, {0x25, 0x04}, {0xca, 0x04}, {0xe3, 0x01}, {0x35, 0x04},
 106         {0x20, 0x02}, {0x30, 0x03}, {0x24, 0x02}, {0x34, 0x03}
 107 };
 108 #define ATA_CMD_TABLE_SIZE      (sizeof ata_cmd_table/sizeof(ata_cmd_info_t))
 109
 110 static ata_cmd_info_t smart_cmd_table[] = {
 111         {0xd8, 0x01}
 112 };
 113 #define SMART_CMD_TABLE_SIZE    (sizeof smart_cmd_table/sizeof(ata_cmd_info_t))
 114
 115 /* This is the state info tracked between ata_io_start() and ata_io_finish().  */
 116 typedef struct _ata_cmd_state {
 117         int     type;           /* The ata_cmd_info_t type field. */
 118         void    *buf;
 119         u32     blkcount;       /* The number of 512-byte blocks (sectors) to transfer.  */
 120         int     dir;            /* DMA direction: 0 - to RAM, 1 - from RAM.  */
 121 } ata_cmd_state_t;
 122
 123 static ata_cmd_state_t atad_cmd_state;
 124
 125 static int hdpro_io_active = 0;
 126 static int intr_suspended = 0;
 127 static int intr_state;
 128
 129 static int ata_wait_busy(int bits);
 130
 131 static u32 ata_alarm_cb(void *unused)
 132 {
 133         iSetEventFlag(ata_evflg, 0x01);
 134         return 0;
 135 }
 136
 137 static void suspend_intr(void)
 138 {
 139         if (!intr_suspended) {
 140                 CpuSuspendIntr(&intr_state);
 141
 142                 intr_suspended = 1;
 143         }
 144 }
 145
 146 static void resume_intr(void)
 147 {
 148         if (intr_suspended) {
 149                 CpuResumeIntr(intr_state);
 150
 151                 intr_suspended = 0;
 152         }
 153 }
 154
 155 static int hdpro_io_start(void)
 156 {
 157         if (hdpro_io_active)
 158                 return 0;
 159
 160         hdpro_io_active = 0;
 161
 162         suspend_intr();
 163
 164         // HD Pro IO start commands sequence
 165         HDPROreg_IO8 = 0x72;
 166         CDVDreg_STATUS = 0;
 167         HDPROreg_IO8 = 0x34;
 168         CDVDreg_STATUS = 0;
 169         HDPROreg_IO8 = 0x61;
 170         CDVDreg_STATUS = 0;
 171         u32 res = HDPROreg_IO8;
 172         CDVDreg_STATUS = 0;
 173
 174         resume_intr();
 175
 176         // check result
 177         if ((res & 0xff) == 0xe7)
 178                 hdpro_io_active = 1;
 179
 180         return hdpro_io_active;
 181 }
 182
 183 static int hdpro_io_finish(void)
 184 {
 185         if (!hdpro_io_active)
 186                 return 0;
 187
 188         suspend_intr();
 189
 190         // HD Pro IO finish commands sequence
 191         HDPROreg_IO8 = 0xf3;
 192         CDVDreg_STATUS = 0;
 193
 194         resume_intr();
 195
 196         DelayThread(200);
 197
 198         if (HDPROreg_IO32 == 0x401a7800) // check the 1st in ROM0 seg get
 199                 hdpro_io_active = 0;     // back to it's original state
 200
 201         return hdpro_io_active ^ 1;
 202 }
 203
 204 static void hdpro_io_write(u8 cmd, u16 val)
 205 {
 206         suspend_intr();
 207
 208         // IO write to HD Pro
 209         HDPROreg_IO8 = cmd;
 210         CDVDreg_STATUS = 0;
 211         HDPROreg_IO8 = val;
 212         CDVDreg_STATUS = 0;
 213         HDPROreg_IO8 = (val & 0xffff) >> 8;
 214         CDVDreg_STATUS = 0;
 215
 216         resume_intr();
 217 }
 218
 219 static int hdpro_io_read(u8 cmd)
 220 {
 221         suspend_intr();
 222
 223         // IO read from HD Pro
 224         HDPROreg_IO8 = cmd;
 225         CDVDreg_STATUS = 0;
 226         u32 res0 = HDPROreg_IO8;
 227         CDVDreg_STATUS = 0;
 228         u32 res1 = HDPROreg_IO8;
 229         CDVDreg_STATUS = 0;
 230         res0 = (res0 & 0xff) | (res1 << 8);
 231
 232         resume_intr();
 233
 234         return res0 & 0xffff;
 235 }
 236
 237 static int hdpro_io_init(void)
 238 {
 239         suspend_intr();
 240
 241         // HD Pro IO initialization commands sequence
 242         HDPROreg_IO8 = 0x13;
 243         CDVDreg_STATUS = 0;
 244         HDPROreg_IO8 = 0x00;
 245         CDVDreg_STATUS = 0;
 246
 247         resume_intr();
 248
 249         DelayThread(100);
 250
 251         suspend_intr();
 252
 253         HDPROreg_IO8 = 0x13;
 254         CDVDreg_STATUS = 0;
 255         HDPROreg_IO8 = 0x01;
 256         CDVDreg_STATUS = 0;
 257
 258         resume_intr();
 259
 260         DelayThread(3000);
 261
 262         return ata_wait_busy(0x80);
 263 }
 264
 265 int atad_start(void)
 266 {
 267         int res = 1;
 268         iop_event_t event;
 269
 270         M_PRINTF(BANNER, VERSION);
 271
 272         event.attr = 0;
 273         event.bits = 0;
 274         if ((ata_evflg = CreateEventFlag(&event)) < 0) {
 275                 M_PRINTF("Couldn't create event flag, exiting.\n");
 276                 goto out;
 277         }
 278
 279         hdpro_io_start();
 280
 281         HDPROreg_IO8 = 0xe3;
 282         CDVDreg_STATUS = 0;
 283
 284         if (hdpro_io_init() != 0)
 285                 goto out;
 286
 287 #ifdef VMC_DRIVER
 288         iop_sema_t smp;
 289         smp.initial = 1;
 290         smp.max = 1;
 291         smp.option = 0;
 292         smp.attr = 1;
 293         io_sema = CreateSema(&smp);
 294 #endif
 295
 296         res = 0;
 297         M_PRINTF("Driver loaded.\n");
 298
 299 out:
 300         hdpro_io_finish();
 301         return res;
 302 }
 303
 304 /* Export 8 */
 305 int ata_get_error()
 306 {
 307         return hdpro_io_read(ATAreg_ERROR_RD) & 0xff;
 308 }
 309
 310 /* 0x80 for busy, 0x88 for bus busy.  */
 311 static int ata_wait_busy(int bits)
 312 {
 313         int i, didx, delay;
 314         int res = 0;
 315
 316         for (i = 0; i < 80; i++) {
 317
 318                 hdpro_io_start();
 319
 320                 u16 r_control = hdpro_io_read(ATAreg_CONTROL_RD);
 321
 322                 hdpro_io_finish();
 323
 324                 if (!((r_control & 0xffff) & bits))
 325                         goto out;
 326
 327                 didx = i / 10;
 328                 switch (didx) {
 329                         case 0:
 330                                 continue;
 331                         case 1:
 332                                 delay = 100;
 333                                 break;
 334                         case 2:
 335                                 delay = 1000;
 336                                 break;
 337                         case 3:
 338                                 delay = 10000;
 339                                 break;
 340                         case 4:
 341                                 delay = 100000;
 342                                 break;
 343                         default:
 344                                 delay = 1000000;
 345
 346                 }
 347
 348                 DelayThread(delay);
 349         }
 350
 351         res = -502;
 352         M_PRINTF("Timeout while waiting on busy (0x%02x).\n", bits);
 353
 354 out:
 355         hdpro_io_start();
 356
 357         return res;
 358 }
 359
 360 static int ata_device_select(int device)
 361 {
 362         int res;
 363
 364         if ((res = ata_wait_busy(0x88)) < 0)
 365                 return res;
 366
 367         /* If the device was already selected, nothing to do.  */
 368         if (((hdpro_io_read(ATAreg_SELECT_RD) >> 4) & 1) == device)
 369                 return 0;
 370
 371         /* Select the device.  */
 372         hdpro_io_write(ATAreg_SELECT_WR, (device & 1) << 4);
 373         res = hdpro_io_read(ATAreg_CONTROL_RD);
 374
 375         return ata_wait_busy(0x88);
 376 }
 377
 378 /* Export 6 */
 379 int ata_io_start(void *buf, u32 blkcount, u16 feature, u16 nsector, u16 sector,
 380                 u16 lcyl, u16 hcyl, u16 select, u16 command)
 381 {
 382         iop_sys_clock_t cmd_timeout;
 383         ata_cmd_info_t *cmd_table;
 384         int i, res, type, cmd_table_size;
 385         int using_timeout, device = (select >> 4) & 1;
 386         u32 searchcmd;
 387
 388         ClearEventFlag(ata_evflg, 0);
 389
 390         if ((res = ata_device_select(device)) != 0)
 391                 return res;
 392
 393         /* For the SCE and SMART commands, we need to search on the subcommand
 394         specified in the feature register.  */
 395         if (command == ATA_C_SMART) {
 396                 cmd_table = smart_cmd_table;
 397                 cmd_table_size = SMART_CMD_TABLE_SIZE;
 398                 searchcmd = feature;
 399         } else {
 400                 cmd_table = ata_cmd_table;
 401                 cmd_table_size = ATA_CMD_TABLE_SIZE;
 402                 searchcmd = command;
 403         }
 404
 405         type = 0;
 406         for (i = 0; i < cmd_table_size; i++) {
 407                 if ((searchcmd & 0xff) == cmd_table[i].command) {
 408                         type = cmd_table[i].type;
 409                         break;
 410                 }
 411         }
 412
 413         if (!(atad_cmd_state.type = type))
 414                 return -506;
 415
 416         atad_cmd_state.buf = buf;
 417         atad_cmd_state.blkcount = blkcount;
 418
 419         /* Check that the device is ready if this the appropiate command.  */
 420         if (!(hdpro_io_read(ATAreg_CONTROL_RD) & 0x40)) {
 421                 switch (command) {
 422                         case 0x08:
 423                         case 0x90:
 424                         case 0x91:
 425                         case 0xa0:
 426                         case 0xa1:
 427                                 break;
 428                         default:
 429                                 M_PRINTF("Error: Device %d is not ready.\n", device);
 430                                 return -501;
 431                 }
 432         }
 433
 434         /* Does this command need a timeout?  */
 435         using_timeout = 0;
 436         switch (type) {
 437                 case 1:
 438                 case 6:
 439                         using_timeout = 1;
 440                         break;
 441                 case 4:
 442 #ifdef VMC_DRIVER
 443                         atad_cmd_state.dir = ((command != 0xc8) && (command != 0x25));
 444 #else
 445                         atad_cmd_state.dir = ATA_DIR_READ;
 446 #endif
 447                         using_timeout = 1;
 448         }
 449
 450         if (using_timeout) {
 451                 cmd_timeout.lo = 0x41eb0000;
 452                 cmd_timeout.hi = 0;
 453
 454                 if ((res = SetAlarm(&cmd_timeout, (void *)ata_alarm_cb, NULL)) < 0)
 455                         return res;
 456         }
 457
 458         /* Enable the command completion interrupt.  */
 459         suspend_intr();
 460         HDPROreg_IO8 = 0x21;
 461         CDVDreg_STATUS = 0;
 462         u32 dummy = HDPROreg_IO8;
 463         CDVDreg_STATUS = 0;
 464         resume_intr();
 465         dummy = 0;
 466
 467         /* Finally!  We send off the ATA command with arguments.  */
 468         hdpro_io_write(ATAreg_CONTROL_WR, (using_timeout == 0) << 1);
 469
 470         /* 48-bit LBA requires writing to the address registers twice,
 471            24 bits of the LBA address is written each time.
 472            Writing to registers twice does not affect 28-bit LBA since
 473            only the latest data stored in address registers is used.  */
 474         hdpro_io_write(ATAreg_FEATURE_WR, (feature & 0xffff) >> 8);
 475         hdpro_io_write(ATAreg_NSECTOR_WR, (nsector & 0xffff) >> 8);
 476         hdpro_io_write(ATAreg_SECTOR_WR, (sector & 0xffff) >> 8);
 477         hdpro_io_write(ATAreg_LCYL_WR, (lcyl & 0xffff) >> 8);
 478         hdpro_io_write(ATAreg_HCYL_WR, (hcyl & 0xffff) >> 8);
 479
 480         hdpro_io_write(ATAreg_FEATURE_WR, feature & 0xff);
 481         hdpro_io_write(ATAreg_NSECTOR_WR, nsector & 0xff);
 482         hdpro_io_write(ATAreg_SECTOR_WR, sector & 0xff);
 483         hdpro_io_write(ATAreg_LCYL_WR, lcyl & 0xff);
 484         hdpro_io_write(ATAreg_HCYL_WR, hcyl & 0xff);
 485
 486         hdpro_io_write(ATAreg_SELECT_WR, select & 0xff);
 487         hdpro_io_write(ATAreg_COMMAND_WR, command & 0xff);
 488
 489         return 0;
 490 }
 491
 492 /* Do a PIO transfer, to or from the device.  */
 493 static int ata_pio_transfer(ata_cmd_state_t *cmd_state)
 494 {
 495         void *buf;
 496         int i, type;
 497         int res = 0, chk = 0;
 498         u16 status = hdpro_io_read(ATAreg_STATUS_RD);
 499
 500         if (status & ATA_STAT_ERR) {
 501                 M_PRINTF("Error: Command error: status 0x%02x, error 0x%02x.\n",
 502                                 status, ata_get_error());
 503                 return -503;
 504         }
 505
 506         /* DRQ must be set (data request).  */
 507         if (!(status & ATA_STAT_DRQ))
 508                 return -504;
 509
 510         type = cmd_state->type;
 511
 512         if (type == 3 || type == 8) {
 513                 /* PIO data out */
 514                 buf = cmd_state->buf;
 515
 516                 HDPROreg_IO8 = 0x43;
 517                 CDVDreg_STATUS = 0;
 518
 519                 for (i = 0; i < 256; i++) {
 520                         u16 r_data = *(u16 *)buf;
 521                         hdpro_io_write(ATAreg_DATA_WR, r_data);
 522                         chk ^= r_data + i;
 523                         cmd_state->buf = ++((u16 *)buf);
 524                 }
 525
 526                 u16 out = hdpro_io_read(ATAreg_DATA_RD) & 0xffff;
 527                 if (out != (chk & 0xffff))
 528                         return -504;
 529
 530                 if (cmd_state->type == 8) {
 531                         for (i = 0; i < 4; i++) {
 532                                 hdpro_io_write(ATAreg_DATA_WR, *(u8 *)buf);
 533                                 cmd_state->buf = ++((u8 *)buf);
 534                         }
 535                 }
 536
 537         } else if (type == 2) {
 538                 /* PIO data in  */
 539                 buf = cmd_state->buf;
 540
 541                 suspend_intr();
 542
 543                 HDPROreg_IO8 = 0x53;
 544                 CDVDreg_STATUS = 0;
 545                 CDVDreg_STATUS = 0;
 546
 547                 for (i = 0; i < 256; i++) {
 548
 549                         u32 res0 = HDPROreg_IO8;
 550                         CDVDreg_STATUS = 0;
 551                         u32 res1 = HDPROreg_IO8;
 552                         CDVDreg_STATUS = 0;
 553
 554                         res0 = (res0 & 0xff) | (res1 << 8);
 555                         chk ^= res0 + i;
 556
 557                         *(u16 *)buf = res0 & 0xffff;
 558                         cmd_state->buf = ++((u16 *)buf);
 559                 }
 560
 561                 HDPROreg_IO8 = 0x51;
 562                 CDVDreg_STATUS = 0;
 563                 CDVDreg_STATUS = 0;
 564
 565                 resume_intr();
 566
 567                 u16 r_data = hdpro_io_read(ATAreg_DATA_RD) & 0xffff;
 568                 if (r_data != (chk & 0xffff))
 569                         return -504;
 570         }
 571
 572         return res;
 573 }
 574
 575 /* Export 7 */
 576 int ata_io_finish(void)
 577 {
 578         ata_cmd_state_t *cmd_state = &atad_cmd_state;
 579         u32 bits;
 580         int res = 0, type = cmd_state->type;
 581         u16 stat;
 582
 583         if (type == 1 || type == 6) {   /* Non-data commands.  */
 584
 585 retry:
 586                 suspend_intr();
 587
 588                 HDPROreg_IO8 = 0x21;
 589                 CDVDreg_STATUS = 0;
 590                 u32 ret = HDPROreg_IO8;
 591                 CDVDreg_STATUS = 0;
 592
 593                 resume_intr();
 594
 595                 if (((ret & 0xff) & 1) == 0) {
 596
 597                         WaitEventFlag(ata_evflg, 0x03, 0x11, &bits);
 598                         if (bits & 0x01) {      /* Timeout.  */
 599                                 M_PRINTF("Error: ATA timeout on a non-data command.\n");
 600                                 return -502;
 601                         }
 602
 603                         DelayThread(500);
 604                         goto retry;
 605                 }
 606
 607         } else if (type == 4) {         /* DMA.  */
 608                         M_PRINTF("Error: DMA mode not implemented.\n");
 609                         res = -502;
 610         } else {                        /* PIO transfers.  */
 611                 stat = hdpro_io_read(ATAreg_CONTROL_RD);
 612                 if ((res = ata_wait_busy(0x80)) < 0)
 613                         goto finish;
 614
 615                 /* Transfer each PIO data block.  */
 616                 while (--cmd_state->blkcount != -1) {
 617                         if ((res = ata_pio_transfer(cmd_state)) < 0)
 618                                 goto finish;
 619                         if ((res = ata_wait_busy(0x80)) < 0)
 620                                 goto finish;
 621                 }
 622         }
 623
 624         if (res)
 625                 goto finish;
 626
 627         /* Wait until the device isn't busy.  */
 628         if (hdpro_io_read(ATAreg_STATUS_RD) & ATA_STAT_BUSY)
 629                 res = ata_wait_busy(0x80);
 630         if ((stat = hdpro_io_read(ATAreg_STATUS_RD)) & ATA_STAT_ERR) {
 631                 M_PRINTF("Error: Command error: status 0x%02x, error 0x%02x.\n",
 632                                 stat, ata_get_error());
 633                 res = -503;
 634         }
 635
 636 finish:
 637         /* The command has completed (with an error or not), so clean things up.  */
 638         CancelAlarm((void *)ata_alarm_cb, NULL);
 639
 640         return res;
 641 }
 642
 643 /* Export 9 */
 644 int ata_device_dma_transfer(int device, void *buf, u32 lba, u32 nsectors, int dir)
 645 {
 646         int res = 0;
 647         u32 nbytes;
 648         u16 sector, lcyl, hcyl, select, command, len;
 649
 650         WAITIOSEMA(io_sema);
 651
 652         if (!hdpro_io_start())
 653                 return -1;
 654
 655         while (nsectors) {
 656                 len = (nsectors > 256) ? 256 : nsectors;
 657
 658                 /* Variable lba is only 32 bits so no change for lcyl and hcyl.  */
 659                 lcyl = (lba >> 8) & 0xff;
 660                 hcyl = (lba >> 16) & 0xff;
 661
 662                 if (lba_48bit) {
 663                         /* Setup for 48-bit LBA.  */
 664                         /* Combine bits 24-31 and bits 0-7 of lba into sector.  */
 665                         sector = ((lba >> 16) & 0xff00) | (lba & 0xff);
 666                         /* 0x40 enables LBA.  */
 667                         select = ((device << 4) | 0x40) & 0xffff;
 668                         command = ((dir == 1)&&(ATAWRITE)) ? ATA_C_WRITE_PIO_EXT : ATA_C_READ_PIO_EXT;
 669                 } else {
 670                         /* Setup for 28-bit LBA.  */
 671                         sector = lba & 0xff;
 672                         /* 0x40 enables LBA.  */
 673                         select = ((device << 4) | ((lba >> 24) & 0xf) | 0x40) & 0xffff;
 674                         command = ((dir == 1)&&(ATAWRITE)) ? ATA_C_WRITE_PIO : ATA_C_READ_PIO;
 675                 }
 676
 677                 if ((res = ata_io_start(buf, len, 0, len, sector, lcyl,
 678                                         hcyl, select, command)) != 0)
 679                         continue;
 680                 if ((res = ata_io_finish()) != 0)
 681                         continue;
 682
 683                 nbytes = len * 512;
 684                 (u8 *)buf += nbytes;
 685                 lba += len;
 686                 nsectors -= len;
 687         }
 688
 689         if (!hdpro_io_finish())
 690                 return -2;
 691
 692         SIGNALIOSEMA(io_sema);
 693
 694         return res;
 695 }
 696
 697 /* Export 4 */
 698 ata_devinfo_t * ata_get_devinfo(int device)
 699 {
 700         return &atad_devinfo;
 701 }
 702