Fix crash when setting separation mode for vehicles with no orders list.
[openttd-joker.git] / src / cpu.cpp
blobb582191e321fae028d26c94695e5dde8c001edd6
1 /* $Id: cpu.cpp 26225 2014-01-04 19:46:24Z rubidium $ */
3 /*
4 * This file is part of OpenTTD.
5 * OpenTTD is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, version 2.
6 * OpenTTD is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
7 * See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with OpenTTD. If not, see <http://www.gnu.org/licenses/>.
8 */
10 /** @file cpu.cpp OS/CPU/compiler dependent CPU specific calls. */
12 #include "stdafx.h"
13 #include "core/bitmath_func.hpp"
15 #include "safeguards.h"
17 #undef RDTSC_AVAILABLE
19 /* rdtsc for MSC_VER, uses simple inline assembly, or _rdtsc
20 * from external win64.asm because VS2005 does not support inline assembly */
21 #if defined(_MSC_VER) && !defined(RDTSC_AVAILABLE) && !defined(WINCE)
22 #include <intrin.h>
23 uint64 ottd_rdtsc()
25 return __rdtsc();
27 #define RDTSC_AVAILABLE
28 #endif
30 /* rdtsc for OS/2. Hopefully this works, who knows */
31 #if defined (__WATCOMC__) && !defined(RDTSC_AVAILABLE)
32 unsigned __int64 ottd_rdtsc();
33 # pragma aux ottd_rdtsc = 0x0F 0x31 value [edx eax] parm nomemory modify exact [edx eax] nomemory;
34 # define RDTSC_AVAILABLE
35 #endif
37 /* rdtsc for all other *nix-en (hopefully). Use GCC syntax */
38 #if (defined(__i386__) || defined(__x86_64__)) && !defined(__DJGPP__) && !defined(RDTSC_AVAILABLE)
39 uint64 ottd_rdtsc()
41 uint32 high, low;
42 __asm__ __volatile__ ("rdtsc" : "=a" (low), "=d" (high));
43 return ((uint64)high << 32) | low;
45 # define RDTSC_AVAILABLE
46 #endif
48 /* rdtsc for PPC which has this not */
49 #if (defined(__POWERPC__) || defined(__powerpc__)) && !defined(RDTSC_AVAILABLE)
50 uint64 ottd_rdtsc()
52 uint32 high = 0, high2 = 0, low;
53 /* PPC does not have rdtsc, so we cheat by reading the two 32-bit time-counters
54 * it has, 'Move From Time Base (Upper)'. Since these are two reads, in the
55 * very unlikely event that the lower part overflows to the upper part while we
56 * read it; we double-check and reread the registers */
57 asm volatile (
58 "mftbu %0\n"
59 "mftb %1\n"
60 "mftbu %2\n"
61 "cmpw %3,%4\n"
62 "bne- $-16\n"
63 : "=r" (high), "=r" (low), "=r" (high2)
64 : "0" (high), "2" (high2)
66 return ((uint64)high << 32) | low;
68 # define RDTSC_AVAILABLE
69 #endif
71 /* In all other cases we have no support for rdtsc. No major issue,
72 * you just won't be able to profile your code with TIC()/TOC() */
73 #if !defined(RDTSC_AVAILABLE)
74 /* MSVC (in case of WinCE) can't handle #warning */
75 # if !defined(_MSC_VER)
76 #warning "(non-fatal) No support for rdtsc(), you won't be able to profile with TIC/TOC"
77 # endif
78 uint64 ottd_rdtsc() {return 0;}
79 #endif
82 /**
83 * Definitions for CPU detection:
85 * MSVC offers cpu information while gcc only implements in gcc 4.8
86 * __builtin_cpu_supports and friends
87 * http://msdn.microsoft.com/library/vstudio/hskdteyh%28v=vs.100%29.aspx
88 * http://gcc.gnu.org/onlinedocs/gcc/X86-Built-in-Functions.html
90 * Other platforms/architectures don't have CPUID, so zero the info and then
91 * most (if not all) of the features are set as if they do not exist.
93 #if defined(_MSC_VER)
94 void ottd_cpuid(int info[4], int type)
96 __cpuid(info, type);
98 #elif defined(__x86_64__) || defined(__i386)
99 void ottd_cpuid(int info[4], int type)
101 #if defined(__i386) && defined(__PIC__)
102 /* The easy variant would be just cpuid, however... ebx is being used by the GOT (Global Offset Table)
103 * in case of PIC;
104 * clobbering ebx is no alternative: some compiler versions don't like this
105 * and will issue an error message like
106 * "can't find a register in class 'BREG' while reloading 'asm'"
108 __asm__ __volatile__ (
109 "xchgl %%ebx, %1 \n\t"
110 "cpuid \n\t"
111 "xchgl %%ebx, %1 \n\t"
112 : "=a" (info[0]), "=r" (info[1]), "=c" (info[2]), "=d" (info[3])
113 /* It is safe to write "=r" for (info[1]) as in case that PIC is enabled for i386,
114 * the compiler will not choose EBX as target register (but something else).
116 : "a" (type)
118 #else
119 __asm__ __volatile__ (
120 "cpuid \n\t"
121 : "=a" (info[0]), "=b" (info[1]), "=c" (info[2]), "=d" (info[3])
122 : "a" (type)
124 #endif /* i386 PIC */
126 #else
127 void ottd_cpuid(int info[4], int type)
129 info[0] = info[1] = info[2] = info[3] = 0;
131 #endif
133 bool HasCPUIDFlag(uint type, uint index, uint bit)
135 int cpu_info[4] = {-1};
136 ottd_cpuid(cpu_info, 0);
137 uint max_info_type = cpu_info[0];
138 if (max_info_type < type) return false;
140 ottd_cpuid(cpu_info, type);
141 return HasBit(cpu_info[index], bit);