radio/src/targets/taranis/diskio.cpp

   1 /*
   2  * Copyright (C) OpenTX
   3  *
   4  * Based on code named
   5  *   th9x - http://code.google.com/p/th9x
   6  *   er9x - http://code.google.com/p/er9x
   7  *   gruvin9x - http://code.google.com/p/gruvin9x
   8  *
   9  * License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  */
  20
  21 #include "opentx.h"
  22 #include "FatFs/diskio.h"
  23 #include "FatFs/ff.h"
  24
  25 /* Definitions for MMC/SDC command */
  26 #define CMD0    (0x40+0)        /* GO_IDLE_STATE */
  27 #define CMD1    (0x40+1)        /* SEND_OP_COND (MMC) */
  28 #define ACMD41  (0xC0+41)       /* SEND_OP_COND (SDC) */
  29 #define CMD8    (0x40+8)        /* SEND_IF_COND */
  30 #define CMD9    (0x40+9)        /* SEND_CSD */
  31 #define CMD10   (0x40+10)       /* SEND_CID */
  32 #define CMD12   (0x40+12)       /* STOP_TRANSMISSION */
  33 #define ACMD13  (0xC0+13)       /* SD_STATUS (SDC) */
  34 #define CMD16   (0x40+16)       /* SET_BLOCKLEN */
  35 #define CMD17   (0x40+17)       /* READ_SINGLE_BLOCK */
  36 #define CMD18   (0x40+18)       /* READ_MULTIPLE_BLOCK */
  37 #define CMD23   (0x40+23)       /* SET_BLOCK_COUNT (MMC) */
  38 #define ACMD23  (0xC0+23)       /* SET_WR_BLK_ERASE_COUNT (SDC) */
  39 #define CMD24   (0x40+24)       /* WRITE_BLOCK */
  40 #define CMD25   (0x40+25)       /* WRITE_MULTIPLE_BLOCK */
  41 #define CMD55   (0x40+55)       /* APP_CMD */
  42 #define CMD58   (0x40+58)       /* READ_OCR */
  43
  44 /* Card-Select Controls  (Platform dependent) */
  45 #define SD_SELECT()        GPIO_ResetBits(SD_GPIO, SD_GPIO_PIN_CS)    /* MMC CS = L */
  46 #define SD_DESELECT()      GPIO_SetBits(SD_GPIO, SD_GPIO_PIN_CS)      /* MMC CS = H */
  47
  48 #define BOOL   bool
  49 #define FALSE  false
  50 #define TRUE   true
  51
  52 /* Card type flags (CardType) */
  53 #define CT_MMC              0x01
  54 #define CT_SD1              0x02
  55 #define CT_SD2              0x04
  56 #define CT_SDC              (CT_SD1|CT_SD2)
  57 #define CT_BLOCK            0x08
  58
  59 /*-----------------------------------------------------------------------*/
  60 /* Lock / unlock functions                                               */
  61 /*-----------------------------------------------------------------------*/
  62 #if !defined(BOOT)
  63 static RTOS_MUTEX_HANDLE ioMutex;
  64
  65 int ff_cre_syncobj (BYTE vol, _SYNC_t *mutex)
  66 {
  67   *mutex = ioMutex;
  68   return 1;
  69 }
  70
  71 int ff_req_grant (_SYNC_t mutex)
  72 {
  73   RTOS_LOCK_MUTEX(mutex);
  74   return 1;
  75 }
  76
  77 void ff_rel_grant (_SYNC_t mutex)
  78 {
  79   RTOS_UNLOCK_MUTEX(mutex);
  80 }
  81
  82 int ff_del_syncobj (_SYNC_t mutex)
  83 {
  84   return 1;
  85 }
  86 #endif
  87
  88 static const DWORD socket_state_mask_cp = (1 << 0);
  89 static const DWORD socket_state_mask_wp = (1 << 1);
  90
  91 static volatile
  92 DSTATUS Stat = STA_NOINIT;      /* Disk status */
  93
  94 static volatile
  95 DWORD Timer1, Timer2;   /* 100Hz decrement timers */
  96
  97 BYTE CardType;                  /* Card type flags */
  98
  99 enum speed_setting { INTERFACE_SLOW, INTERFACE_FAST };
 100
 101 static void interface_speed( enum speed_setting speed )
 102 {
 103   DWORD tmp;
 104
 105   tmp = SD_SPI->CR1;
 106   if ( speed == INTERFACE_SLOW ) {
 107     /* Set slow clock (100k-400k) */
 108     tmp = ( tmp | SPI_BaudRatePrescaler_128 );
 109   } else {
 110     /* Set fast clock (depends on the CSD) */
 111     tmp = ( tmp & ~SPI_BaudRatePrescaler_128 ) | SD_SPI_BaudRatePrescaler;
 112   }
 113   SD_SPI->CR1 = tmp;
 114 }
 115
 116 static inline DWORD socket_is_write_protected(void)
 117 {
 118   return 0; /* fake not protected */
 119 }
 120
 121 static inline DWORD socket_is_empty(void)
 122 {
 123   return !SD_CARD_PRESENT(); /* fake inserted */
 124 }
 125
 126 static void card_power(BYTE on)
 127 {
 128   on=on;
 129 }
 130
 131 static int chk_power(void)
 132 {
 133   return 1; /* fake powered */
 134 }
 135
 136 /*-----------------------------------------------------------------------*/
 137 /* Transmit/Receive a byte to MMC via SPI  (Platform dependent)          */
 138 /*-----------------------------------------------------------------------*/
 139 static BYTE stm32_spi_rw( BYTE out )
 140 {
 141   /* Loop while DR register in not empty */
 142   /// not needed: while (SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_TXE) == RESET) { ; }
 143
 144   /* Send byte through the SPI peripheral */
 145   SPI_I2S_SendData(SD_SPI, out);
 146
 147   /* Wait to receive a byte */
 148   while (SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_RXNE) == RESET) { ; }
 149
 150   /* Return the byte read from the SPI bus */
 151   return SPI_I2S_ReceiveData(SD_SPI);
 152 }
 153
 154
 155
 156 /*-----------------------------------------------------------------------*/
 157 /* Transmit a byte to MMC via SPI  (Platform dependent)                  */
 158 /*-----------------------------------------------------------------------*/
 159
 160 #define xmit_spi(dat)  stm32_spi_rw(dat)
 161
 162 /*-----------------------------------------------------------------------*/
 163 /* Receive a byte from MMC via SPI  (Platform dependent)                 */
 164 /*-----------------------------------------------------------------------*/
 165
 166 static
 167 BYTE rcvr_spi (void)
 168 {
 169   return stm32_spi_rw(0xff);
 170 }
 171
 172 /* Alternative macro to receive data fast */
 173 #define rcvr_spi_m(dst)  *(dst)=stm32_spi_rw(0xff)
 174
 175
 176
 177 /*-----------------------------------------------------------------------*/
 178 /* Wait for card ready                                                   */
 179 /*-----------------------------------------------------------------------*/
 180 static BYTE wait_ready (void)
 181 {
 182   BYTE res;
 183
 184   Timer2 = 50;    /* Wait for ready in timeout of 500ms */
 185   rcvr_spi();
 186   do {
 187     res = rcvr_spi();
 188   } while ((res != 0xFF) && Timer2);
 189
 190   return res;
 191 }
 192
 193 static void spi_reset()
 194 {
 195   for (int n=0; n<520; ++n) {
 196     stm32_spi_rw(0xFF);
 197   }
 198   TRACE_SD_CARD_EVENT(1, sd_spi_reset, 0);
 199 }
 200
 201 /*-----------------------------------------------------------------------*/
 202 /* Deselect the card and release SPI bus                                 */
 203 /*-----------------------------------------------------------------------*/
 204
 205 static
 206 void release_spi (void)
 207 {
 208   SD_DESELECT();
 209   rcvr_spi();
 210 }
 211
 212 #ifdef SD_USE_DMA
 213
 214 #if defined(STM32F4) && !defined(BOOT)
 215 WORD rw_workbyte[1] __DMA;
 216 #endif
 217
 218 /*-----------------------------------------------------------------------*/
 219 /* Transmit/Receive Block using DMA (Platform dependent. STM32 here)     */
 220 /*-----------------------------------------------------------------------*/
 221 static
 222 void stm32_dma_transfer(
 223   BOOL receive,   /* FALSE for buff->SPI, TRUE for SPI->buff               */
 224   const BYTE *buff, /* receive TRUE  : 512 byte data block to be transmitted
 225                receive FALSE : Data buffer to store received data    */
 226   UINT btr      /* receive TRUE  : Byte count (must be multiple of 2)
 227                receive FALSE : Byte count (must be 512)              */
 228 )
 229 {
 230   DMA_InitTypeDef DMA_InitStructure;
 231 #if defined(STM32F4) && !defined(BOOT)
 232   rw_workbyte[0] = 0xffff;
 233 #else
 234   WORD rw_workbyte[] = { 0xffff };
 235 #endif
 236
 237   DMA_DeInit(SD_DMA_Stream_SPI_RX);
 238   DMA_DeInit(SD_DMA_Stream_SPI_TX);
 239
 240   /* shared DMA configuration values between SPI2 RX & TX*/
 241   DMA_InitStructure.DMA_Channel = SD_DMA_Channel_SPI;//the same channel
 242   DMA_InitStructure.DMA_PeripheralBaseAddr = (DWORD)(&(SD_SPI->DR));
 243   DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
 244   DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
 245   DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
 246   DMA_InitStructure.DMA_BufferSize = btr;
 247   DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
 248   DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
 249
 250   DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
 251   DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
 252   DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
 253   DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
 254
 255   // separate RX & TX
 256   if (receive) {
 257     DMA_InitStructure.DMA_Memory0BaseAddr = (DWORD)buff;
 258     DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
 259     DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
 260     DMA_Init(SD_DMA_Stream_SPI_RX, &DMA_InitStructure);
 261     DMA_InitStructure.DMA_Memory0BaseAddr = (DWORD)rw_workbyte;
 262     DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
 263     DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
 264     DMA_Init(SD_DMA_Stream_SPI_TX, &DMA_InitStructure);
 265   }
 266   else {
 267 #if _FS_READONLY == 0
 268     DMA_InitStructure.DMA_Memory0BaseAddr = (DWORD)rw_workbyte;
 269     DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
 270     DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
 271     DMA_Init(SD_DMA_Stream_SPI_RX, &DMA_InitStructure);
 272     DMA_InitStructure.DMA_Memory0BaseAddr = (DWORD)buff;
 273     DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
 274     DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
 275     DMA_Init(SD_DMA_Stream_SPI_TX, &DMA_InitStructure);
 276 #endif
 277   }
 278
 279   /* Enable DMA Channels */
 280   DMA_Cmd(SD_DMA_Stream_SPI_RX, ENABLE);
 281   DMA_Cmd(SD_DMA_Stream_SPI_TX, ENABLE);
 282
 283   /* Enable SPI TX/RX request */
 284   SPI_I2S_DMACmd(SD_SPI, SPI_I2S_DMAReq_Rx | SPI_I2S_DMAReq_Tx, ENABLE);
 285
 286   while (DMA_GetFlagStatus(SD_DMA_Stream_SPI_TX, SD_DMA_FLAG_SPI_TC_TX) == RESET) { ; }
 287   while (DMA_GetFlagStatus(SD_DMA_Stream_SPI_RX, SD_DMA_FLAG_SPI_TC_RX) == RESET) { ; }
 288
 289   /* Disable DMA Channels */
 290   DMA_Cmd(SD_DMA_Stream_SPI_RX, DISABLE);
 291   DMA_Cmd(SD_DMA_Stream_SPI_TX, DISABLE);
 292
 293   /* Disable SPI RX/TX request */
 294   SPI_I2S_DMACmd(SD_SPI, SPI_I2S_DMAReq_Rx | SPI_I2S_DMAReq_Tx, DISABLE);
 295 }
 296 #endif /* SD_USE_DMA */
 297
 298
 299 /*-----------------------------------------------------------------------*/
 300 /* Power Control and interface-initialization (Platform dependent)       */
 301 /*-----------------------------------------------------------------------*/
 302
 303 static
 304 void power_on (void)
 305 {
 306   SPI_InitTypeDef  SPI_InitStructure;
 307   GPIO_InitTypeDef GPIO_InitStructure;
 308   volatile BYTE dummyread;
 309
 310   card_power(1);
 311
 312   GPIO_InitStructure.GPIO_Pin = SD_GPIO_PRESENT_GPIO_PIN;
 313   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
 314   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
 315   GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
 316   GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
 317   GPIO_Init(SD_GPIO_PRESENT_GPIO, &GPIO_InitStructure);
 318
 319   for (uint32_t Timer = 25000; Timer>0;Timer--);  /* Wait for 250ms */
 320
 321   /* Configure I/O for Flash Chip select */
 322   GPIO_InitStructure.GPIO_Pin   = SD_GPIO_PIN_CS;
 323   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
 324   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
 325   GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
 326   GPIO_Init(SD_GPIO, &GPIO_InitStructure);
 327
 328   /* De-select the Card: Chip Select high */
 329   SD_DESELECT();
 330
 331   /* Configure SPI pins: SCK MISO and MOSI with alternate function push-down */
 332   GPIO_InitStructure.GPIO_Pin   = SD_GPIO_PIN_SCK | SD_GPIO_PIN_MOSI|SD_GPIO_PIN_MISO;
 333   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
 334   GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
 335   GPIO_Init(SD_GPIO, &GPIO_InitStructure);
 336   GPIO_PinAFConfig(SD_GPIO,SD_GPIO_PinSource_SCK ,SD_GPIO_AF);
 337   GPIO_PinAFConfig(SD_GPIO,SD_GPIO_PinSource_MISO,SD_GPIO_AF);
 338   GPIO_PinAFConfig(SD_GPIO,SD_GPIO_PinSource_MOSI,SD_GPIO_AF);
 339
 340   /* SPI configuration */
 341   SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
 342   SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
 343   SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
 344   SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
 345   SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
 346   SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
 347   SPI_InitStructure.SPI_BaudRatePrescaler = SD_SPI_BaudRatePrescaler;
 348   SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
 349   SPI_InitStructure.SPI_CRCPolynomial = 7;
 350   SPI_Init(SD_SPI, &SPI_InitStructure);
 351   SPI_CalculateCRC(SD_SPI, DISABLE);
 352   SPI_Cmd(SD_SPI, ENABLE);
 353
 354   /* drain SPI */
 355   while (SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_TXE) == RESET) { ; }
 356   dummyread = SPI_I2S_ReceiveData(SD_SPI);
 357
 358   (void) dummyread;          // Discard value - prevents compiler warning
 359 }
 360
 361 static
 362 void power_off (void)
 363 {
 364   GPIO_InitTypeDef GPIO_InitStructure;
 365
 366   if (!(Stat & STA_NOINIT)) {
 367     SD_SELECT();
 368     wait_ready();
 369     release_spi();
 370   }
 371
 372   SPI_I2S_DeInit(SD_SPI);
 373   SPI_Cmd(SD_SPI, DISABLE);
 374
 375   //All SPI-Pins to input with weak internal pull-downs
 376   GPIO_InitStructure.GPIO_Pin = SD_GPIO_PIN_SCK | SD_GPIO_PIN_MISO | SD_GPIO_PIN_MOSI;
 377   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
 378   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
 379   GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
 380   GPIO_Init(SD_GPIO, &GPIO_InitStructure);
 381
 382   card_power(0);
 383
 384   Stat |= STA_NOINIT; /* Set STA_NOINIT */
 385 }
 386
 387 /*-----------------------------------------------------------------------*/
 388 /* Receive a data packet from MMC                                        */
 389 /*-----------------------------------------------------------------------*/
 390
 391 #if defined(SD_USE_DMA) && defined(STM32F4) && !defined(BOOT)
 392   uint8_t sd_buff[512] __DMA;
 393 #endif
 394
 395 static
 396 BOOL rcvr_datablock (
 397         BYTE *buff,                     /* Data buffer to store received data */
 398         UINT btr                        /* Byte count (must be multiple of 4) */
 399 )
 400 {
 401   BYTE token;
 402
 403
 404   Timer1 = 10;
 405   do {                                                    /* Wait for data packet in timeout of 100ms */
 406     token = rcvr_spi();
 407   } while ((token == 0xFF) && Timer1);
 408   if(token != 0xFE) {
 409     TRACE_SD_CARD_EVENT(1, sd_rcvr_datablock, ((uint32_t)(Timer1) << 24) + ((uint32_t)(btr) << 8) + token);
 410     spi_reset();
 411     return FALSE; /* If not valid data token, return with error */
 412   }
 413
 414 #if defined(SD_USE_DMA) && defined(STM32F4) && !defined(BOOT)
 415   stm32_dma_transfer(TRUE, sd_buff, btr);
 416   memcpy(buff, sd_buff, btr);
 417 #elif defined(SD_USE_DMA)
 418   stm32_dma_transfer(TRUE, buff, btr);
 419 #else
 420   do {                                                    /* Receive the data block into buffer */
 421     rcvr_spi_m(buff++);
 422     rcvr_spi_m(buff++);
 423     rcvr_spi_m(buff++);
 424     rcvr_spi_m(buff++);
 425   } while (btr -= 4);
 426 #endif /* SD_USE_DMA */
 427
 428   rcvr_spi();                                             /* Discard CRC */
 429   rcvr_spi();
 430
 431   return TRUE;                                    /* Return with success */
 432 }
 433
 434
 435
 436 /*-----------------------------------------------------------------------*/
 437 /* Send a data packet to MMC                                             */
 438 /*-----------------------------------------------------------------------*/
 439
 440 #define DATA_RESPONSE_TIMEOUT   10
 441
 442 static
 443 BOOL xmit_datablock (
 444         const BYTE *buff,       /* 512 byte data block to be transmitted */
 445         BYTE token                      /* Data/Stop token */
 446 )
 447 {
 448   BYTE resp;
 449 #ifndef SD_USE_DMA
 450   BYTE wc;
 451 #endif
 452
 453   if (wait_ready() != 0xFF) {
 454     TRACE_SD_CARD_EVENT(1, sd_xmit_datablock_wait_ready, token);
 455     spi_reset();
 456     return FALSE;
 457   }
 458
 459   xmit_spi(token);                                        /* transmit data token */
 460   if (token != 0xFD) {    /* Is data token */
 461
 462 #if defined(SD_USE_DMA) && defined(STM32F4) && !defined(BOOT)
 463   memcpy(sd_buff, buff, 512);
 464   stm32_dma_transfer(FALSE, sd_buff, 512);
 465 #elif defined(SD_USE_DMA)
 466   stm32_dma_transfer(FALSE, buff, 512);
 467 #else
 468     wc = 0;
 469     do {                                                    /* transmit the 512 byte data block to MMC */
 470       xmit_spi(*buff++);
 471       xmit_spi(*buff++);
 472     } while (--wc);
 473 #endif /* SD_USE_DMA */
 474
 475     xmit_spi(0xFF);                                 /* CRC (Dummy) */
 476     xmit_spi(0xFF);
 477
 478     /*
 479     Despite what the SD card standard says, the reality is that (at least for some SD cards)
 480     the Data Response byte does not come immediately after the last byte of data.
 481
 482     This delay only happens very rarely, but it does happen. Typical response delay is some 10ms
 483     */
 484     Timer2 = DATA_RESPONSE_TIMEOUT;
 485     do {
 486       resp = rcvr_spi();            /* Receive data response */
 487       if ((resp & 0x1F) == 0x05) {
 488         TRACE_SD_CARD_EVENT((Timer2 != DATA_RESPONSE_TIMEOUT), sd_xmit_datablock_rcvr_spi,  ((uint32_t)(Timer2) << 16) + ((uint32_t)(resp) << 8) + token);
 489         return TRUE;
 490       }
 491       if (resp != 0xFF) {
 492         TRACE_SD_CARD_EVENT(1, sd_xmit_datablock_rcvr_spi,  ((uint32_t)(Timer2) << 16) + ((uint32_t)(resp) << 8) + token);
 493         spi_reset();
 494         return FALSE;
 495       }
 496     } while (Timer2);
 497     TRACE_SD_CARD_EVENT(1, sd_xmit_datablock_rcvr_spi,  ((uint32_t)(Timer2) << 16) + ((uint32_t)(resp) << 8) + token);
 498     return FALSE;
 499   }
 500   return TRUE;
 501 }
 502
 503
 504 /*-----------------------------------------------------------------------*/
 505 /* Send a command packet to MMC                                          */
 506 /*-----------------------------------------------------------------------*/
 507
 508 static
 509 BYTE send_cmd (
 510         BYTE cmd,               /* Command byte */
 511         DWORD arg               /* Argument */
 512 )
 513 {
 514   BYTE n, res;
 515
 516
 517   if (cmd & 0x80) {       /* ACMD<n> is the command sequence of CMD55-CMD<n> */
 518     cmd &= 0x7F;
 519     res = send_cmd(CMD55, 0);
 520     if (res > 1) return res;
 521   }
 522
 523   /* Select the card and wait for ready */
 524   SD_SELECT();
 525   if (wait_ready() != 0xFF) {
 526     TRACE_SD_CARD_EVENT(1, sd_send_cmd_wait_ready, cmd);
 527     spi_reset();
 528     return 0xFF;
 529   }
 530
 531   /* Send command packet */
 532   xmit_spi(cmd);                                          /* Start + Command index */
 533   xmit_spi((BYTE)(arg >> 24));            /* Argument[31..24] */
 534   xmit_spi((BYTE)(arg >> 16));            /* Argument[23..16] */
 535   xmit_spi((BYTE)(arg >> 8));                     /* Argument[15..8] */
 536   xmit_spi((BYTE)arg);                            /* Argument[7..0] */
 537   n = 0x01;                                                       /* Dummy CRC + Stop */
 538   if (cmd == CMD0) n = 0x95;                      /* Valid CRC for CMD0(0) */
 539   if (cmd == CMD8) n = 0x87;                      /* Valid CRC for CMD8(0x1AA) */
 540   xmit_spi(n);
 541
 542   /* Receive command response */
 543   if (cmd == CMD12) rcvr_spi();           /* Skip a stuff byte when stop reading */
 544
 545   n = 10;                                                         /* Wait for a valid response in timeout of 10 attempts */
 546   do {
 547     res = rcvr_spi();
 548   } while ((res & 0x80) && --n);
 549
 550   TRACE_SD_CARD_EVENT((res > 1), sd_send_cmd_rcvr_spi, ((uint32_t)(n) << 16) + ((uint32_t)(res) << 8) + cmd);
 551
 552   return res;                     /* Return with the response value */
 553 }
 554
 555
 556
 557 /*--------------------------------------------------------------------------
 558
 559    Public Functions
 560
 561 ---------------------------------------------------------------------------*/
 562
 563
 564 /*-----------------------------------------------------------------------*/
 565 /* Initialize Disk Drive                                                 */
 566 /*-----------------------------------------------------------------------*/
 567
 568 DSTATUS disk_initialize (
 569         BYTE drv                /* Physical drive number (0) */
 570 )
 571 {
 572   BYTE n, cmd, ty, ocr[4];
 573
 574   if (drv) return STA_NOINIT;                     /* Supports only single drive */
 575   if (Stat & STA_NODISK) return Stat;     /* No card in the socket */
 576
 577   power_on();                                                     /* Force socket power on and initialize interface */
 578   interface_speed(INTERFACE_SLOW);
 579   for (n = 10; n; n--) rcvr_spi();        /* 80 dummy clocks */
 580
 581   ty = 0;
 582   if (send_cmd(CMD0, 0) == 1) {                   /* Enter Idle state */
 583     Timer1 = 100;                                           /* Initialization timeout of 1000 milliseconds */
 584     if (send_cmd(CMD8, 0x1AA) == 1) {       /* SDHC */
 585       for (n = 0; n < 4; n++) ocr[n] = rcvr_spi();            /* Get trailing return value of R7 response */
 586       if (ocr[2] == 0x01 && ocr[3] == 0xAA) {                         /* The card can work at VDD range of 2.7-3.6V */
 587         while (Timer1 && send_cmd(ACMD41, 1UL << 30));  /* Wait for leaving idle state (ACMD41 with HCS bit) */
 588         if (Timer1 && send_cmd(CMD58, 0) == 0) {                /* Check CCS bit in the OCR */
 589           for (n = 0; n < 4; n++) ocr[n] = rcvr_spi();
 590           ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;
 591         }
 592       }
 593     } else {                                                        /* SDSC or MMC */
 594       if (send_cmd(ACMD41, 0) <= 1)   {
 595         ty = CT_SD1; cmd = ACMD41;      /* SDSC */
 596       } else {
 597         ty = CT_MMC; cmd = CMD1;        /* MMC */
 598       }
 599       while (Timer1 && send_cmd(cmd, 0));                     /* Wait for leaving idle state */
 600       if (!Timer1 || send_cmd(CMD16, 512) != 0)       /* Set R/W block length to 512 */
 601         ty = 0;
 602     }
 603   }
 604   CardType = ty;
 605   release_spi();
 606
 607   if (ty) {                       /* Initialization succeeded */
 608     Stat &= ~STA_NOINIT;            /* Clear STA_NOINIT */
 609     interface_speed(INTERFACE_FAST);
 610   }
 611   else {                        /* Initialization failed */
 612     power_off();
 613   }
 614
 615   return Stat;
 616 }
 617
 618
 619
 620 /*-----------------------------------------------------------------------*/
 621 /* Get Disk Status                                                       */
 622 /*-----------------------------------------------------------------------*/
 623 DSTATUS disk_status (
 624         BYTE drv                /* Physical drive number (0) */
 625 )
 626 {
 627   if (drv) return STA_NOINIT;             /* Supports only single drive */
 628   return Stat;
 629 }
 630
 631
 632 #if defined(STM32F4) && !defined(BOOT)
 633 DWORD scratch[BLOCK_SIZE / 4] __DMA;
 634 #endif
 635
 636 /*-----------------------------------------------------------------------*/
 637 /* Read Sector(s)                                                        */
 638 /*-----------------------------------------------------------------------*/
 639
 640 int8_t SD_ReadSectors(uint8_t * buff, uint32_t sector, uint32_t count)
 641 {
 642 #if defined(STM32F4) && !defined(BOOT)
 643   if ((DWORD)buff < 0x20000000 || ((DWORD)buff & 3)) {
 644     TRACE("disk_read bad alignment (%p)", buff);
 645     while (count--) {
 646       int8_t res = SD_ReadSectors((BYTE *)scratch, sector++, 1);
 647
 648       if (res != 0) {
 649         return res;
 650       }
 651
 652       memcpy(buff, scratch, BLOCK_SIZE);
 653
 654       buff += BLOCK_SIZE;
 655     }
 656
 657     return 0;
 658   }
 659 #endif
 660
 661   if (!(CardType & CT_BLOCK)) sector *= 512;      /* Convert to byte address if needed */
 662
 663   if (count == 1) {       /* Single block read */
 664     if (send_cmd(CMD17, sector) == 0)       { /* READ_SINGLE_BLOCK */
 665       if (rcvr_datablock(buff, 512)) {
 666         count = 0;
 667       }
 668     }
 669     else {
 670       spi_reset();
 671     }
 672   }
 673   else {                          /* Multiple block read */
 674     if (send_cmd(CMD18, sector) == 0) {     /* READ_MULTIPLE_BLOCK */
 675       do {
 676         if (!rcvr_datablock(buff, 512)) {
 677           break;
 678         }
 679         buff += 512;
 680       } while (--count);
 681       send_cmd(CMD12, 0);                             /* STOP_TRANSMISSION */
 682     }
 683     else {
 684       spi_reset();
 685     }
 686   }
 687   release_spi();
 688   TRACE_SD_CARD_EVENT((count != 0), sd_SD_ReadSectors, (count << 24) + ((sector/((CardType & CT_BLOCK) ? 1 : 512)) & 0x00FFFFFF));
 689
 690   return count ? -1 : 0;
 691 }
 692
 693 DRESULT disk_read (
 694         BYTE drv,                       /* Physical drive number (0) */
 695         BYTE *buff,                     /* Pointer to the data buffer to store read data */
 696         DWORD sector,           /* Start sector number (LBA) */
 697         UINT count                      /* Sector count (1..255) */
 698 )
 699 {
 700   if (drv || !count) return RES_PARERR;
 701   if (Stat & STA_NOINIT) return RES_NOTRDY;
 702   int8_t res = SD_ReadSectors(buff, sector, count);
 703   TRACE_SD_CARD_EVENT((res != 0), sd_disk_read, (count << 24) + (sector & 0x00FFFFFF));
 704   return (res != 0) ? RES_ERROR : RES_OK;
 705 }
 706
 707
 708
 709 /*-----------------------------------------------------------------------*/
 710 /* Write Sector(s)                                                       */
 711 /*-----------------------------------------------------------------------*/
 712
 713 int8_t SD_WriteSectors(const uint8_t * buff, uint32_t sector, uint32_t count)
 714 {
 715 #if defined(STM32F4) && !defined(BOOT)
 716   if ((DWORD)buff < 0x20000000 || ((DWORD)buff & 3)) {
 717     TRACE("disk_write bad alignment (%p)", buff);
 718     while (count--) {
 719       memcpy(scratch, buff, BLOCK_SIZE);
 720
 721       int8_t res = SD_WriteSectors((const uint8_t *)scratch, sector++, 1);
 722
 723       if (res != 0) {
 724         return res;
 725       }
 726
 727       buff += BLOCK_SIZE;
 728     }
 729
 730     return 0;
 731   }
 732 #endif
 733
 734   if (!(CardType & CT_BLOCK)) sector *= 512;      /* Convert to byte address if needed */
 735
 736   if (count == 1) {       /* Single block write */
 737     if (send_cmd(CMD24, sector) == 0) {     /* WRITE_BLOCK */
 738       if (xmit_datablock(buff, 0xFE)) {
 739         count = 0;
 740       }
 741     }
 742     else {
 743       spi_reset();
 744     }
 745   }
 746   else {                          /* Multiple block write */
 747     if (CardType & CT_SDC) send_cmd(ACMD23, count);
 748     if (send_cmd(CMD25, sector) == 0) {     /* WRITE_MULTIPLE_BLOCK */
 749       do {
 750         if (!xmit_datablock(buff, 0xFC)) break;
 751         buff += 512;
 752       } while (--count);
 753       if (!xmit_datablock(0, 0xFD))   /* STOP_TRAN token */
 754         count = 1;
 755     }
 756     else {
 757       spi_reset();
 758     }
 759   }
 760   release_spi();
 761   TRACE_SD_CARD_EVENT((count != 0), sd_SD_WriteSectors, (count << 24) + ((sector/((CardType & CT_BLOCK) ? 1 : 512)) & 0x00FFFFFF));
 762
 763   return count ? -1 : 0;
 764 }
 765
 766 DRESULT disk_write (
 767         BYTE drv,                       /* Physical drive number (0) */
 768         const BYTE *buff,       /* Pointer to the data to be written */
 769         DWORD sector,           /* Start sector number (LBA) */
 770         UINT count                      /* Sector count (1..255) */
 771 )
 772 {
 773   if (drv || !count) return RES_PARERR;
 774   if (Stat & STA_NOINIT) return RES_NOTRDY;
 775   if (Stat & STA_PROTECT) return RES_WRPRT;
 776   int8_t res = SD_WriteSectors(buff, sector, count);
 777   TRACE_SD_CARD_EVENT((res != 0), sd_disk_write, (count << 24) + (sector & 0x00FFFFFF));
 778   return (res != 0) ? RES_ERROR : RES_OK;
 779 }
 780
 781
 782 /*-----------------------------------------------------------------------*/
 783 /* Miscellaneous Functions                                               */
 784 /*-----------------------------------------------------------------------*/
 785
 786 DRESULT disk_ioctl (
 787         BYTE drv,               /* Physical drive number (0) */
 788         BYTE ctrl,              /* Control code */
 789         void *buff              /* Buffer to send/receive control data */
 790 )
 791 {
 792   DRESULT res;
 793   BYTE n, csd[16], *ptr = (BYTE *)buff;
 794   WORD csize;
 795
 796   if (drv) return RES_PARERR;
 797
 798   res = RES_ERROR;
 799
 800   if (ctrl == CTRL_POWER) {
 801     switch (*ptr) {
 802     case 0:         /* Sub control code == 0 (POWER_OFF) */
 803       if (chk_power())
 804         power_off();            /* Power off */
 805       res = RES_OK;
 806       break;
 807     case 1:         /* Sub control code == 1 (POWER_ON) */
 808       power_on();                             /* Power on */
 809       res = RES_OK;
 810       break;
 811     case 2:         /* Sub control code == 2 (POWER_GET) */
 812       *(ptr+1) = (BYTE)chk_power();
 813       res = RES_OK;
 814       break;
 815     default :
 816       res = RES_PARERR;
 817     }
 818   }
 819   else {
 820     if (Stat & STA_NOINIT) {
 821       return RES_NOTRDY;
 822     }
 823
 824     switch (ctrl) {
 825     case CTRL_SYNC :                /* Make sure that no pending write process */
 826       SD_SELECT();
 827       if (wait_ready() == 0xFF) {
 828         res = RES_OK;
 829       }
 830       else {
 831         TRACE_SD_CARD_EVENT(1, sd_disk_ioctl_CTRL_SYNC, 0);
 832       }
 833       break;
 834
 835     case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */
 836       if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
 837         if ((csd[0] >> 6) == 1) {       /* SDC version 2.00 */
 838           csize = csd[9] + ((WORD)csd[8] << 8) + 1;
 839           *(DWORD*)buff = (DWORD)csize << 10;
 840         }
 841         else {                                        /* SDC version 1.XX or MMC*/
 842           n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
 843           csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
 844           *(DWORD*)buff = (DWORD)csize << (n - 9);
 845         }
 846         res = RES_OK;
 847       }
 848       else {
 849         TRACE_SD_CARD_EVENT(1, sd_disk_ioctl_GET_SECTOR_COUNT, 0);
 850       }
 851       break;
 852
 853     case GET_SECTOR_SIZE :  /* Get R/W sector size (WORD) */
 854       *(WORD*)buff = 512;
 855       res = RES_OK;
 856       break;
 857
 858     case GET_BLOCK_SIZE :   /* Get erase block size in unit of sector (DWORD) */
 859       if (CardType & CT_SD2) {        /* SDC version 2.00 */
 860         if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
 861           rcvr_spi();
 862           if (rcvr_datablock(csd, 16)) {                          /* Read partial block */
 863             for (n = 64 - 16; n; n--) rcvr_spi();   /* Purge trailing data */
 864             *(DWORD*)buff = 16UL << (csd[10] >> 4);
 865             res = RES_OK;
 866           }
 867         }
 868       } else {                                        /* SDC version 1.XX or MMC */
 869         if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {      /* Read CSD */
 870           if (CardType & CT_SD1) {        /* SDC version 1.XX */
 871             *(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
 872           } else {                                        /* MMC */
 873             *(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
 874           }
 875           res = RES_OK;
 876         }
 877       }
 878       break;
 879
 880     case MMC_GET_TYPE :             /* Get card type flags (1 byte) */
 881       *ptr = CardType;
 882       res = RES_OK;
 883       break;
 884
 885     case MMC_GET_CSD :              /* Receive CSD as a data block (16 bytes) */
 886       if (send_cmd(CMD9, 0) == 0              /* READ_CSD */
 887           && rcvr_datablock(ptr, 16)) {
 888         res = RES_OK;
 889       }
 890       else {
 891         TRACE_SD_CARD_EVENT(1, sd_disk_ioctl_MMC_GET_CSD, 0);
 892       }
 893       break;
 894
 895     case MMC_GET_CID :              /* Receive CID as a data block (16 bytes) */
 896       if (send_cmd(CMD10, 0) == 0             /* READ_CID */
 897           && rcvr_datablock(ptr, 16)) {
 898         res = RES_OK;
 899       }
 900       else {
 901         TRACE_SD_CARD_EVENT(1, sd_disk_ioctl_MMC_GET_CID, 0);
 902       }
 903       break;
 904
 905     case MMC_GET_OCR :              /* Receive OCR as an R3 resp (4 bytes) */
 906       if (send_cmd(CMD58, 0) == 0) {  /* READ_OCR */
 907         for (n = 4; n; n--) *ptr++ = rcvr_spi();
 908         res = RES_OK;
 909       }
 910       else {
 911         TRACE_SD_CARD_EVENT(1, sd_disk_ioctl_MMC_GET_OCR, 0);
 912       }
 913       break;
 914
 915     case MMC_GET_SDSTAT :   /* Receive SD status as a data block (64 bytes) */
 916       if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
 917         rcvr_spi();
 918         if (rcvr_datablock(ptr, 64)) {
 919           res = RES_OK;
 920         }
 921         else {
 922           TRACE_SD_CARD_EVENT(1, sd_disk_ioctl_MMC_GET_SDSTAT_1, 0);
 923         }
 924       }
 925       else {
 926         TRACE_SD_CARD_EVENT(1, sd_disk_ioctl_MMC_GET_SDSTAT_2, 0);
 927       }
 928       break;
 929
 930     default:
 931       res = RES_PARERR;
 932     }
 933
 934     release_spi();
 935   }
 936
 937   return res;
 938 }
 939
 940
 941 /*-----------------------------------------------------------------------*/
 942 /* Device Timer Interrupt Procedure  (Platform dependent)                */
 943 /*-----------------------------------------------------------------------*/
 944 /* This function must be called in period of 10ms                        */
 945
 946 void sdPoll10ms()
 947 {
 948   static DWORD pv;
 949   DWORD ns;
 950   BYTE n, s;
 951
 952
 953   n = Timer1;                /* 100Hz decrement timers */
 954   if (n) Timer1 = --n;
 955   n = Timer2;
 956   if (n) Timer2 = --n;
 957
 958   ns = pv;
 959   pv = socket_is_empty() | socket_is_write_protected();   /* Sample socket switch */
 960
 961   if (ns == pv) {                         /* Have contacts stabled? */
 962     s = Stat;
 963
 964     if (pv & socket_state_mask_wp)      /* WP is H (write protected) */
 965             s |= STA_PROTECT;
 966     else                                /* WP is L (write enabled) */
 967             s &= ~STA_PROTECT;
 968
 969     if (pv & socket_state_mask_cp)      /* INS = H (Socket empty) */
 970             s |= (STA_NODISK | STA_NOINIT);
 971     else                                /* INS = L (Card inserted) */
 972             s &= ~STA_NODISK;
 973
 974     Stat = s;
 975   }
 976 }
 977
 978 // TODO everything here should not be in the driver layer ...
 979
 980 FATFS g_FATFS_Obj;
 981 #if defined(LOG_TELEMETRY)
 982 FIL g_telemetryFile = {};
 983 #endif
 984
 985 #if defined(BOOT)
 986 void sdInit(void)
 987 {
 988   if (f_mount(&g_FATFS_Obj, "", 1) == FR_OK) {
 989     f_chdir("/");
 990   }
 991 }
 992 #else
 993 // TODO shouldn't be there!
 994 void sdInit(void)
 995 {
 996   TRACE("sdInit");
 997
 998   ioMutex = CoCreateMutex();
 999   if (ioMutex >= CFG_MAX_MUTEX) {
1000     //sd error
1001     return;
1002   }
1003   sdMount();
1004 }
1005
1006 void sdMount()
1007 {
1008   TRACE("sdMount");
1009   if (f_mount(&g_FATFS_Obj, "", 1) == FR_OK) {
1010     // call sdGetFreeSectors() now because f_getfree() takes a long time first time it's called
1011     sdGetFreeSectors();
1012
1013 #if defined(LOG_TELEMETRY)
1014     f_open(&g_telemetryFile, LOGS_PATH "/telemetry.log", FA_OPEN_ALWAYS | FA_WRITE);
1015     if (f_size(&g_telemetryFile) > 0) {
1016       f_lseek(&g_telemetryFile, f_size(&g_telemetryFile)); // append
1017     }
1018 #endif
1019   }
1020 }
1021
1022 void sdDone()
1023 {
1024   if (sdMounted()) {
1025     audioQueue.stopSD();
1026 #if defined(LOG_TELEMETRY)
1027     f_close(&g_telemetryFile);
1028 #endif
1029     f_mount(nullptr, "", 0); // unmount SD
1030   }
1031 }
1032 #endif
1033
1034 uint32_t sdMounted()
1035 {
1036   return g_FATFS_Obj.fs_type != 0;
1037 }
1038
1039 uint32_t sdIsHC()
1040 {
1041   return (CardType & CT_BLOCK);
1042 }
1043
1044 uint32_t sdGetSpeed()
1045 {
1046   return 330000;
1047 }