source/soc-codec/Kinets/dma/edma_mk70.c

   1 /**HEADER********************************************************************
   2 *
   3 * Copyright (c) 2013 Freescale Semiconductor;
   4 * All Rights Reserved
   5 *
   6 ***************************************************************************
   7 *
   8 * THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESSED OR
   9 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  10 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  11 * IN NO EVENT SHALL FREESCALE OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  12 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  13 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  14 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  15 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  16 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  17 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  18 * THE POSSIBILITY OF SUCH DAMAGE.
  19 *
  20 **************************************************************************
  21 *
  22 * $FileName: edma_mk60.c$
  23 * $Version : 4.0.1.0$
  24 * $Date    : Mar-20-2013$
  25 *
  26 * Comments:
  27 *
  28 *   This file contains CPU specific eDMA functions.
  29 *
  30 *END************************************************************************/
  31
  32 #include <mqx.h>
  33 #include <bsp.h>
  34 #include "edma.h"
  35
  36 uint_32 _bsp_get_edma_done_vector(uint_8 channel)
  37 {
  38
  39         if (channel > EDMA_CHANNELS)
  40                 return 0;
  41
  42         return INT_DMA0_DMA16 + channel % DMAMUX_CHANNLES;
  43 }
  44
  45 uint_32 _bsp_get_edma_error_vector(uint_8 channel)
  46 {
  47         return INT_DMA_Error;
  48 }
  49
  50 void _bsp_enable_dma(uint_8 module)
  51 {
  52 //      SIM_SCGC6 |= SIM_SCGC6_DMAMUX_MASK;
  53         SIM_SCGC7 |= SIM_SCGC7_DMA_MASK;
  54         SIM_SCGC6 |= SIM_SCGC6_DMAMUX0_MASK | SIM_SCGC6_DMAMUX1_MASK;
  55 }
  56