cpufreq/amd-pstate: Stop caching EPP
[pf-kernel.git] / drivers / crypto / intel / iaa / iaa_crypto.h
blob56985e39526373fb7132c77e605d4b8dc91eb4a9
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2021 Intel Corporation. All rights rsvd. */
4 #ifndef __IAA_CRYPTO_H__
5 #define __IAA_CRYPTO_H__
7 #include <linux/crypto.h>
8 #include <linux/idxd.h>
9 #include <uapi/linux/idxd.h>
11 #define IDXD_SUBDRIVER_NAME "crypto"
13 #define IAA_DECOMP_ENABLE BIT(0)
14 #define IAA_DECOMP_FLUSH_OUTPUT BIT(1)
15 #define IAA_DECOMP_CHECK_FOR_EOB BIT(2)
16 #define IAA_DECOMP_STOP_ON_EOB BIT(3)
17 #define IAA_DECOMP_SUPPRESS_OUTPUT BIT(9)
19 #define IAA_COMP_FLUSH_OUTPUT BIT(1)
20 #define IAA_COMP_APPEND_EOB BIT(2)
22 #define IAA_COMPLETION_TIMEOUT 1000000
24 #define IAA_ANALYTICS_ERROR 0x0a
25 #define IAA_ERROR_DECOMP_BUF_OVERFLOW 0x0b
26 #define IAA_ERROR_COMP_BUF_OVERFLOW 0x19
27 #define IAA_ERROR_WATCHDOG_EXPIRED 0x24
29 #define IAA_COMP_MODES_MAX 2
31 #define FIXED_HDR 0x2
32 #define FIXED_HDR_SIZE 3
34 #define IAA_COMP_FLAGS (IAA_COMP_FLUSH_OUTPUT | \
35 IAA_COMP_APPEND_EOB)
37 #define IAA_DECOMP_FLAGS (IAA_DECOMP_ENABLE | \
38 IAA_DECOMP_FLUSH_OUTPUT | \
39 IAA_DECOMP_CHECK_FOR_EOB | \
40 IAA_DECOMP_STOP_ON_EOB)
42 /* Representation of IAA workqueue */
43 struct iaa_wq {
44 struct list_head list;
46 struct idxd_wq *wq;
47 int ref;
48 bool remove;
50 struct iaa_device *iaa_device;
52 atomic64_t comp_calls;
53 atomic64_t comp_bytes;
54 atomic64_t decomp_calls;
55 atomic64_t decomp_bytes;
58 struct iaa_device_compression_mode {
59 const char *name;
61 struct aecs_comp_table_record *aecs_comp_table;
63 dma_addr_t aecs_comp_table_dma_addr;
66 /* Representation of IAA device with wqs, populated by probe */
67 struct iaa_device {
68 struct list_head list;
69 struct idxd_device *idxd;
71 struct iaa_device_compression_mode *compression_modes[IAA_COMP_MODES_MAX];
73 int n_wq;
74 struct list_head wqs;
76 atomic64_t comp_calls;
77 atomic64_t comp_bytes;
78 atomic64_t decomp_calls;
79 atomic64_t decomp_bytes;
82 struct wq_table_entry {
83 struct idxd_wq **wqs;
84 int max_wqs;
85 int n_wqs;
86 int cur_wq;
89 #define IAA_AECS_ALIGN 32
92 * Analytics Engine Configuration and State (AECS) contains parameters and
93 * internal state of the analytics engine.
95 struct aecs_comp_table_record {
96 u32 crc;
97 u32 xor_checksum;
98 u32 reserved0[5];
99 u32 num_output_accum_bits;
100 u8 output_accum[256];
101 u32 ll_sym[286];
102 u32 reserved1;
103 u32 reserved2;
104 u32 d_sym[30];
105 u32 reserved_padding[2];
106 } __packed;
108 int iaa_aecs_init_fixed(void);
109 void iaa_aecs_cleanup_fixed(void);
111 typedef int (*iaa_dev_comp_init_fn_t) (struct iaa_device_compression_mode *mode);
112 typedef int (*iaa_dev_comp_free_fn_t) (struct iaa_device_compression_mode *mode);
114 struct iaa_compression_mode {
115 const char *name;
116 u32 *ll_table;
117 int ll_table_size;
118 u32 *d_table;
119 int d_table_size;
120 iaa_dev_comp_init_fn_t init;
121 iaa_dev_comp_free_fn_t free;
124 int add_iaa_compression_mode(const char *name,
125 const u32 *ll_table,
126 int ll_table_size,
127 const u32 *d_table,
128 int d_table_size,
129 iaa_dev_comp_init_fn_t init,
130 iaa_dev_comp_free_fn_t free);
132 void remove_iaa_compression_mode(const char *name);
134 enum iaa_mode {
135 IAA_MODE_FIXED,
138 struct iaa_compression_ctx {
139 enum iaa_mode mode;
140 bool verify_compress;
141 bool async_mode;
142 bool use_irq;
145 extern struct list_head iaa_devices;
146 extern struct mutex iaa_devices_lock;
148 #endif