2 tristate "CTU CAN-FD IP core" if COMPILE_TEST
4 This driver adds support for the CTU CAN FD open-source IP core.
5 More documentation and core sources at project page
6 (https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core).
7 The core integration to Xilinx Zynq system as platform driver
8 is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top).
9 Implementation on Intel FPGA-based PCI Express board is available
10 from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd) and
11 on Intel SoC from project (https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd).
12 Guidepost CTU FEE CAN bus projects page https://canbus.pages.fel.cvut.cz/ .
14 config CAN_CTUCANFD_PCI
15 tristate "CTU CAN-FD IP core PCI/PCIe driver"
19 This driver adds PCI/PCIe support for CTU CAN-FD IP core.
20 The project providing FPGA design for Intel EP4CGX15 based DB4CGX15
21 PCIe board with PiKRON.com designed transceiver riser shield is available
22 at https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd .
24 config CAN_CTUCANFD_PLATFORM
25 tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"
26 depends on HAS_IOMEM && OF
29 The core has been tested together with OpenCores SJA1000
30 modified to be CAN FD frames tolerant on MicroZed Zynq based
31 MZ_APO education kits designed by Petr Porazil from PiKRON.com
32 company. FPGA design https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top.
33 The kit description at the Computer Architectures course pages
34 https://cw.fel.cvut.cz/wiki/courses/b35apo/documentation/mz_apo/start .