1 // SPDX-License-Identifier: GPL-2.0
3 // mcp251xfd - Microchip MCP251xFD Family CAN controller driver
5 // Copyright (c) 2019, 2020, 2021, 2023 Pengutronix,
6 // Marc Kleine-Budde <kernel@pengutronix.de>
10 // CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface
12 // Copyright (c) 2019 Martin Sperl <kernel@martin.sperl.org>
15 #include <linux/bitfield.h>
17 #include "mcp251xfd.h"
19 static inline bool mcp251xfd_tx_fifo_sta_empty(u32 fifo_sta
)
21 return fifo_sta
& MCP251XFD_REG_FIFOSTA_TFERFFIF
;
24 static inline bool mcp251xfd_tx_fifo_sta_less_than_half_full(u32 fifo_sta
)
26 return fifo_sta
& MCP251XFD_REG_FIFOSTA_TFHRFHIF
;
30 mcp251xfd_tef_tail_get_from_chip(const struct mcp251xfd_priv
*priv
,
36 err
= regmap_read(priv
->map_reg
, MCP251XFD_REG_TEFUA
, &tef_ua
);
40 *tef_tail
= tef_ua
/ sizeof(struct mcp251xfd_hw_tef_obj
);
45 static int mcp251xfd_check_tef_tail(const struct mcp251xfd_priv
*priv
)
47 u8 tef_tail_chip
, tef_tail
;
50 if (!IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY
))
53 err
= mcp251xfd_tef_tail_get_from_chip(priv
, &tef_tail_chip
);
57 tef_tail
= mcp251xfd_get_tef_tail(priv
);
58 if (tef_tail_chip
!= tef_tail
) {
59 netdev_err(priv
->ndev
,
60 "TEF tail of chip (0x%02x) and ours (0x%08x) inconsistent.\n",
61 tef_tail_chip
, tef_tail
);
69 mcp251xfd_handle_tefif_one(struct mcp251xfd_priv
*priv
,
70 const struct mcp251xfd_hw_tef_obj
*hw_tef_obj
,
71 unsigned int *frame_len_ptr
)
73 struct net_device_stats
*stats
= &priv
->ndev
->stats
;
74 u32 seq
, tef_tail_masked
, tef_tail
;
77 /* Use the MCP2517FD mask on the MCP2518FD, too. We only
78 * compare 7 bits, this is enough to detect old TEF objects.
80 seq
= FIELD_GET(MCP251XFD_OBJ_FLAGS_SEQ_MCP2517FD_MASK
,
82 tef_tail_masked
= priv
->tef
->tail
&
83 field_mask(MCP251XFD_OBJ_FLAGS_SEQ_MCP2517FD_MASK
);
85 /* According to mcp2518fd erratum DS80000789E 6. the FIFOCI
86 * bits of a FIFOSTA register, here the TX FIFO tail index
87 * might be corrupted and we might process past the TEF FIFO's
88 * head into old CAN frames.
90 * Compare the sequence number of the currently processed CAN
91 * frame with the expected sequence number. Abort with
92 * -EBADMSG if an old CAN frame is detected.
94 if (seq
!= tef_tail_masked
) {
95 netdev_dbg(priv
->ndev
, "%s: chip=0x%02x ring=0x%02x\n", __func__
,
96 seq
, tef_tail_masked
);
97 stats
->tx_fifo_errors
++;
102 tef_tail
= mcp251xfd_get_tef_tail(priv
);
103 skb
= priv
->can
.echo_skb
[tef_tail
];
105 mcp251xfd_skb_set_timestamp_raw(priv
, skb
, hw_tef_obj
->ts
);
107 can_rx_offload_get_echo_skb_queue_timestamp(&priv
->offload
,
108 tef_tail
, hw_tef_obj
->ts
,
117 mcp251xfd_get_tef_len(struct mcp251xfd_priv
*priv
, u8
*len_p
)
119 const struct mcp251xfd_tx_ring
*tx_ring
= priv
->tx
;
120 const u8 shift
= tx_ring
->obj_num_shift_to_u8
;
121 u8 chip_tx_tail
, tail
, len
;
125 err
= regmap_read(priv
->map_reg
, MCP251XFD_REG_FIFOSTA(priv
->tx
->fifo_nr
),
130 /* If the chip says the TX-FIFO is empty, but there are no TX
131 * buffers free in the ring, we assume all have been sent.
133 if (mcp251xfd_tx_fifo_sta_empty(fifo_sta
) &&
134 mcp251xfd_get_tx_free(tx_ring
) == 0) {
135 *len_p
= tx_ring
->obj_num
;
139 chip_tx_tail
= FIELD_GET(MCP251XFD_REG_FIFOSTA_FIFOCI_MASK
, fifo_sta
);
141 err
= mcp251xfd_check_tef_tail(priv
);
144 tail
= mcp251xfd_get_tef_tail(priv
);
146 /* First shift to full u8. The subtraction works on signed
147 * values, that keeps the difference steady around the u8
148 * overflow. The right shift acts on len, which is an u8.
150 BUILD_BUG_ON(sizeof(tx_ring
->obj_num
) != sizeof(chip_tx_tail
));
151 BUILD_BUG_ON(sizeof(tx_ring
->obj_num
) != sizeof(tail
));
152 BUILD_BUG_ON(sizeof(tx_ring
->obj_num
) != sizeof(len
));
154 len
= (chip_tx_tail
<< shift
) - (tail
<< shift
);
157 /* According to mcp2518fd erratum DS80000789E 6. the FIFOCI
158 * bits of a FIFOSTA register, here the TX-FIFO tail index
159 * might be corrupted.
161 * However here it seems the bit indicating that the TX-FIFO
162 * is empty (MCP251XFD_REG_FIFOSTA_TFERFFIF) is not correct
163 * while the TX-FIFO tail index is.
165 * We assume the TX-FIFO is empty, i.e. all pending CAN frames
166 * haven been send, if:
167 * - Chip's head and tail index are equal (len == 0).
168 * - The TX-FIFO is less than half full.
169 * (The TX-FIFO empty case has already been checked at the
170 * beginning of this function.)
171 * - No free buffers in the TX ring.
173 if (len
== 0 && mcp251xfd_tx_fifo_sta_less_than_half_full(fifo_sta
) &&
174 mcp251xfd_get_tx_free(tx_ring
) == 0)
175 len
= tx_ring
->obj_num
;
183 mcp251xfd_tef_obj_read(const struct mcp251xfd_priv
*priv
,
184 struct mcp251xfd_hw_tef_obj
*hw_tef_obj
,
185 const u8 offset
, const u8 len
)
187 const struct mcp251xfd_tx_ring
*tx_ring
= priv
->tx
;
188 const int val_bytes
= regmap_get_val_bytes(priv
->map_rx
);
190 if (IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY
) &&
191 (offset
> tx_ring
->obj_num
||
192 len
> tx_ring
->obj_num
||
193 offset
+ len
> tx_ring
->obj_num
)) {
194 netdev_err(priv
->ndev
,
195 "Trying to read too many TEF objects (max=%d, offset=%d, len=%d).\n",
196 tx_ring
->obj_num
, offset
, len
);
200 return regmap_bulk_read(priv
->map_rx
,
201 mcp251xfd_get_tef_obj_addr(offset
),
203 sizeof(*hw_tef_obj
) / val_bytes
* len
);
206 static inline void mcp251xfd_ecc_tefif_successful(struct mcp251xfd_priv
*priv
)
208 struct mcp251xfd_ecc
*ecc
= &priv
->ecc
;
213 int mcp251xfd_handle_tefif(struct mcp251xfd_priv
*priv
)
215 struct mcp251xfd_hw_tef_obj hw_tef_obj
[MCP251XFD_TX_OBJ_NUM_MAX
];
216 unsigned int total_frame_len
= 0;
220 err
= mcp251xfd_get_tef_len(priv
, &len
);
224 tef_tail
= mcp251xfd_get_tef_tail(priv
);
225 l
= mcp251xfd_get_tef_linear_len(priv
, len
);
226 err
= mcp251xfd_tef_obj_read(priv
, hw_tef_obj
, tef_tail
, l
);
231 err
= mcp251xfd_tef_obj_read(priv
, &hw_tef_obj
[l
], 0, len
- l
);
236 for (i
= 0; i
< len
; i
++) {
237 unsigned int frame_len
= 0;
239 err
= mcp251xfd_handle_tefif_one(priv
, &hw_tef_obj
[i
], &frame_len
);
240 /* -EBADMSG means we're affected by mcp2518fd erratum
241 * DS80000789E 6., i.e. the Sequence Number in the TEF
242 * doesn't match our tef_tail. Don't process any
243 * further and mark processed frames as good.
246 goto out_netif_wake_queue
;
250 total_frame_len
+= frame_len
;
253 out_netif_wake_queue
:
254 len
= i
; /* number of handled goods TEFs */
256 struct mcp251xfd_tef_ring
*ring
= priv
->tef
;
257 struct mcp251xfd_tx_ring
*tx_ring
= priv
->tx
;
262 /* Increment the TEF FIFO tail pointer 'len' times in
263 * a single SPI message.
266 * Calculate offset, so that the SPI transfer ends on
267 * the last message of the uinc_xfer array, which has
268 * "cs_change == 0", to properly deactivate the chip
271 offset
= ARRAY_SIZE(ring
->uinc_xfer
) - len
;
272 err
= spi_sync_transfer(priv
->spi
,
273 ring
->uinc_xfer
+ offset
, len
);
277 tx_ring
->tail
+= len
;
278 netdev_completed_queue(priv
->ndev
, len
, total_frame_len
);
280 err
= mcp251xfd_check_tef_tail(priv
);
285 mcp251xfd_ecc_tefif_successful(priv
);
287 if (mcp251xfd_get_tx_free(priv
->tx
)) {
288 /* Make sure that anybody stopping the queue after
289 * this sees the new tx_ring->tail.
292 netif_wake_queue(priv
->ndev
);
295 if (priv
->tx_coalesce_usecs_irq
)
296 hrtimer_start(&priv
->tx_irq_timer
,
297 ns_to_ktime(priv
->tx_coalesce_usecs_irq
*