1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019, Linaro Ltd
5 #include <linux/clk-provider.h>
6 #include <linux/debugfs.h>
7 #include <linux/interrupt.h>
9 #include <linux/mailbox_client.h>
10 #include <linux/module.h>
11 #include <linux/of_platform.h>
12 #include <linux/platform_device.h>
13 #include <linux/thermal.h>
14 #include <linux/slab.h>
15 #include <linux/soc/qcom/qcom_aoss.h>
17 #define CREATE_TRACE_POINTS
18 #include "trace-aoss.h"
20 #define QMP_DESC_MAGIC 0x0
21 #define QMP_DESC_VERSION 0x4
22 #define QMP_DESC_FEATURES 0x8
24 /* AOP-side offsets */
25 #define QMP_DESC_UCORE_LINK_STATE 0xc
26 #define QMP_DESC_UCORE_LINK_STATE_ACK 0x10
27 #define QMP_DESC_UCORE_CH_STATE 0x14
28 #define QMP_DESC_UCORE_CH_STATE_ACK 0x18
29 #define QMP_DESC_UCORE_MBOX_SIZE 0x1c
30 #define QMP_DESC_UCORE_MBOX_OFFSET 0x20
32 /* Linux-side offsets */
33 #define QMP_DESC_MCORE_LINK_STATE 0x24
34 #define QMP_DESC_MCORE_LINK_STATE_ACK 0x28
35 #define QMP_DESC_MCORE_CH_STATE 0x2c
36 #define QMP_DESC_MCORE_CH_STATE_ACK 0x30
37 #define QMP_DESC_MCORE_MBOX_SIZE 0x34
38 #define QMP_DESC_MCORE_MBOX_OFFSET 0x38
40 #define QMP_STATE_UP GENMASK(15, 0)
41 #define QMP_STATE_DOWN GENMASK(31, 16)
43 #define QMP_MAGIC 0x4d41494c /* mail */
46 /* 64 bytes is enough to store the requests and provides padding to 4 bytes */
47 #define QMP_MSG_LEN 64
49 #define QMP_NUM_COOLING_RESOURCES 2
51 #define QMP_DEBUGFS_FILES 4
53 static bool qmp_cdev_max_state
= 1;
55 struct qmp_cooling_device
{
56 struct thermal_cooling_device
*cdev
;
63 * struct qmp - driver state for QMP implementation
64 * @msgram: iomem referencing the message RAM used for communication
65 * @dev: reference to QMP device
66 * @mbox_client: mailbox client used to ring the doorbell on transmit
67 * @mbox_chan: mailbox channel used to ring the doorbell on transmit
68 * @offset: offset within @msgram where messages should be written
69 * @size: maximum size of the messages to be transmitted
70 * @event: wait_queue for synchronization with the IRQ
71 * @tx_lock: provides synchronization between multiple callers of qmp_send()
72 * @qdss_clk: QDSS clock hw struct
73 * @cooling_devs: thermal cooling devices
74 * @debugfs_root: directory for the developer/tester interface
75 * @debugfs_files: array of individual debugfs entries under debugfs_root
81 struct mbox_client mbox_client
;
82 struct mbox_chan
*mbox_chan
;
87 wait_queue_head_t event
;
91 struct clk_hw qdss_clk
;
92 struct qmp_cooling_device
*cooling_devs
;
93 struct dentry
*debugfs_root
;
94 struct dentry
*debugfs_files
[QMP_DEBUGFS_FILES
];
97 static void qmp_kick(struct qmp
*qmp
)
99 mbox_send_message(qmp
->mbox_chan
, NULL
);
100 mbox_client_txdone(qmp
->mbox_chan
, 0);
103 static bool qmp_magic_valid(struct qmp
*qmp
)
105 return readl(qmp
->msgram
+ QMP_DESC_MAGIC
) == QMP_MAGIC
;
108 static bool qmp_link_acked(struct qmp
*qmp
)
110 return readl(qmp
->msgram
+ QMP_DESC_MCORE_LINK_STATE_ACK
) == QMP_STATE_UP
;
113 static bool qmp_mcore_channel_acked(struct qmp
*qmp
)
115 return readl(qmp
->msgram
+ QMP_DESC_MCORE_CH_STATE_ACK
) == QMP_STATE_UP
;
118 static bool qmp_ucore_channel_up(struct qmp
*qmp
)
120 return readl(qmp
->msgram
+ QMP_DESC_UCORE_CH_STATE
) == QMP_STATE_UP
;
123 static int qmp_open(struct qmp
*qmp
)
128 if (!qmp_magic_valid(qmp
)) {
129 dev_err(qmp
->dev
, "QMP magic doesn't match\n");
133 val
= readl(qmp
->msgram
+ QMP_DESC_VERSION
);
134 if (val
!= QMP_VERSION
) {
135 dev_err(qmp
->dev
, "unsupported QMP version %d\n", val
);
139 qmp
->offset
= readl(qmp
->msgram
+ QMP_DESC_MCORE_MBOX_OFFSET
);
140 qmp
->size
= readl(qmp
->msgram
+ QMP_DESC_MCORE_MBOX_SIZE
);
142 dev_err(qmp
->dev
, "invalid mailbox size\n");
146 /* Ack remote core's link state */
147 val
= readl(qmp
->msgram
+ QMP_DESC_UCORE_LINK_STATE
);
148 writel(val
, qmp
->msgram
+ QMP_DESC_UCORE_LINK_STATE_ACK
);
150 /* Set local core's link state to up */
151 writel(QMP_STATE_UP
, qmp
->msgram
+ QMP_DESC_MCORE_LINK_STATE
);
155 ret
= wait_event_timeout(qmp
->event
, qmp_link_acked(qmp
), HZ
);
157 dev_err(qmp
->dev
, "ucore didn't ack link\n");
158 goto timeout_close_link
;
161 writel(QMP_STATE_UP
, qmp
->msgram
+ QMP_DESC_MCORE_CH_STATE
);
165 ret
= wait_event_timeout(qmp
->event
, qmp_ucore_channel_up(qmp
), HZ
);
167 dev_err(qmp
->dev
, "ucore didn't open channel\n");
168 goto timeout_close_channel
;
171 /* Ack remote core's channel state */
172 writel(QMP_STATE_UP
, qmp
->msgram
+ QMP_DESC_UCORE_CH_STATE_ACK
);
176 ret
= wait_event_timeout(qmp
->event
, qmp_mcore_channel_acked(qmp
), HZ
);
178 dev_err(qmp
->dev
, "ucore didn't ack channel\n");
179 goto timeout_close_channel
;
184 timeout_close_channel
:
185 writel(QMP_STATE_DOWN
, qmp
->msgram
+ QMP_DESC_MCORE_CH_STATE
);
188 writel(QMP_STATE_DOWN
, qmp
->msgram
+ QMP_DESC_MCORE_LINK_STATE
);
194 static void qmp_close(struct qmp
*qmp
)
196 writel(QMP_STATE_DOWN
, qmp
->msgram
+ QMP_DESC_MCORE_CH_STATE
);
197 writel(QMP_STATE_DOWN
, qmp
->msgram
+ QMP_DESC_MCORE_LINK_STATE
);
201 static irqreturn_t
qmp_intr(int irq
, void *data
)
203 struct qmp
*qmp
= data
;
205 wake_up_all(&qmp
->event
);
210 static bool qmp_message_empty(struct qmp
*qmp
)
212 return readl(qmp
->msgram
+ qmp
->offset
) == 0;
216 * qmp_send() - send a message to the AOSS
218 * @fmt: format string for message to be sent
219 * @...: arguments for the format string
221 * Transmit message to AOSS and wait for the AOSS to acknowledge the message.
222 * data must not be longer than the mailbox size. Access is synchronized by
223 * this implementation.
225 * Return: 0 on success, negative errno on failure
227 int __printf(2, 3) qmp_send(struct qmp
*qmp
, const char *fmt
, ...)
229 char buf
[QMP_MSG_LEN
];
235 if (WARN_ON(IS_ERR_OR_NULL(qmp
) || !fmt
))
238 memset(buf
, 0, sizeof(buf
));
240 len
= vsnprintf(buf
, sizeof(buf
), fmt
, args
);
243 if (WARN_ON(len
>= sizeof(buf
)))
246 mutex_lock(&qmp
->tx_lock
);
248 trace_aoss_send(buf
);
250 /* The message RAM only implements 32-bit accesses */
251 __iowrite32_copy(qmp
->msgram
+ qmp
->offset
+ sizeof(u32
),
252 buf
, sizeof(buf
) / sizeof(u32
));
253 writel(sizeof(buf
), qmp
->msgram
+ qmp
->offset
);
255 /* Read back length to confirm data written in message RAM */
256 readl(qmp
->msgram
+ qmp
->offset
);
259 time_left
= wait_event_interruptible_timeout(qmp
->event
,
260 qmp_message_empty(qmp
), HZ
);
262 dev_err(qmp
->dev
, "ucore did not ack channel\n");
265 /* Clear message from buffer */
266 writel(0, qmp
->msgram
+ qmp
->offset
);
271 trace_aoss_send_done(buf
, ret
);
273 mutex_unlock(&qmp
->tx_lock
);
277 EXPORT_SYMBOL_GPL(qmp_send
);
279 static int qmp_qdss_clk_prepare(struct clk_hw
*hw
)
281 static const char *buf
= "{class: clock, res: qdss, val: 1}";
282 struct qmp
*qmp
= container_of(hw
, struct qmp
, qdss_clk
);
284 return qmp_send(qmp
, buf
);
287 static void qmp_qdss_clk_unprepare(struct clk_hw
*hw
)
289 static const char *buf
= "{class: clock, res: qdss, val: 0}";
290 struct qmp
*qmp
= container_of(hw
, struct qmp
, qdss_clk
);
295 static const struct clk_ops qmp_qdss_clk_ops
= {
296 .prepare
= qmp_qdss_clk_prepare
,
297 .unprepare
= qmp_qdss_clk_unprepare
,
300 static int qmp_qdss_clk_add(struct qmp
*qmp
)
302 static const struct clk_init_data qdss_init
= {
303 .ops
= &qmp_qdss_clk_ops
,
308 qmp
->qdss_clk
.init
= &qdss_init
;
309 ret
= clk_hw_register(qmp
->dev
, &qmp
->qdss_clk
);
311 dev_err(qmp
->dev
, "failed to register qdss clock\n");
315 ret
= of_clk_add_hw_provider(qmp
->dev
->of_node
, of_clk_hw_simple_get
,
318 dev_err(qmp
->dev
, "unable to register of clk hw provider\n");
319 clk_hw_unregister(&qmp
->qdss_clk
);
325 static void qmp_qdss_clk_remove(struct qmp
*qmp
)
327 of_clk_del_provider(qmp
->dev
->of_node
);
328 clk_hw_unregister(&qmp
->qdss_clk
);
331 static int qmp_cdev_get_max_state(struct thermal_cooling_device
*cdev
,
332 unsigned long *state
)
334 *state
= qmp_cdev_max_state
;
338 static int qmp_cdev_get_cur_state(struct thermal_cooling_device
*cdev
,
339 unsigned long *state
)
341 struct qmp_cooling_device
*qmp_cdev
= cdev
->devdata
;
343 *state
= qmp_cdev
->state
;
347 static int qmp_cdev_set_cur_state(struct thermal_cooling_device
*cdev
,
350 struct qmp_cooling_device
*qmp_cdev
= cdev
->devdata
;
354 /* Normalize state */
355 cdev_state
= !!state
;
357 if (qmp_cdev
->state
== state
)
360 ret
= qmp_send(qmp_cdev
->qmp
, "{class: volt_flr, event:zero_temp, res:%s, value:%s}",
361 qmp_cdev
->name
, cdev_state
? "on" : "off");
363 qmp_cdev
->state
= cdev_state
;
368 static const struct thermal_cooling_device_ops qmp_cooling_device_ops
= {
369 .get_max_state
= qmp_cdev_get_max_state
,
370 .get_cur_state
= qmp_cdev_get_cur_state
,
371 .set_cur_state
= qmp_cdev_set_cur_state
,
374 static int qmp_cooling_device_add(struct qmp
*qmp
,
375 struct qmp_cooling_device
*qmp_cdev
,
376 struct device_node
*node
)
378 char *cdev_name
= (char *)node
->name
;
381 qmp_cdev
->state
= !qmp_cdev_max_state
;
382 qmp_cdev
->name
= cdev_name
;
383 qmp_cdev
->cdev
= devm_thermal_of_cooling_device_register
386 qmp_cdev
, &qmp_cooling_device_ops
);
388 if (IS_ERR(qmp_cdev
->cdev
))
389 dev_err(qmp
->dev
, "unable to register %s cooling device\n",
392 return PTR_ERR_OR_ZERO(qmp_cdev
->cdev
);
395 static int qmp_cooling_devices_register(struct qmp
*qmp
)
397 struct device_node
*np
;
401 np
= qmp
->dev
->of_node
;
403 qmp
->cooling_devs
= devm_kcalloc(qmp
->dev
, QMP_NUM_COOLING_RESOURCES
,
404 sizeof(*qmp
->cooling_devs
),
407 if (!qmp
->cooling_devs
)
410 for_each_available_child_of_node_scoped(np
, child
) {
411 if (!of_property_present(child
, "#cooling-cells"))
413 ret
= qmp_cooling_device_add(qmp
, &qmp
->cooling_devs
[count
++],
420 devm_kfree(qmp
->dev
, qmp
->cooling_devs
);
426 thermal_cooling_device_unregister
427 (qmp
->cooling_devs
[count
].cdev
);
428 devm_kfree(qmp
->dev
, qmp
->cooling_devs
);
433 static void qmp_cooling_devices_remove(struct qmp
*qmp
)
437 for (i
= 0; i
< QMP_NUM_COOLING_RESOURCES
; i
++)
438 thermal_cooling_device_unregister(qmp
->cooling_devs
[i
].cdev
);
442 * qmp_get() - get a qmp handle from a device
443 * @dev: client device pointer
445 * Return: handle to qmp device on success, ERR_PTR() on failure
447 struct qmp
*qmp_get(struct device
*dev
)
449 struct platform_device
*pdev
;
450 struct device_node
*np
;
453 if (!dev
|| !dev
->of_node
)
454 return ERR_PTR(-EINVAL
);
456 np
= of_parse_phandle(dev
->of_node
, "qcom,qmp", 0);
458 return ERR_PTR(-ENODEV
);
460 pdev
= of_find_device_by_node(np
);
463 return ERR_PTR(-EINVAL
);
465 qmp
= platform_get_drvdata(pdev
);
468 put_device(&pdev
->dev
);
469 return ERR_PTR(-EPROBE_DEFER
);
473 EXPORT_SYMBOL_GPL(qmp_get
);
476 * qmp_put() - release a qmp handle
477 * @qmp: qmp handle obtained from qmp_get()
479 void qmp_put(struct qmp
*qmp
)
482 * Match get_device() inside of_find_device_by_node() in
485 if (!IS_ERR_OR_NULL(qmp
))
486 put_device(qmp
->dev
);
488 EXPORT_SYMBOL_GPL(qmp_put
);
490 struct qmp_debugfs_entry
{
494 const char *true_val
;
495 const char *false_val
;
498 static const struct qmp_debugfs_entry qmp_debugfs_entries
[QMP_DEBUGFS_FILES
] = {
499 { "ddr_frequency_mhz", "{class: ddr, res: fixed, val: %u}", false },
500 { "prevent_aoss_sleep", "{class: aoss_slp, res: sleep: %s}", true, "enable", "disable" },
501 { "prevent_cx_collapse", "{class: cx_mol, res: cx, val: %s}", true, "mol", "off" },
502 { "prevent_ddr_collapse", "{class: ddr_mol, res: ddr, val: %s}", true, "mol", "off" },
505 static ssize_t
qmp_debugfs_write(struct file
*file
, const char __user
*user_buf
,
506 size_t count
, loff_t
*pos
)
508 const struct qmp_debugfs_entry
*entry
= NULL
;
509 struct qmp
*qmp
= file
->private_data
;
510 char buf
[QMP_MSG_LEN
];
511 unsigned int uint_val
;
517 for (i
= 0; i
< ARRAY_SIZE(qmp
->debugfs_files
); i
++) {
518 if (qmp
->debugfs_files
[i
] == file
->f_path
.dentry
) {
519 entry
= &qmp_debugfs_entries
[i
];
526 if (entry
->is_bool
) {
527 ret
= kstrtobool_from_user(user_buf
, count
, &bool_val
);
531 str_val
= bool_val
? entry
->true_val
: entry
->false_val
;
533 ret
= snprintf(buf
, sizeof(buf
), entry
->fmt
, str_val
);
534 if (ret
>= sizeof(buf
))
537 ret
= kstrtou32_from_user(user_buf
, count
, 0, &uint_val
);
541 ret
= snprintf(buf
, sizeof(buf
), entry
->fmt
, uint_val
);
542 if (ret
>= sizeof(buf
))
546 ret
= qmp_send(qmp
, buf
);
553 static const struct file_operations qmp_debugfs_fops
= {
555 .write
= qmp_debugfs_write
,
558 static void qmp_debugfs_create(struct qmp
*qmp
)
560 const struct qmp_debugfs_entry
*entry
;
563 qmp
->debugfs_root
= debugfs_create_dir("qcom_aoss", NULL
);
565 for (i
= 0; i
< ARRAY_SIZE(qmp
->debugfs_files
); i
++) {
566 entry
= &qmp_debugfs_entries
[i
];
568 qmp
->debugfs_files
[i
] = debugfs_create_file(entry
->name
, 0200,
575 static int qmp_probe(struct platform_device
*pdev
)
581 qmp
= devm_kzalloc(&pdev
->dev
, sizeof(*qmp
), GFP_KERNEL
);
585 qmp
->dev
= &pdev
->dev
;
586 init_waitqueue_head(&qmp
->event
);
587 mutex_init(&qmp
->tx_lock
);
589 qmp
->msgram
= devm_platform_ioremap_resource(pdev
, 0);
590 if (IS_ERR(qmp
->msgram
))
591 return PTR_ERR(qmp
->msgram
);
593 qmp
->mbox_client
.dev
= &pdev
->dev
;
594 qmp
->mbox_client
.knows_txdone
= true;
595 qmp
->mbox_chan
= mbox_request_channel(&qmp
->mbox_client
, 0);
596 if (IS_ERR(qmp
->mbox_chan
)) {
597 dev_err(&pdev
->dev
, "failed to acquire ipc mailbox\n");
598 return PTR_ERR(qmp
->mbox_chan
);
601 irq
= platform_get_irq(pdev
, 0);
602 ret
= devm_request_irq(&pdev
->dev
, irq
, qmp_intr
, 0,
605 dev_err(&pdev
->dev
, "failed to request interrupt\n");
613 ret
= qmp_qdss_clk_add(qmp
);
617 ret
= qmp_cooling_devices_register(qmp
);
619 dev_err(&pdev
->dev
, "failed to register aoss cooling devices\n");
621 platform_set_drvdata(pdev
, qmp
);
623 qmp_debugfs_create(qmp
);
630 mbox_free_channel(qmp
->mbox_chan
);
635 static void qmp_remove(struct platform_device
*pdev
)
637 struct qmp
*qmp
= platform_get_drvdata(pdev
);
639 debugfs_remove_recursive(qmp
->debugfs_root
);
641 qmp_qdss_clk_remove(qmp
);
642 qmp_cooling_devices_remove(qmp
);
645 mbox_free_channel(qmp
->mbox_chan
);
648 static const struct of_device_id qmp_dt_match
[] = {
649 { .compatible
= "qcom,sc7180-aoss-qmp", },
650 { .compatible
= "qcom,sc7280-aoss-qmp", },
651 { .compatible
= "qcom,sdm845-aoss-qmp", },
652 { .compatible
= "qcom,sm8150-aoss-qmp", },
653 { .compatible
= "qcom,sm8250-aoss-qmp", },
654 { .compatible
= "qcom,sm8350-aoss-qmp", },
655 { .compatible
= "qcom,aoss-qmp", },
658 MODULE_DEVICE_TABLE(of
, qmp_dt_match
);
660 static struct platform_driver qmp_driver
= {
662 .name
= "qcom_aoss_qmp",
663 .of_match_table
= qmp_dt_match
,
664 .suppress_bind_attrs
= true,
667 .remove
= qmp_remove
,
669 module_platform_driver(qmp_driver
);
671 MODULE_DESCRIPTION("Qualcomm AOSS QMP driver");
672 MODULE_LICENSE("GPL v2");