sys/dev/ata/atavar.h

   1 /*      $OpenBSD: atavar.h,v 1.5 2000/04/10 07:06:16 csapuntz Exp $     */
   2 /*      $NetBSD: atavar.h,v 1.13 1999/03/10 13:11:43 bouyer Exp $       */
   3
   4 /*
   5  * Copyright (c) 1998 Manuel Bouyer.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. All advertising materials mentioning features or use of this software
  16  *    must display the following acknowledgement:
  17  *      This product includes software developed by the University of
  18  *      California, Berkeley and its contributors.
  19  * 4. Neither the name of the University nor the names of its contributors
  20  *    may be used to endorse or promote products derived from this software
  21  *    without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  33  * SUCH DAMAGE.
  34  *
  35  */
  36
  37 /* Hight-level functions and structures used by both ATA and ATAPI devices */
  38
  39 struct ataparams;
  40
  41 /* Datas common to drives and controller drivers */
  42 struct ata_drive_datas {
  43     u_int8_t drive; /* drive number */
  44     int8_t ata_vers; /* ATA version supported */
  45     u_int16_t drive_flags; /* bitmask for drives present/absent and cap */
  46 #define DRIVE_ATA       0x0001
  47 #define DRIVE_ATAPI     0x0002
  48 #define DRIVE_OLD       0x0004
  49 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD)
  50 #define DRIVE_CAP32     0x0008
  51 #define DRIVE_DMA       0x0010
  52 #define DRIVE_UDMA      0x0020
  53 #define DRIVE_MODE      0x0040 /* the drive reported its mode */
  54 #define DRIVE_RESET     0x0080 /* reset the drive state at next xfer */
  55 #define DRIVE_DMAERR    0x0100 /* Udma transfer had crc error, don't try DMA */
  56 #define DRIVE_DSCBA     0x0200 /* DSC in buffer availability mode */
  57 #define DRIVE_DSCWAIT   0x0400 /* In wait for DSC to be asserted */
  58
  59     /*
  60      * Current setting of drive's PIO, DMA and UDMA modes.
  61      * Is initialised by the disks drivers at attach time, and may be
  62      * changed later by the controller's code if needed
  63      */
  64     u_int8_t PIO_mode; /* Current setting of drive's PIO mode */
  65     u_int8_t DMA_mode; /* Current setting of drive's DMA mode */
  66     u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */
  67     /* Supported modes for this drive */
  68     u_int8_t PIO_cap; /* supported drive's PIO mode */
  69     u_int8_t DMA_cap; /* supported drive's DMA mode */
  70     u_int8_t UDMA_cap; /* supported drive's UDMA mode */
  71     /*
  72      * Drive state. This is drive-type (ATA or ATAPI) dependant
  73      * This is reset to 0 after a channel reset.
  74      */
  75     u_int8_t state;
  76
  77 #define ACAP_LEN            0x01  /* 16 byte commands */
  78 #define ACAP_DSC            0x02  /* use DSC signalling */
  79     /* 0x20-0x40 reserved for ATAPI_CFG_DRQ_MASK */
  80     u_int8_t atapi_cap;
  81
  82     /* Number of DMA errors. Reset to 0 after every successful transfers. */
  83     u_int8_t n_dmaerrs;
  84     /* downgrade mode after this many successive errors */
  85 #define NERRS_MAX 2
  86
  87     char drive_name[31];
  88     int  cf_flags;
  89     void *chnl_softc; /* channel softc */
  90 };
  91
  92 /* ATA/ATAPI common attachement datas */
  93 struct ata_atapi_attach {
  94     u_int8_t aa_type; /* Type of device */
  95 #define T_ATA 0
  96 #define T_ATAPI 1
  97     u_int8_t aa_channel; /* controller's channel */
  98     u_int8_t aa_openings; /* Number of simultaneous commands possible */
  99     struct ata_drive_datas *aa_drv_data;
 100     void *aa_bus_private; /* infos specifics to this bus */
 101 };
 102
 103 /* User config flags that force (or disable) the use of a mode */
 104 #define ATA_CONFIG_PIO_MODES    0x0007
 105 #define ATA_CONFIG_PIO_SET      0x0008
 106 #define ATA_CONFIG_PIO_OFF      0
 107 #define ATA_CONFIG_DMA_MODES    0x0070
 108 #define ATA_CONFIG_DMA_SET      0x0080
 109 #define ATA_CONFIG_DMA_DISABLE  0x0070
 110 #define ATA_CONFIG_DMA_OFF      4
 111 #define ATA_CONFIG_UDMA_MODES   0x0700
 112 #define ATA_CONFIG_UDMA_SET     0x0800
 113 #define ATA_CONFIG_UDMA_DISABLE 0x0700
 114 #define ATA_CONFIG_UDMA_OFF     8
 115
 116 /*
 117  * ATA/ATAPI commands description
 118  *
 119  * This structure defines the interface between the ATA/ATAPI device driver
 120  * and the controller for short commands. It contains the command's parameter,
 121  * the len of data's to read/write (if any), and a function to call upon
 122  * completion.
 123  * If no sleep is allowed, the driver can poll for command completion.
 124  * Once the command completed, if the error registed is valid, the flag
 125  * AT_ERROR is set and the error register value is copied to r_error .
 126  * A separate interface is needed for read/write or ATAPI packet commands
 127  * (which need multiple interrupts per commands).
 128  */
 129 struct wdc_command {
 130     u_int8_t r_command;  /* Parameters to upload to registers */
 131     u_int8_t r_head;
 132     u_int16_t r_cyl;
 133     u_int8_t r_sector;
 134     u_int8_t r_count;
 135     u_int8_t r_precomp;
 136     u_int8_t r_st_bmask; /* status register mask to wait for before command */
 137     u_int8_t r_st_pmask; /* status register mask to wait for after command */
 138     u_int8_t r_error;    /* error register after command done */
 139     volatile u_int16_t flags;
 140 #define AT_READ     0x0001 /* There is data to read */
 141 #define AT_WRITE    0x0002 /* There is data to write (excl. with AT_READ) */
 142 #define AT_WAIT     0x0008 /* wait in controller code for command completion */
 143 #define AT_POLL     0x0010 /* poll for command completion (no interrupts) */
 144 #define AT_DONE     0x0020 /* command is done */
 145 #define AT_ERROR    0x0040 /* command is done with error */
 146 #define AT_TIMEOU   0x0080 /* command timed out */
 147 #define AT_DF       0x0100 /* Drive fault */
 148 #define AT_READREG  0x0200 /* Read registers on completion */
 149     int timeout;         /* timeout (in ms) */
 150     void *data;          /* Data buffer address */
 151     int bcount;           /* number of bytes to transfer */
 152     void (*callback) __P((void*)); /* command to call once command completed */
 153     void *callback_arg;  /* argument passed to *callback() */
 154 };
 155
 156 extern int at_poll;
 157
 158 int wdc_exec_command __P((struct ata_drive_datas *, struct wdc_command*));
 159 #define WDC_COMPLETE 0x01
 160 #define WDC_QUEUED   0x02
 161 #define WDC_TRY_AGAIN 0x03
 162
 163 void wdc_probe_caps __P((struct ata_drive_datas*, struct ataparams *));
 164 void wdc_print_caps __P((struct ata_drive_datas*));
 165 int  wdc_downgrade_mode __P((struct ata_drive_datas*));
 166
 167 void wdc_reset_channel __P((struct ata_drive_datas *));
 168
 169 int wdc_ata_addref __P((struct ata_drive_datas *));
 170 void wdc_ata_delref __P((struct ata_drive_datas *));
 171
 172 struct ataparams;
 173 int ata_get_params __P((struct ata_drive_datas*, u_int8_t,
 174          struct ataparams *));
 175 int ata_set_mode __P((struct ata_drive_datas*, u_int8_t, u_int8_t));
 176 /* return code for these cmds */
 177 #define CMD_OK    0
 178 #define CMD_ERR   1
 179 #define CMD_AGAIN 2
 180
 181 void ata_perror __P((struct ata_drive_datas *, int, char *));