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Linux 2.6.34-rc3
[pohmelfs.git] / drivers / char / mxser.c
blobe0c5d2a690464d37138daf88f5842aab027defe0
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/timer.h>
27 #include <linux/interrupt.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
30 #include <linux/serial.h>
31 #include <linux/serial_reg.h>
32 #include <linux/major.h>
33 #include <linux/string.h>
34 #include <linux/fcntl.h>
35 #include <linux/ptrace.h>
36 #include <linux/gfp.h>
37 #include <linux/ioport.h>
38 #include <linux/mm.h>
39 #include <linux/delay.h>
40 #include <linux/pci.h>
41 #include <linux/bitops.h>
42
43 #include <asm/system.h>
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/uaccess.h>
47
48 #include "mxser.h"
49
50 #define MXSER_VERSION "2.0.5" /* 1.14 */
51 #define MXSERMAJOR 174
52
53 #define MXSER_BOARDS 4 /* Max. boards */
54 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
55 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56 #define MXSER_ISR_PASS_LIMIT 100
57
58 /*CheckIsMoxaMust return value*/
59 #define MOXA_OTHER_UART 0x00
60 #define MOXA_MUST_MU150_HWID 0x01
61 #define MOXA_MUST_MU860_HWID 0x02
62
63 #define WAKEUP_CHARS 256
64
65 #define UART_MCR_AFE 0x20
66 #define UART_LSR_SPECIAL 0x1E
67
68 #define PCI_DEVICE_ID_POS104UL 0x1044
69 #define PCI_DEVICE_ID_CB108 0x1080
70 #define PCI_DEVICE_ID_CP102UF 0x1023
71 #define PCI_DEVICE_ID_CP112UL 0x1120
72 #define PCI_DEVICE_ID_CB114 0x1142
73 #define PCI_DEVICE_ID_CP114UL 0x1143
74 #define PCI_DEVICE_ID_CB134I 0x1341
75 #define PCI_DEVICE_ID_CP138U 0x1380
76
77
78 #define C168_ASIC_ID 1
79 #define C104_ASIC_ID 2
80 #define C102_ASIC_ID 0xB
81 #define CI132_ASIC_ID 4
82 #define CI134_ASIC_ID 3
83 #define CI104J_ASIC_ID 5
84
85 #define MXSER_HIGHBAUD 1
86 #define MXSER_HAS2 2
87
88 /* This is only for PCI */
89 static const struct {
90 int type;
91 int tx_fifo;
92 int rx_fifo;
93 int xmit_fifo_size;
94 int rx_high_water;
95 int rx_trigger;
96 int rx_low_water;
97 long max_baud;
98 } Gpci_uart_info[] = {
99 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
100 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
101 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
102 };
103 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
104
105 struct mxser_cardinfo {
106 char *name;
107 unsigned int nports;
108 unsigned int flags;
109 };
110
111 static const struct mxser_cardinfo mxser_cards[] = {
112 /* 0*/ { "C168 series", 8, },
113 { "C104 series", 4, },
114 { "CI-104J series", 4, },
115 { "C168H/PCI series", 8, },
116 { "C104H/PCI series", 4, },
117 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
118 { "CI-132 series", 4, MXSER_HAS2 },
119 { "CI-134 series", 4, },
120 { "CP-132 series", 2, },
121 { "CP-114 series", 4, },
122 /*10*/ { "CT-114 series", 4, },
123 { "CP-102 series", 2, MXSER_HIGHBAUD },
124 { "CP-104U series", 4, },
125 { "CP-168U series", 8, },
126 { "CP-132U series", 2, },
127 /*15*/ { "CP-134U series", 4, },
128 { "CP-104JU series", 4, },
129 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
130 { "CP-118U series", 8, },
131 { "CP-102UL series", 2, },
132 /*20*/ { "CP-102U series", 2, },
133 { "CP-118EL series", 8, },
134 { "CP-168EL series", 8, },
135 { "CP-104EL series", 4, },
136 { "CB-108 series", 8, },
137 /*25*/ { "CB-114 series", 4, },
138 { "CB-134I series", 4, },
139 { "CP-138U series", 8, },
140 { "POS-104UL series", 4, },
141 { "CP-114UL series", 4, },
142 /*30*/ { "CP-102UF series", 2, },
143 { "CP-112UL series", 2, },
144 };
145
146 /* driver_data correspond to the lines in the structure above
147 see also ISA probe function before you change something */
148 static struct pci_device_id mxser_pcibrds[] = {
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
175 { }
176 };
177 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
178
179 static unsigned long ioaddr[MXSER_BOARDS];
180 static int ttymajor = MXSERMAJOR;
181
182 /* Variables for insmod */
183
184 MODULE_AUTHOR("Casper Yang");
185 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
186 module_param_array(ioaddr, ulong, NULL, 0);
187 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
188 module_param(ttymajor, int, 0);
189 MODULE_LICENSE("GPL");
190
191 struct mxser_log {
192 int tick;
193 unsigned long rxcnt[MXSER_PORTS];
194 unsigned long txcnt[MXSER_PORTS];
195 };
196
197 struct mxser_mon {
198 unsigned long rxcnt;
199 unsigned long txcnt;
200 unsigned long up_rxcnt;
201 unsigned long up_txcnt;
202 int modem_status;
203 unsigned char hold_reason;
204 };
205
206 struct mxser_mon_ext {
207 unsigned long rx_cnt[32];
208 unsigned long tx_cnt[32];
209 unsigned long up_rxcnt[32];
210 unsigned long up_txcnt[32];
211 int modem_status[32];
212
213 long baudrate[32];
214 int databits[32];
215 int stopbits[32];
216 int parity[32];
217 int flowctrl[32];
218 int fifo[32];
219 int iftype[32];
220 };
221
222 struct mxser_board;
223
224 struct mxser_port {
225 struct tty_port port;
226 struct mxser_board *board;
227
228 unsigned long ioaddr;
229 unsigned long opmode_ioaddr;
230 int max_baud;
231
232 int rx_high_water;
233 int rx_trigger; /* Rx fifo trigger level */
234 int rx_low_water;
235 int baud_base; /* max. speed */
236 int type; /* UART type */
237
238 int x_char; /* xon/xoff character */
239 int IER; /* Interrupt Enable Register */
240 int MCR; /* Modem control register */
241
242 unsigned char stop_rx;
243 unsigned char ldisc_stop_rx;
244
245 int custom_divisor;
246 unsigned char err_shadow;
247
248 struct async_icount icount; /* kernel counters for 4 input interrupts */
249 int timeout;
250
251 int read_status_mask;
252 int ignore_status_mask;
253 int xmit_fifo_size;
254 int xmit_head;
255 int xmit_tail;
256 int xmit_cnt;
257
258 struct ktermios normal_termios;
259
260 struct mxser_mon mon_data;
261
262 spinlock_t slock;
263 };
264
265 struct mxser_board {
266 unsigned int idx;
267 int irq;
268 const struct mxser_cardinfo *info;
269 unsigned long vector;
270 unsigned long vector_mask;
271
272 int chip_flag;
273 int uart_type;
274
275 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
276 };
277
278 struct mxser_mstatus {
279 tcflag_t cflag;
280 int cts;
281 int dsr;
282 int ri;
283 int dcd;
284 };
285
286 static struct mxser_board mxser_boards[MXSER_BOARDS];
287 static struct tty_driver *mxvar_sdriver;
288 static struct mxser_log mxvar_log;
289 static int mxser_set_baud_method[MXSER_PORTS + 1];
290
291 static void mxser_enable_must_enchance_mode(unsigned long baseio)
292 {
293 u8 oldlcr;
294 u8 efr;
295
296 oldlcr = inb(baseio + UART_LCR);
297 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
298
299 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
300 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
301
302 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
303 outb(oldlcr, baseio + UART_LCR);
304 }
305
306 static void mxser_disable_must_enchance_mode(unsigned long baseio)
307 {
308 u8 oldlcr;
309 u8 efr;
310
311 oldlcr = inb(baseio + UART_LCR);
312 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
313
314 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
315 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
316
317 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
318 outb(oldlcr, baseio + UART_LCR);
319 }
320
321 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
322 {
323 u8 oldlcr;
324 u8 efr;
325
326 oldlcr = inb(baseio + UART_LCR);
327 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
328
329 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
330 efr &= ~MOXA_MUST_EFR_BANK_MASK;
331 efr |= MOXA_MUST_EFR_BANK0;
332
333 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
334 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
335 outb(oldlcr, baseio + UART_LCR);
336 }
337
338 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
339 {
340 u8 oldlcr;
341 u8 efr;
342
343 oldlcr = inb(baseio + UART_LCR);
344 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
345
346 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
347 efr &= ~MOXA_MUST_EFR_BANK_MASK;
348 efr |= MOXA_MUST_EFR_BANK0;
349
350 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
351 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
352 outb(oldlcr, baseio + UART_LCR);
353 }
354
355 static void mxser_set_must_fifo_value(struct mxser_port *info)
356 {
357 u8 oldlcr;
358 u8 efr;
359
360 oldlcr = inb(info->ioaddr + UART_LCR);
361 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
362
363 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
364 efr &= ~MOXA_MUST_EFR_BANK_MASK;
365 efr |= MOXA_MUST_EFR_BANK1;
366
367 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
368 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
369 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
370 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
371 outb(oldlcr, info->ioaddr + UART_LCR);
372 }
373
374 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
375 {
376 u8 oldlcr;
377 u8 efr;
378
379 oldlcr = inb(baseio + UART_LCR);
380 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
381
382 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
383 efr &= ~MOXA_MUST_EFR_BANK_MASK;
384 efr |= MOXA_MUST_EFR_BANK2;
385
386 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
387 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
388 outb(oldlcr, baseio + UART_LCR);
389 }
390
391 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
392 {
393 u8 oldlcr;
394 u8 efr;
395
396 oldlcr = inb(baseio + UART_LCR);
397 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
398
399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
400 efr &= ~MOXA_MUST_EFR_BANK_MASK;
401 efr |= MOXA_MUST_EFR_BANK2;
402
403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
404 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
405 outb(oldlcr, baseio + UART_LCR);
406 }
407
408 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
409 {
410 u8 oldlcr;
411 u8 efr;
412
413 oldlcr = inb(baseio + UART_LCR);
414 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
415
416 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
417 efr &= ~MOXA_MUST_EFR_SF_MASK;
418
419 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
420 outb(oldlcr, baseio + UART_LCR);
421 }
422
423 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
424 {
425 u8 oldlcr;
426 u8 efr;
427
428 oldlcr = inb(baseio + UART_LCR);
429 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
430
431 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
432 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
433 efr |= MOXA_MUST_EFR_SF_TX1;
434
435 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
436 outb(oldlcr, baseio + UART_LCR);
437 }
438
439 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
440 {
441 u8 oldlcr;
442 u8 efr;
443
444 oldlcr = inb(baseio + UART_LCR);
445 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
446
447 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
448 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
449
450 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
451 outb(oldlcr, baseio + UART_LCR);
452 }
453
454 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
455 {
456 u8 oldlcr;
457 u8 efr;
458
459 oldlcr = inb(baseio + UART_LCR);
460 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
461
462 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
463 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
464 efr |= MOXA_MUST_EFR_SF_RX1;
465
466 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
467 outb(oldlcr, baseio + UART_LCR);
468 }
469
470 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
471 {
472 u8 oldlcr;
473 u8 efr;
474
475 oldlcr = inb(baseio + UART_LCR);
476 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
477
478 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
479 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
480
481 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
482 outb(oldlcr, baseio + UART_LCR);
483 }
484
485 #ifdef CONFIG_PCI
486 static int __devinit CheckIsMoxaMust(unsigned long io)
487 {
488 u8 oldmcr, hwid;
489 int i;
490
491 outb(0, io + UART_LCR);
492 mxser_disable_must_enchance_mode(io);
493 oldmcr = inb(io + UART_MCR);
494 outb(0, io + UART_MCR);
495 mxser_set_must_xon1_value(io, 0x11);
496 if ((hwid = inb(io + UART_MCR)) != 0) {
497 outb(oldmcr, io + UART_MCR);
498 return MOXA_OTHER_UART;
499 }
500
501 mxser_get_must_hardware_id(io, &hwid);
502 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
503 if (hwid == Gpci_uart_info[i].type)
504 return (int)hwid;
505 }
506 return MOXA_OTHER_UART;
507 }
508 #endif
509
510 static void process_txrx_fifo(struct mxser_port *info)
511 {
512 int i;
513
514 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
515 info->rx_trigger = 1;
516 info->rx_high_water = 1;
517 info->rx_low_water = 1;
518 info->xmit_fifo_size = 1;
519 } else
520 for (i = 0; i < UART_INFO_NUM; i++)
521 if (info->board->chip_flag == Gpci_uart_info[i].type) {
522 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
523 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
524 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
525 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
526 break;
527 }
528 }
529
530 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
531 {
532 static unsigned char mxser_msr[MXSER_PORTS + 1];
533 unsigned char status = 0;
534
535 status = inb(baseaddr + UART_MSR);
536
537 mxser_msr[port] &= 0x0F;
538 mxser_msr[port] |= status;
539 status = mxser_msr[port];
540 if (mode)
541 mxser_msr[port] = 0;
542
543 return status;
544 }
545
546 static int mxser_carrier_raised(struct tty_port *port)
547 {
548 struct mxser_port *mp = container_of(port, struct mxser_port, port);
549 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
550 }
551
552 static void mxser_dtr_rts(struct tty_port *port, int on)
553 {
554 struct mxser_port *mp = container_of(port, struct mxser_port, port);
555 unsigned long flags;
556
557 spin_lock_irqsave(&mp->slock, flags);
558 if (on)
559 outb(inb(mp->ioaddr + UART_MCR) |
560 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
561 else
562 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
563 mp->ioaddr + UART_MCR);
564 spin_unlock_irqrestore(&mp->slock, flags);
565 }
566
567 static int mxser_set_baud(struct tty_struct *tty, long newspd)
568 {
569 struct mxser_port *info = tty->driver_data;
570 int quot = 0, baud;
571 unsigned char cval;
572
573 if (!info->ioaddr)
574 return -1;
575
576 if (newspd > info->max_baud)
577 return -1;
578
579 if (newspd == 134) {
580 quot = 2 * info->baud_base / 269;
581 tty_encode_baud_rate(tty, 134, 134);
582 } else if (newspd) {
583 quot = info->baud_base / newspd;
584 if (quot == 0)
585 quot = 1;
586 baud = info->baud_base/quot;
587 tty_encode_baud_rate(tty, baud, baud);
588 } else {
589 quot = 0;
590 }
591
592 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
593 info->timeout += HZ / 50; /* Add .02 seconds of slop */
594
595 if (quot) {
596 info->MCR |= UART_MCR_DTR;
597 outb(info->MCR, info->ioaddr + UART_MCR);
598 } else {
599 info->MCR &= ~UART_MCR_DTR;
600 outb(info->MCR, info->ioaddr + UART_MCR);
601 return 0;
602 }
603
604 cval = inb(info->ioaddr + UART_LCR);
605
606 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
607
608 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
609 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
610 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
611
612 #ifdef BOTHER
613 if (C_BAUD(tty) == BOTHER) {
614 quot = info->baud_base % newspd;
615 quot *= 8;
616 if (quot % newspd > newspd / 2) {
617 quot /= newspd;
618 quot++;
619 } else
620 quot /= newspd;
621
622 mxser_set_must_enum_value(info->ioaddr, quot);
623 } else
624 #endif
625 mxser_set_must_enum_value(info->ioaddr, 0);
626
627 return 0;
628 }
629
630 /*
631 * This routine is called to set the UART divisor registers to match
632 * the specified baud rate for a serial port.
633 */
634 static int mxser_change_speed(struct tty_struct *tty,
635 struct ktermios *old_termios)
636 {
637 struct mxser_port *info = tty->driver_data;
638 unsigned cflag, cval, fcr;
639 int ret = 0;
640 unsigned char status;
641
642 cflag = tty->termios->c_cflag;
643 if (!info->ioaddr)
644 return ret;
645
646 if (mxser_set_baud_method[tty->index] == 0)
647 mxser_set_baud(tty, tty_get_baud_rate(tty));
648
649 /* byte size and parity */
650 switch (cflag & CSIZE) {
651 case CS5:
652 cval = 0x00;
653 break;
654 case CS6:
655 cval = 0x01;
656 break;
657 case CS7:
658 cval = 0x02;
659 break;
660 case CS8:
661 cval = 0x03;
662 break;
663 default:
664 cval = 0x00;
665 break; /* too keep GCC shut... */
666 }
667 if (cflag & CSTOPB)
668 cval |= 0x04;
669 if (cflag & PARENB)
670 cval |= UART_LCR_PARITY;
671 if (!(cflag & PARODD))
672 cval |= UART_LCR_EPAR;
673 if (cflag & CMSPAR)
674 cval |= UART_LCR_SPAR;
675
676 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
677 if (info->board->chip_flag) {
678 fcr = UART_FCR_ENABLE_FIFO;
679 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
680 mxser_set_must_fifo_value(info);
681 } else
682 fcr = 0;
683 } else {
684 fcr = UART_FCR_ENABLE_FIFO;
685 if (info->board->chip_flag) {
686 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
687 mxser_set_must_fifo_value(info);
688 } else {
689 switch (info->rx_trigger) {
690 case 1:
691 fcr |= UART_FCR_TRIGGER_1;
692 break;
693 case 4:
694 fcr |= UART_FCR_TRIGGER_4;
695 break;
696 case 8:
697 fcr |= UART_FCR_TRIGGER_8;
698 break;
699 default:
700 fcr |= UART_FCR_TRIGGER_14;
701 break;
702 }
703 }
704 }
705
706 /* CTS flow control flag and modem status interrupts */
707 info->IER &= ~UART_IER_MSI;
708 info->MCR &= ~UART_MCR_AFE;
709 if (cflag & CRTSCTS) {
710 info->port.flags |= ASYNC_CTS_FLOW;
711 info->IER |= UART_IER_MSI;
712 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
713 info->MCR |= UART_MCR_AFE;
714 } else {
715 status = inb(info->ioaddr + UART_MSR);
716 if (tty->hw_stopped) {
717 if (status & UART_MSR_CTS) {
718 tty->hw_stopped = 0;
719 if (info->type != PORT_16550A &&
720 !info->board->chip_flag) {
721 outb(info->IER & ~UART_IER_THRI,
722 info->ioaddr +
723 UART_IER);
724 info->IER |= UART_IER_THRI;
725 outb(info->IER, info->ioaddr +
726 UART_IER);
727 }
728 tty_wakeup(tty);
729 }
730 } else {
731 if (!(status & UART_MSR_CTS)) {
732 tty->hw_stopped = 1;
733 if ((info->type != PORT_16550A) &&
734 (!info->board->chip_flag)) {
735 info->IER &= ~UART_IER_THRI;
736 outb(info->IER, info->ioaddr +
737 UART_IER);
738 }
739 }
740 }
741 }
742 } else {
743 info->port.flags &= ~ASYNC_CTS_FLOW;
744 }
745 outb(info->MCR, info->ioaddr + UART_MCR);
746 if (cflag & CLOCAL) {
747 info->port.flags &= ~ASYNC_CHECK_CD;
748 } else {
749 info->port.flags |= ASYNC_CHECK_CD;
750 info->IER |= UART_IER_MSI;
751 }
752 outb(info->IER, info->ioaddr + UART_IER);
753
754 /*
755 * Set up parity check flag
756 */
757 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
758 if (I_INPCK(tty))
759 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
760 if (I_BRKINT(tty) || I_PARMRK(tty))
761 info->read_status_mask |= UART_LSR_BI;
762
763 info->ignore_status_mask = 0;
764
765 if (I_IGNBRK(tty)) {
766 info->ignore_status_mask |= UART_LSR_BI;
767 info->read_status_mask |= UART_LSR_BI;
768 /*
769 * If we're ignore parity and break indicators, ignore
770 * overruns too. (For real raw support).
771 */
772 if (I_IGNPAR(tty)) {
773 info->ignore_status_mask |=
774 UART_LSR_OE |
775 UART_LSR_PE |
776 UART_LSR_FE;
777 info->read_status_mask |=
778 UART_LSR_OE |
779 UART_LSR_PE |
780 UART_LSR_FE;
781 }
782 }
783 if (info->board->chip_flag) {
784 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
785 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
786 if (I_IXON(tty)) {
787 mxser_enable_must_rx_software_flow_control(
788 info->ioaddr);
789 } else {
790 mxser_disable_must_rx_software_flow_control(
791 info->ioaddr);
792 }
793 if (I_IXOFF(tty)) {
794 mxser_enable_must_tx_software_flow_control(
795 info->ioaddr);
796 } else {
797 mxser_disable_must_tx_software_flow_control(
798 info->ioaddr);
799 }
800 }
801
802
803 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
804 outb(cval, info->ioaddr + UART_LCR);
805
806 return ret;
807 }
808
809 static void mxser_check_modem_status(struct tty_struct *tty,
810 struct mxser_port *port, int status)
811 {
812 /* update input line counters */
813 if (status & UART_MSR_TERI)
814 port->icount.rng++;
815 if (status & UART_MSR_DDSR)
816 port->icount.dsr++;
817 if (status & UART_MSR_DDCD)
818 port->icount.dcd++;
819 if (status & UART_MSR_DCTS)
820 port->icount.cts++;
821 port->mon_data.modem_status = status;
822 wake_up_interruptible(&port->port.delta_msr_wait);
823
824 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
825 if (status & UART_MSR_DCD)
826 wake_up_interruptible(&port->port.open_wait);
827 }
828
829 if (port->port.flags & ASYNC_CTS_FLOW) {
830 if (tty->hw_stopped) {
831 if (status & UART_MSR_CTS) {
832 tty->hw_stopped = 0;
833
834 if ((port->type != PORT_16550A) &&
835 (!port->board->chip_flag)) {
836 outb(port->IER & ~UART_IER_THRI,
837 port->ioaddr + UART_IER);
838 port->IER |= UART_IER_THRI;
839 outb(port->IER, port->ioaddr +
840 UART_IER);
841 }
842 tty_wakeup(tty);
843 }
844 } else {
845 if (!(status & UART_MSR_CTS)) {
846 tty->hw_stopped = 1;
847 if (port->type != PORT_16550A &&
848 !port->board->chip_flag) {
849 port->IER &= ~UART_IER_THRI;
850 outb(port->IER, port->ioaddr +
851 UART_IER);
852 }
853 }
854 }
855 }
856 }
857
858 static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
859 {
860 struct mxser_port *info = container_of(port, struct mxser_port, port);
861 unsigned long page;
862 unsigned long flags;
863
864 page = __get_free_page(GFP_KERNEL);
865 if (!page)
866 return -ENOMEM;
867
868 spin_lock_irqsave(&info->slock, flags);
869
870 if (!info->ioaddr || !info->type) {
871 set_bit(TTY_IO_ERROR, &tty->flags);
872 free_page(page);
873 spin_unlock_irqrestore(&info->slock, flags);
874 return 0;
875 }
876 info->port.xmit_buf = (unsigned char *) page;
877
878 /*
879 * Clear the FIFO buffers and disable them
880 * (they will be reenabled in mxser_change_speed())
881 */
882 if (info->board->chip_flag)
883 outb((UART_FCR_CLEAR_RCVR |
884 UART_FCR_CLEAR_XMIT |
885 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
886 else
887 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
888 info->ioaddr + UART_FCR);
889
890 /*
891 * At this point there's no way the LSR could still be 0xFF;
892 * if it is, then bail out, because there's likely no UART
893 * here.
894 */
895 if (inb(info->ioaddr + UART_LSR) == 0xff) {
896 spin_unlock_irqrestore(&info->slock, flags);
897 if (capable(CAP_SYS_ADMIN)) {
898 set_bit(TTY_IO_ERROR, &tty->flags);
899 return 0;
900 } else
901 return -ENODEV;
902 }
903
904 /*
905 * Clear the interrupt registers.
906 */
907 (void) inb(info->ioaddr + UART_LSR);
908 (void) inb(info->ioaddr + UART_RX);
909 (void) inb(info->ioaddr + UART_IIR);
910 (void) inb(info->ioaddr + UART_MSR);
911
912 /*
913 * Now, initialize the UART
914 */
915 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
916 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
917 outb(info->MCR, info->ioaddr + UART_MCR);
918
919 /*
920 * Finally, enable interrupts
921 */
922 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
923
924 if (info->board->chip_flag)
925 info->IER |= MOXA_MUST_IER_EGDAI;
926 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
927
928 /*
929 * And clear the interrupt registers again for luck.
930 */
931 (void) inb(info->ioaddr + UART_LSR);
932 (void) inb(info->ioaddr + UART_RX);
933 (void) inb(info->ioaddr + UART_IIR);
934 (void) inb(info->ioaddr + UART_MSR);
935
936 clear_bit(TTY_IO_ERROR, &tty->flags);
937 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
938
939 /*
940 * and set the speed of the serial port
941 */
942 mxser_change_speed(tty, NULL);
943 spin_unlock_irqrestore(&info->slock, flags);
944
945 return 0;
946 }
947
948 /*
949 * This routine will shutdown a serial port
950 */
951 static void mxser_shutdown_port(struct tty_port *port)
952 {
953 struct mxser_port *info = container_of(port, struct mxser_port, port);
954 unsigned long flags;
955
956 spin_lock_irqsave(&info->slock, flags);
957
958 /*
959 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
960 * here so the queue might never be waken up
961 */
962 wake_up_interruptible(&info->port.delta_msr_wait);
963
964 /*
965 * Free the xmit buffer, if necessary
966 */
967 if (info->port.xmit_buf) {
968 free_page((unsigned long) info->port.xmit_buf);
969 info->port.xmit_buf = NULL;
970 }
971
972 info->IER = 0;
973 outb(0x00, info->ioaddr + UART_IER);
974
975 /* clear Rx/Tx FIFO's */
976 if (info->board->chip_flag)
977 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
978 MOXA_MUST_FCR_GDA_MODE_ENABLE,
979 info->ioaddr + UART_FCR);
980 else
981 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
982 info->ioaddr + UART_FCR);
983
984 /* read data port to reset things */
985 (void) inb(info->ioaddr + UART_RX);
986
987
988 if (info->board->chip_flag)
989 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
990
991 spin_unlock_irqrestore(&info->slock, flags);
992 }
993
994 /*
995 * This routine is called whenever a serial port is opened. It
996 * enables interrupts for a serial port, linking in its async structure into
997 * the IRQ chain. It also performs the serial-specific
998 * initialization for the tty structure.
999 */
1000 static int mxser_open(struct tty_struct *tty, struct file *filp)
1001 {
1002 struct mxser_port *info;
1003 int line;
1004
1005 line = tty->index;
1006 if (line == MXSER_PORTS)
1007 return 0;
1008 if (line < 0 || line > MXSER_PORTS)
1009 return -ENODEV;
1010 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1011 if (!info->ioaddr)
1012 return -ENODEV;
1013
1014 return tty_port_open(&info->port, tty, filp);
1015 }
1016
1017 static void mxser_flush_buffer(struct tty_struct *tty)
1018 {
1019 struct mxser_port *info = tty->driver_data;
1020 char fcr;
1021 unsigned long flags;
1022
1023
1024 spin_lock_irqsave(&info->slock, flags);
1025 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1026
1027 fcr = inb(info->ioaddr + UART_FCR);
1028 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1029 info->ioaddr + UART_FCR);
1030 outb(fcr, info->ioaddr + UART_FCR);
1031
1032 spin_unlock_irqrestore(&info->slock, flags);
1033
1034 tty_wakeup(tty);
1035 }
1036
1037
1038 static void mxser_close_port(struct tty_port *port)
1039 {
1040 struct mxser_port *info = container_of(port, struct mxser_port, port);
1041 unsigned long timeout;
1042 /*
1043 * At this point we stop accepting input. To do this, we
1044 * disable the receive line status interrupts, and tell the
1045 * interrupt driver to stop checking the data ready bit in the
1046 * line status register.
1047 */
1048 info->IER &= ~UART_IER_RLSI;
1049 if (info->board->chip_flag)
1050 info->IER &= ~MOXA_MUST_RECV_ISR;
1051
1052 outb(info->IER, info->ioaddr + UART_IER);
1053 /*
1054 * Before we drop DTR, make sure the UART transmitter
1055 * has completely drained; this is especially
1056 * important if there is a transmit FIFO!
1057 */
1058 timeout = jiffies + HZ;
1059 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1060 schedule_timeout_interruptible(5);
1061 if (time_after(jiffies, timeout))
1062 break;
1063 }
1064 }
1065
1066 /*
1067 * This routine is called when the serial port gets closed. First, we
1068 * wait for the last remaining data to be sent. Then, we unlink its
1069 * async structure from the interrupt chain if necessary, and we free
1070 * that IRQ if nothing is left in the chain.
1071 */
1072 static void mxser_close(struct tty_struct *tty, struct file *filp)
1073 {
1074 struct mxser_port *info = tty->driver_data;
1075 struct tty_port *port = &info->port;
1076
1077 if (tty->index == MXSER_PORTS)
1078 return;
1079 if (tty_port_close_start(port, tty, filp) == 0)
1080 return;
1081 mutex_lock(&port->mutex);
1082 mxser_close_port(port);
1083 mxser_flush_buffer(tty);
1084 mxser_shutdown_port(port);
1085 clear_bit(ASYNCB_INITIALIZED, &port->flags);
1086 mutex_unlock(&port->mutex);
1087 /* Right now the tty_port set is done outside of the close_end helper
1088 as we don't yet have everyone using refcounts */
1089 tty_port_close_end(port, tty);
1090 tty_port_tty_set(port, NULL);
1091 }
1092
1093 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1094 {
1095 int c, total = 0;
1096 struct mxser_port *info = tty->driver_data;
1097 unsigned long flags;
1098
1099 if (!info->port.xmit_buf)
1100 return 0;
1101
1102 while (1) {
1103 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1104 SERIAL_XMIT_SIZE - info->xmit_head));
1105 if (c <= 0)
1106 break;
1107
1108 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1109 spin_lock_irqsave(&info->slock, flags);
1110 info->xmit_head = (info->xmit_head + c) &
1111 (SERIAL_XMIT_SIZE - 1);
1112 info->xmit_cnt += c;
1113 spin_unlock_irqrestore(&info->slock, flags);
1114
1115 buf += c;
1116 count -= c;
1117 total += c;
1118 }
1119
1120 if (info->xmit_cnt && !tty->stopped) {
1121 if (!tty->hw_stopped ||
1122 (info->type == PORT_16550A) ||
1123 (info->board->chip_flag)) {
1124 spin_lock_irqsave(&info->slock, flags);
1125 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1126 UART_IER);
1127 info->IER |= UART_IER_THRI;
1128 outb(info->IER, info->ioaddr + UART_IER);
1129 spin_unlock_irqrestore(&info->slock, flags);
1130 }
1131 }
1132 return total;
1133 }
1134
1135 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1136 {
1137 struct mxser_port *info = tty->driver_data;
1138 unsigned long flags;
1139
1140 if (!info->port.xmit_buf)
1141 return 0;
1142
1143 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1144 return 0;
1145
1146 spin_lock_irqsave(&info->slock, flags);
1147 info->port.xmit_buf[info->xmit_head++] = ch;
1148 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1149 info->xmit_cnt++;
1150 spin_unlock_irqrestore(&info->slock, flags);
1151 if (!tty->stopped) {
1152 if (!tty->hw_stopped ||
1153 (info->type == PORT_16550A) ||
1154 info->board->chip_flag) {
1155 spin_lock_irqsave(&info->slock, flags);
1156 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1157 info->IER |= UART_IER_THRI;
1158 outb(info->IER, info->ioaddr + UART_IER);
1159 spin_unlock_irqrestore(&info->slock, flags);
1160 }
1161 }
1162 return 1;
1163 }
1164
1165
1166 static void mxser_flush_chars(struct tty_struct *tty)
1167 {
1168 struct mxser_port *info = tty->driver_data;
1169 unsigned long flags;
1170
1171 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1172 (tty->hw_stopped && info->type != PORT_16550A &&
1173 !info->board->chip_flag))
1174 return;
1175
1176 spin_lock_irqsave(&info->slock, flags);
1177
1178 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1179 info->IER |= UART_IER_THRI;
1180 outb(info->IER, info->ioaddr + UART_IER);
1181
1182 spin_unlock_irqrestore(&info->slock, flags);
1183 }
1184
1185 static int mxser_write_room(struct tty_struct *tty)
1186 {
1187 struct mxser_port *info = tty->driver_data;
1188 int ret;
1189
1190 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1191 return ret < 0 ? 0 : ret;
1192 }
1193
1194 static int mxser_chars_in_buffer(struct tty_struct *tty)
1195 {
1196 struct mxser_port *info = tty->driver_data;
1197 return info->xmit_cnt;
1198 }
1199
1200 /*
1201 * ------------------------------------------------------------
1202 * friends of mxser_ioctl()
1203 * ------------------------------------------------------------
1204 */
1205 static int mxser_get_serial_info(struct tty_struct *tty,
1206 struct serial_struct __user *retinfo)
1207 {
1208 struct mxser_port *info = tty->driver_data;
1209 struct serial_struct tmp = {
1210 .type = info->type,
1211 .line = tty->index,
1212 .port = info->ioaddr,
1213 .irq = info->board->irq,
1214 .flags = info->port.flags,
1215 .baud_base = info->baud_base,
1216 .close_delay = info->port.close_delay,
1217 .closing_wait = info->port.closing_wait,
1218 .custom_divisor = info->custom_divisor,
1219 .hub6 = 0
1220 };
1221 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1222 return -EFAULT;
1223 return 0;
1224 }
1225
1226 static int mxser_set_serial_info(struct tty_struct *tty,
1227 struct serial_struct __user *new_info)
1228 {
1229 struct mxser_port *info = tty->driver_data;
1230 struct tty_port *port = &info->port;
1231 struct serial_struct new_serial;
1232 speed_t baud;
1233 unsigned long sl_flags;
1234 unsigned int flags;
1235 int retval = 0;
1236
1237 if (!new_info || !info->ioaddr)
1238 return -ENODEV;
1239 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1240 return -EFAULT;
1241
1242 if (new_serial.irq != info->board->irq ||
1243 new_serial.port != info->ioaddr)
1244 return -EINVAL;
1245
1246 flags = port->flags & ASYNC_SPD_MASK;
1247
1248 if (!capable(CAP_SYS_ADMIN)) {
1249 if ((new_serial.baud_base != info->baud_base) ||
1250 (new_serial.close_delay != info->port.close_delay) ||
1251 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1252 return -EPERM;
1253 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1254 (new_serial.flags & ASYNC_USR_MASK));
1255 } else {
1256 /*
1257 * OK, past this point, all the error checking has been done.
1258 * At this point, we start making changes.....
1259 */
1260 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1261 (new_serial.flags & ASYNC_FLAGS));
1262 port->close_delay = new_serial.close_delay * HZ / 100;
1263 port->closing_wait = new_serial.closing_wait * HZ / 100;
1264 tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1265 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1266 (new_serial.baud_base != info->baud_base ||
1267 new_serial.custom_divisor !=
1268 info->custom_divisor)) {
1269 if (new_serial.custom_divisor == 0)
1270 return -EINVAL;
1271 baud = new_serial.baud_base / new_serial.custom_divisor;
1272 tty_encode_baud_rate(tty, baud, baud);
1273 }
1274 }
1275
1276 info->type = new_serial.type;
1277
1278 process_txrx_fifo(info);
1279
1280 if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
1281 if (flags != (port->flags & ASYNC_SPD_MASK)) {
1282 spin_lock_irqsave(&info->slock, sl_flags);
1283 mxser_change_speed(tty, NULL);
1284 spin_unlock_irqrestore(&info->slock, sl_flags);
1285 }
1286 } else {
1287 retval = mxser_activate(port, tty);
1288 if (retval == 0)
1289 set_bit(ASYNCB_INITIALIZED, &port->flags);
1290 }
1291 return retval;
1292 }
1293
1294 /*
1295 * mxser_get_lsr_info - get line status register info
1296 *
1297 * Purpose: Let user call ioctl() to get info when the UART physically
1298 * is emptied. On bus types like RS485, the transmitter must
1299 * release the bus after transmitting. This must be done when
1300 * the transmit shift register is empty, not be done when the
1301 * transmit holding register is empty. This functionality
1302 * allows an RS485 driver to be written in user space.
1303 */
1304 static int mxser_get_lsr_info(struct mxser_port *info,
1305 unsigned int __user *value)
1306 {
1307 unsigned char status;
1308 unsigned int result;
1309 unsigned long flags;
1310
1311 spin_lock_irqsave(&info->slock, flags);
1312 status = inb(info->ioaddr + UART_LSR);
1313 spin_unlock_irqrestore(&info->slock, flags);
1314 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1315 return put_user(result, value);
1316 }
1317
1318 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1319 {
1320 struct mxser_port *info = tty->driver_data;
1321 unsigned char control, status;
1322 unsigned long flags;
1323
1324
1325 if (tty->index == MXSER_PORTS)
1326 return -ENOIOCTLCMD;
1327 if (test_bit(TTY_IO_ERROR, &tty->flags))
1328 return -EIO;
1329
1330 control = info->MCR;
1331
1332 spin_lock_irqsave(&info->slock, flags);
1333 status = inb(info->ioaddr + UART_MSR);
1334 if (status & UART_MSR_ANY_DELTA)
1335 mxser_check_modem_status(tty, info, status);
1336 spin_unlock_irqrestore(&info->slock, flags);
1337 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1338 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1339 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1340 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1341 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1342 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1343 }
1344
1345 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1346 unsigned int set, unsigned int clear)
1347 {
1348 struct mxser_port *info = tty->driver_data;
1349 unsigned long flags;
1350
1351
1352 if (tty->index == MXSER_PORTS)
1353 return -ENOIOCTLCMD;
1354 if (test_bit(TTY_IO_ERROR, &tty->flags))
1355 return -EIO;
1356
1357 spin_lock_irqsave(&info->slock, flags);
1358
1359 if (set & TIOCM_RTS)
1360 info->MCR |= UART_MCR_RTS;
1361 if (set & TIOCM_DTR)
1362 info->MCR |= UART_MCR_DTR;
1363
1364 if (clear & TIOCM_RTS)
1365 info->MCR &= ~UART_MCR_RTS;
1366 if (clear & TIOCM_DTR)
1367 info->MCR &= ~UART_MCR_DTR;
1368
1369 outb(info->MCR, info->ioaddr + UART_MCR);
1370 spin_unlock_irqrestore(&info->slock, flags);
1371 return 0;
1372 }
1373
1374 static int __init mxser_program_mode(int port)
1375 {
1376 int id, i, j, n;
1377
1378 outb(0, port);
1379 outb(0, port);
1380 outb(0, port);
1381 (void)inb(port);
1382 (void)inb(port);
1383 outb(0, port);
1384 (void)inb(port);
1385
1386 id = inb(port + 1) & 0x1F;
1387 if ((id != C168_ASIC_ID) &&
1388 (id != C104_ASIC_ID) &&
1389 (id != C102_ASIC_ID) &&
1390 (id != CI132_ASIC_ID) &&
1391 (id != CI134_ASIC_ID) &&
1392 (id != CI104J_ASIC_ID))
1393 return -1;
1394 for (i = 0, j = 0; i < 4; i++) {
1395 n = inb(port + 2);
1396 if (n == 'M') {
1397 j = 1;
1398 } else if ((j == 1) && (n == 1)) {
1399 j = 2;
1400 break;
1401 } else
1402 j = 0;
1403 }
1404 if (j != 2)
1405 id = -2;
1406 return id;
1407 }
1408
1409 static void __init mxser_normal_mode(int port)
1410 {
1411 int i, n;
1412
1413 outb(0xA5, port + 1);
1414 outb(0x80, port + 3);
1415 outb(12, port + 0); /* 9600 bps */
1416 outb(0, port + 1);
1417 outb(0x03, port + 3); /* 8 data bits */
1418 outb(0x13, port + 4); /* loop back mode */
1419 for (i = 0; i < 16; i++) {
1420 n = inb(port + 5);
1421 if ((n & 0x61) == 0x60)
1422 break;
1423 if ((n & 1) == 1)
1424 (void)inb(port);
1425 }
1426 outb(0x00, port + 4);
1427 }
1428
1429 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1430 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1431 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1432 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1433 #define EN_CCMD 0x000 /* Chip's command register */
1434 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1435 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1436 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1437 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1438 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1439 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1440 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1441 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1442 static int __init mxser_read_register(int port, unsigned short *regs)
1443 {
1444 int i, k, value, id;
1445 unsigned int j;
1446
1447 id = mxser_program_mode(port);
1448 if (id < 0)
1449 return id;
1450 for (i = 0; i < 14; i++) {
1451 k = (i & 0x3F) | 0x180;
1452 for (j = 0x100; j > 0; j >>= 1) {
1453 outb(CHIP_CS, port);
1454 if (k & j) {
1455 outb(CHIP_CS | CHIP_DO, port);
1456 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1457 } else {
1458 outb(CHIP_CS, port);
1459 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1460 }
1461 }
1462 (void)inb(port);
1463 value = 0;
1464 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1465 outb(CHIP_CS, port);
1466 outb(CHIP_CS | CHIP_SK, port);
1467 if (inb(port) & CHIP_DI)
1468 value |= j;
1469 }
1470 regs[i] = value;
1471 outb(0, port);
1472 }
1473 mxser_normal_mode(port);
1474 return id;
1475 }
1476
1477 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1478 {
1479 struct mxser_port *ip;
1480 struct tty_port *port;
1481 struct tty_struct *tty;
1482 int result, status;
1483 unsigned int i, j;
1484 int ret = 0;
1485
1486 switch (cmd) {
1487 case MOXA_GET_MAJOR:
1488 if (printk_ratelimit())
1489 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1490 "%x (GET_MAJOR), fix your userspace\n",
1491 current->comm, cmd);
1492 return put_user(ttymajor, (int __user *)argp);
1493
1494 case MOXA_CHKPORTENABLE:
1495 result = 0;
1496 for (i = 0; i < MXSER_BOARDS; i++)
1497 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1498 if (mxser_boards[i].ports[j].ioaddr)
1499 result |= (1 << i);
1500 return put_user(result, (unsigned long __user *)argp);
1501 case MOXA_GETDATACOUNT:
1502 /* The receive side is locked by port->slock but it isn't
1503 clear that an exact snapshot is worth copying here */
1504 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1505 ret = -EFAULT;
1506 return ret;
1507 case MOXA_GETMSTATUS: {
1508 struct mxser_mstatus ms, __user *msu = argp;
1509 for (i = 0; i < MXSER_BOARDS; i++)
1510 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1511 ip = &mxser_boards[i].ports[j];
1512 port = &ip->port;
1513 memset(&ms, 0, sizeof(ms));
1514
1515 mutex_lock(&port->mutex);
1516 if (!ip->ioaddr)
1517 goto copy;
1518
1519 tty = tty_port_tty_get(port);
1520
1521 if (!tty || !tty->termios)
1522 ms.cflag = ip->normal_termios.c_cflag;
1523 else
1524 ms.cflag = tty->termios->c_cflag;
1525 tty_kref_put(tty);
1526 spin_lock_irq(&ip->slock);
1527 status = inb(ip->ioaddr + UART_MSR);
1528 spin_unlock_irq(&ip->slock);
1529 if (status & UART_MSR_DCD)
1530 ms.dcd = 1;
1531 if (status & UART_MSR_DSR)
1532 ms.dsr = 1;
1533 if (status & UART_MSR_CTS)
1534 ms.cts = 1;
1535 copy:
1536 mutex_unlock(&port->mutex);
1537 if (copy_to_user(msu, &ms, sizeof(ms)))
1538 return -EFAULT;
1539 msu++;
1540 }
1541 return 0;
1542 }
1543 case MOXA_ASPP_MON_EXT: {
1544 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1545 unsigned int cflag, iflag, p;
1546 u8 opmode;
1547
1548 me = kzalloc(sizeof(*me), GFP_KERNEL);
1549 if (!me)
1550 return -ENOMEM;
1551
1552 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1553 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1554 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1555 i = MXSER_BOARDS;
1556 break;
1557 }
1558 ip = &mxser_boards[i].ports[j];
1559 port = &ip->port;
1560
1561 mutex_lock(&port->mutex);
1562 if (!ip->ioaddr) {
1563 mutex_unlock(&port->mutex);
1564 continue;
1565 }
1566
1567 spin_lock_irq(&ip->slock);
1568 status = mxser_get_msr(ip->ioaddr, 0, p);
1569
1570 if (status & UART_MSR_TERI)
1571 ip->icount.rng++;
1572 if (status & UART_MSR_DDSR)
1573 ip->icount.dsr++;
1574 if (status & UART_MSR_DDCD)
1575 ip->icount.dcd++;
1576 if (status & UART_MSR_DCTS)
1577 ip->icount.cts++;
1578
1579 ip->mon_data.modem_status = status;
1580 me->rx_cnt[p] = ip->mon_data.rxcnt;
1581 me->tx_cnt[p] = ip->mon_data.txcnt;
1582 me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
1583 me->up_txcnt[p] = ip->mon_data.up_txcnt;
1584 me->modem_status[p] =
1585 ip->mon_data.modem_status;
1586 spin_unlock_irq(&ip->slock);
1587
1588 tty = tty_port_tty_get(&ip->port);
1589
1590 if (!tty || !tty->termios) {
1591 cflag = ip->normal_termios.c_cflag;
1592 iflag = ip->normal_termios.c_iflag;
1593 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
1594 } else {
1595 cflag = tty->termios->c_cflag;
1596 iflag = tty->termios->c_iflag;
1597 me->baudrate[p] = tty_get_baud_rate(tty);
1598 }
1599 tty_kref_put(tty);
1600
1601 me->databits[p] = cflag & CSIZE;
1602 me->stopbits[p] = cflag & CSTOPB;
1603 me->parity[p] = cflag & (PARENB | PARODD |
1604 CMSPAR);
1605
1606 if (cflag & CRTSCTS)
1607 me->flowctrl[p] |= 0x03;
1608
1609 if (iflag & (IXON | IXOFF))
1610 me->flowctrl[p] |= 0x0C;
1611
1612 if (ip->type == PORT_16550A)
1613 me->fifo[p] = 1;
1614
1615 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
1616 opmode &= OP_MODE_MASK;
1617 me->iftype[p] = opmode;
1618 mutex_unlock(&port->mutex);
1619 }
1620 }
1621 if (copy_to_user(argp, me, sizeof(*me)))
1622 ret = -EFAULT;
1623 kfree(me);
1624 return ret;
1625 }
1626 default:
1627 return -ENOIOCTLCMD;
1628 }
1629 return 0;
1630 }
1631
1632 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1633 struct async_icount *cprev)
1634 {
1635 struct async_icount cnow;
1636 unsigned long flags;
1637 int ret;
1638
1639 spin_lock_irqsave(&info->slock, flags);
1640 cnow = info->icount; /* atomic copy */
1641 spin_unlock_irqrestore(&info->slock, flags);
1642
1643 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1644 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1645 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1646 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1647
1648 *cprev = cnow;
1649
1650 return ret;
1651 }
1652
1653 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1654 unsigned int cmd, unsigned long arg)
1655 {
1656 struct mxser_port *info = tty->driver_data;
1657 struct tty_port *port = &info->port;
1658 struct async_icount cnow;
1659 unsigned long flags;
1660 void __user *argp = (void __user *)arg;
1661 int retval;
1662
1663 if (tty->index == MXSER_PORTS)
1664 return mxser_ioctl_special(cmd, argp);
1665
1666 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1667 int p;
1668 unsigned long opmode;
1669 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1670 int shiftbit;
1671 unsigned char val, mask;
1672
1673 p = tty->index % 4;
1674 if (cmd == MOXA_SET_OP_MODE) {
1675 if (get_user(opmode, (int __user *) argp))
1676 return -EFAULT;
1677 if (opmode != RS232_MODE &&
1678 opmode != RS485_2WIRE_MODE &&
1679 opmode != RS422_MODE &&
1680 opmode != RS485_4WIRE_MODE)
1681 return -EFAULT;
1682 mask = ModeMask[p];
1683 shiftbit = p * 2;
1684 spin_lock_irq(&info->slock);
1685 val = inb(info->opmode_ioaddr);
1686 val &= mask;
1687 val |= (opmode << shiftbit);
1688 outb(val, info->opmode_ioaddr);
1689 spin_unlock_irq(&info->slock);
1690 } else {
1691 shiftbit = p * 2;
1692 spin_lock_irq(&info->slock);
1693 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1694 spin_unlock_irq(&info->slock);
1695 opmode &= OP_MODE_MASK;
1696 if (put_user(opmode, (int __user *)argp))
1697 return -EFAULT;
1698 }
1699 return 0;
1700 }
1701
1702 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1703 test_bit(TTY_IO_ERROR, &tty->flags))
1704 return -EIO;
1705
1706 switch (cmd) {
1707 case TIOCGSERIAL:
1708 mutex_lock(&port->mutex);
1709 retval = mxser_get_serial_info(tty, argp);
1710 mutex_unlock(&port->mutex);
1711 return retval;
1712 case TIOCSSERIAL:
1713 mutex_lock(&port->mutex);
1714 retval = mxser_set_serial_info(tty, argp);
1715 mutex_unlock(&port->mutex);
1716 return retval;
1717 case TIOCSERGETLSR: /* Get line status register */
1718 return mxser_get_lsr_info(info, argp);
1719 /*
1720 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1721 * - mask passed in arg for lines of interest
1722 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1723 * Caller should use TIOCGICOUNT to see which one it was
1724 */
1725 case TIOCMIWAIT:
1726 spin_lock_irqsave(&info->slock, flags);
1727 cnow = info->icount; /* note the counters on entry */
1728 spin_unlock_irqrestore(&info->slock, flags);
1729
1730 return wait_event_interruptible(info->port.delta_msr_wait,
1731 mxser_cflags_changed(info, arg, &cnow));
1732 /*
1733 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1734 * Return: write counters to the user passed counter struct
1735 * NB: both 1->0 and 0->1 transitions are counted except for
1736 * RI where only 0->1 is counted.
1737 */
1738 case TIOCGICOUNT: {
1739 struct serial_icounter_struct icnt = { 0 };
1740 spin_lock_irqsave(&info->slock, flags);
1741 cnow = info->icount;
1742 spin_unlock_irqrestore(&info->slock, flags);
1743
1744 icnt.frame = cnow.frame;
1745 icnt.brk = cnow.brk;
1746 icnt.overrun = cnow.overrun;
1747 icnt.buf_overrun = cnow.buf_overrun;
1748 icnt.parity = cnow.parity;
1749 icnt.rx = cnow.rx;
1750 icnt.tx = cnow.tx;
1751 icnt.cts = cnow.cts;
1752 icnt.dsr = cnow.dsr;
1753 icnt.rng = cnow.rng;
1754 icnt.dcd = cnow.dcd;
1755
1756 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1757 }
1758 case MOXA_HighSpeedOn:
1759 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1760 case MOXA_SDS_RSTICOUNTER:
1761 spin_lock_irq(&info->slock);
1762 info->mon_data.rxcnt = 0;
1763 info->mon_data.txcnt = 0;
1764 spin_unlock_irq(&info->slock);
1765 return 0;
1766
1767 case MOXA_ASPP_OQUEUE:{
1768 int len, lsr;
1769
1770 len = mxser_chars_in_buffer(tty);
1771 spin_lock(&info->slock);
1772 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1773 spin_unlock_irq(&info->slock);
1774 len += (lsr ? 0 : 1);
1775
1776 return put_user(len, (int __user *)argp);
1777 }
1778 case MOXA_ASPP_MON: {
1779 int mcr, status;
1780
1781 spin_lock(&info->slock);
1782 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1783 mxser_check_modem_status(tty, info, status);
1784
1785 mcr = inb(info->ioaddr + UART_MCR);
1786 spin_unlock(&info->slock);
1787
1788 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1789 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1790 else
1791 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1792
1793 if (mcr & MOXA_MUST_MCR_TX_XON)
1794 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1795 else
1796 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1797
1798 if (tty->hw_stopped)
1799 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1800 else
1801 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1802
1803 if (copy_to_user(argp, &info->mon_data,
1804 sizeof(struct mxser_mon)))
1805 return -EFAULT;
1806
1807 return 0;
1808 }
1809 case MOXA_ASPP_LSTATUS: {
1810 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1811 return -EFAULT;
1812
1813 info->err_shadow = 0;
1814 return 0;
1815 }
1816 case MOXA_SET_BAUD_METHOD: {
1817 int method;
1818
1819 if (get_user(method, (int __user *)argp))
1820 return -EFAULT;
1821 mxser_set_baud_method[tty->index] = method;
1822 return put_user(method, (int __user *)argp);
1823 }
1824 default:
1825 return -ENOIOCTLCMD;
1826 }
1827 return 0;
1828 }
1829
1830 static void mxser_stoprx(struct tty_struct *tty)
1831 {
1832 struct mxser_port *info = tty->driver_data;
1833
1834 info->ldisc_stop_rx = 1;
1835 if (I_IXOFF(tty)) {
1836 if (info->board->chip_flag) {
1837 info->IER &= ~MOXA_MUST_RECV_ISR;
1838 outb(info->IER, info->ioaddr + UART_IER);
1839 } else {
1840 info->x_char = STOP_CHAR(tty);
1841 outb(0, info->ioaddr + UART_IER);
1842 info->IER |= UART_IER_THRI;
1843 outb(info->IER, info->ioaddr + UART_IER);
1844 }
1845 }
1846
1847 if (tty->termios->c_cflag & CRTSCTS) {
1848 info->MCR &= ~UART_MCR_RTS;
1849 outb(info->MCR, info->ioaddr + UART_MCR);
1850 }
1851 }
1852
1853 /*
1854 * This routine is called by the upper-layer tty layer to signal that
1855 * incoming characters should be throttled.
1856 */
1857 static void mxser_throttle(struct tty_struct *tty)
1858 {
1859 mxser_stoprx(tty);
1860 }
1861
1862 static void mxser_unthrottle(struct tty_struct *tty)
1863 {
1864 struct mxser_port *info = tty->driver_data;
1865
1866 /* startrx */
1867 info->ldisc_stop_rx = 0;
1868 if (I_IXOFF(tty)) {
1869 if (info->x_char)
1870 info->x_char = 0;
1871 else {
1872 if (info->board->chip_flag) {
1873 info->IER |= MOXA_MUST_RECV_ISR;
1874 outb(info->IER, info->ioaddr + UART_IER);
1875 } else {
1876 info->x_char = START_CHAR(tty);
1877 outb(0, info->ioaddr + UART_IER);
1878 info->IER |= UART_IER_THRI;
1879 outb(info->IER, info->ioaddr + UART_IER);
1880 }
1881 }
1882 }
1883
1884 if (tty->termios->c_cflag & CRTSCTS) {
1885 info->MCR |= UART_MCR_RTS;
1886 outb(info->MCR, info->ioaddr + UART_MCR);
1887 }
1888 }
1889
1890 /*
1891 * mxser_stop() and mxser_start()
1892 *
1893 * This routines are called before setting or resetting tty->stopped.
1894 * They enable or disable transmitter interrupts, as necessary.
1895 */
1896 static void mxser_stop(struct tty_struct *tty)
1897 {
1898 struct mxser_port *info = tty->driver_data;
1899 unsigned long flags;
1900
1901 spin_lock_irqsave(&info->slock, flags);
1902 if (info->IER & UART_IER_THRI) {
1903 info->IER &= ~UART_IER_THRI;
1904 outb(info->IER, info->ioaddr + UART_IER);
1905 }
1906 spin_unlock_irqrestore(&info->slock, flags);
1907 }
1908
1909 static void mxser_start(struct tty_struct *tty)
1910 {
1911 struct mxser_port *info = tty->driver_data;
1912 unsigned long flags;
1913
1914 spin_lock_irqsave(&info->slock, flags);
1915 if (info->xmit_cnt && info->port.xmit_buf) {
1916 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1917 info->IER |= UART_IER_THRI;
1918 outb(info->IER, info->ioaddr + UART_IER);
1919 }
1920 spin_unlock_irqrestore(&info->slock, flags);
1921 }
1922
1923 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1924 {
1925 struct mxser_port *info = tty->driver_data;
1926 unsigned long flags;
1927
1928 spin_lock_irqsave(&info->slock, flags);
1929 mxser_change_speed(tty, old_termios);
1930 spin_unlock_irqrestore(&info->slock, flags);
1931
1932 if ((old_termios->c_cflag & CRTSCTS) &&
1933 !(tty->termios->c_cflag & CRTSCTS)) {
1934 tty->hw_stopped = 0;
1935 mxser_start(tty);
1936 }
1937
1938 /* Handle sw stopped */
1939 if ((old_termios->c_iflag & IXON) &&
1940 !(tty->termios->c_iflag & IXON)) {
1941 tty->stopped = 0;
1942
1943 if (info->board->chip_flag) {
1944 spin_lock_irqsave(&info->slock, flags);
1945 mxser_disable_must_rx_software_flow_control(
1946 info->ioaddr);
1947 spin_unlock_irqrestore(&info->slock, flags);
1948 }
1949
1950 mxser_start(tty);
1951 }
1952 }
1953
1954 /*
1955 * mxser_wait_until_sent() --- wait until the transmitter is empty
1956 */
1957 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1958 {
1959 struct mxser_port *info = tty->driver_data;
1960 unsigned long orig_jiffies, char_time;
1961 unsigned long flags;
1962 int lsr;
1963
1964 if (info->type == PORT_UNKNOWN)
1965 return;
1966
1967 if (info->xmit_fifo_size == 0)
1968 return; /* Just in case.... */
1969
1970 orig_jiffies = jiffies;
1971 /*
1972 * Set the check interval to be 1/5 of the estimated time to
1973 * send a single character, and make it at least 1. The check
1974 * interval should also be less than the timeout.
1975 *
1976 * Note: we have to use pretty tight timings here to satisfy
1977 * the NIST-PCTS.
1978 */
1979 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1980 char_time = char_time / 5;
1981 if (char_time == 0)
1982 char_time = 1;
1983 if (timeout && timeout < char_time)
1984 char_time = timeout;
1985 /*
1986 * If the transmitter hasn't cleared in twice the approximate
1987 * amount of time to send the entire FIFO, it probably won't
1988 * ever clear. This assumes the UART isn't doing flow
1989 * control, which is currently the case. Hence, if it ever
1990 * takes longer than info->timeout, this is probably due to a
1991 * UART bug of some kind. So, we clamp the timeout parameter at
1992 * 2*info->timeout.
1993 */
1994 if (!timeout || timeout > 2 * info->timeout)
1995 timeout = 2 * info->timeout;
1996 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1997 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1998 timeout, char_time);
1999 printk("jiff=%lu...", jiffies);
2000 #endif
2001 spin_lock_irqsave(&info->slock, flags);
2002 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2003 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2004 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2005 #endif
2006 spin_unlock_irqrestore(&info->slock, flags);
2007 schedule_timeout_interruptible(char_time);
2008 spin_lock_irqsave(&info->slock, flags);
2009 if (signal_pending(current))
2010 break;
2011 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2012 break;
2013 }
2014 spin_unlock_irqrestore(&info->slock, flags);
2015 set_current_state(TASK_RUNNING);
2016
2017 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2018 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2019 #endif
2020 }
2021
2022 /*
2023 * This routine is called by tty_hangup() when a hangup is signaled.
2024 */
2025 static void mxser_hangup(struct tty_struct *tty)
2026 {
2027 struct mxser_port *info = tty->driver_data;
2028
2029 mxser_flush_buffer(tty);
2030 tty_port_hangup(&info->port);
2031 }
2032
2033 /*
2034 * mxser_rs_break() --- routine which turns the break handling on or off
2035 */
2036 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2037 {
2038 struct mxser_port *info = tty->driver_data;
2039 unsigned long flags;
2040
2041 spin_lock_irqsave(&info->slock, flags);
2042 if (break_state == -1)
2043 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2044 info->ioaddr + UART_LCR);
2045 else
2046 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2047 info->ioaddr + UART_LCR);
2048 spin_unlock_irqrestore(&info->slock, flags);
2049 return 0;
2050 }
2051
2052 static void mxser_receive_chars(struct tty_struct *tty,
2053 struct mxser_port *port, int *status)
2054 {
2055 unsigned char ch, gdl;
2056 int ignored = 0;
2057 int cnt = 0;
2058 int recv_room;
2059 int max = 256;
2060
2061 recv_room = tty->receive_room;
2062 if (recv_room == 0 && !port->ldisc_stop_rx)
2063 mxser_stoprx(tty);
2064 if (port->board->chip_flag != MOXA_OTHER_UART) {
2065
2066 if (*status & UART_LSR_SPECIAL)
2067 goto intr_old;
2068 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2069 (*status & MOXA_MUST_LSR_RERR))
2070 goto intr_old;
2071 if (*status & MOXA_MUST_LSR_RERR)
2072 goto intr_old;
2073
2074 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2075
2076 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2077 gdl &= MOXA_MUST_GDL_MASK;
2078 if (gdl >= recv_room) {
2079 if (!port->ldisc_stop_rx)
2080 mxser_stoprx(tty);
2081 }
2082 while (gdl--) {
2083 ch = inb(port->ioaddr + UART_RX);
2084 tty_insert_flip_char(tty, ch, 0);
2085 cnt++;
2086 }
2087 goto end_intr;
2088 }
2089 intr_old:
2090
2091 do {
2092 if (max-- < 0)
2093 break;
2094
2095 ch = inb(port->ioaddr + UART_RX);
2096 if (port->board->chip_flag && (*status & UART_LSR_OE))
2097 outb(0x23, port->ioaddr + UART_FCR);
2098 *status &= port->read_status_mask;
2099 if (*status & port->ignore_status_mask) {
2100 if (++ignored > 100)
2101 break;
2102 } else {
2103 char flag = 0;
2104 if (*status & UART_LSR_SPECIAL) {
2105 if (*status & UART_LSR_BI) {
2106 flag = TTY_BREAK;
2107 port->icount.brk++;
2108
2109 if (port->port.flags & ASYNC_SAK)
2110 do_SAK(tty);
2111 } else if (*status & UART_LSR_PE) {
2112 flag = TTY_PARITY;
2113 port->icount.parity++;
2114 } else if (*status & UART_LSR_FE) {
2115 flag = TTY_FRAME;
2116 port->icount.frame++;
2117 } else if (*status & UART_LSR_OE) {
2118 flag = TTY_OVERRUN;
2119 port->icount.overrun++;
2120 } else
2121 flag = TTY_BREAK;
2122 }
2123 tty_insert_flip_char(tty, ch, flag);
2124 cnt++;
2125 if (cnt >= recv_room) {
2126 if (!port->ldisc_stop_rx)
2127 mxser_stoprx(tty);
2128 break;
2129 }
2130
2131 }
2132
2133 if (port->board->chip_flag)
2134 break;
2135
2136 *status = inb(port->ioaddr + UART_LSR);
2137 } while (*status & UART_LSR_DR);
2138
2139 end_intr:
2140 mxvar_log.rxcnt[tty->index] += cnt;
2141 port->mon_data.rxcnt += cnt;
2142 port->mon_data.up_rxcnt += cnt;
2143
2144 /*
2145 * We are called from an interrupt context with &port->slock
2146 * being held. Drop it temporarily in order to prevent
2147 * recursive locking.
2148 */
2149 spin_unlock(&port->slock);
2150 tty_flip_buffer_push(tty);
2151 spin_lock(&port->slock);
2152 }
2153
2154 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2155 {
2156 int count, cnt;
2157
2158 if (port->x_char) {
2159 outb(port->x_char, port->ioaddr + UART_TX);
2160 port->x_char = 0;
2161 mxvar_log.txcnt[tty->index]++;
2162 port->mon_data.txcnt++;
2163 port->mon_data.up_txcnt++;
2164 port->icount.tx++;
2165 return;
2166 }
2167
2168 if (port->port.xmit_buf == NULL)
2169 return;
2170
2171 if (port->xmit_cnt <= 0 || tty->stopped ||
2172 (tty->hw_stopped &&
2173 (port->type != PORT_16550A) &&
2174 (!port->board->chip_flag))) {
2175 port->IER &= ~UART_IER_THRI;
2176 outb(port->IER, port->ioaddr + UART_IER);
2177 return;
2178 }
2179
2180 cnt = port->xmit_cnt;
2181 count = port->xmit_fifo_size;
2182 do {
2183 outb(port->port.xmit_buf[port->xmit_tail++],
2184 port->ioaddr + UART_TX);
2185 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2186 if (--port->xmit_cnt <= 0)
2187 break;
2188 } while (--count > 0);
2189 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2190
2191 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2192 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2193 port->icount.tx += (cnt - port->xmit_cnt);
2194
2195 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2196 tty_wakeup(tty);
2197
2198 if (port->xmit_cnt <= 0) {
2199 port->IER &= ~UART_IER_THRI;
2200 outb(port->IER, port->ioaddr + UART_IER);
2201 }
2202 }
2203
2204 /*
2205 * This is the serial driver's generic interrupt routine
2206 */
2207 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2208 {
2209 int status, iir, i;
2210 struct mxser_board *brd = NULL;
2211 struct mxser_port *port;
2212 int max, irqbits, bits, msr;
2213 unsigned int int_cnt, pass_counter = 0;
2214 int handled = IRQ_NONE;
2215 struct tty_struct *tty;
2216
2217 for (i = 0; i < MXSER_BOARDS; i++)
2218 if (dev_id == &mxser_boards[i]) {
2219 brd = dev_id;
2220 break;
2221 }
2222
2223 if (i == MXSER_BOARDS)
2224 goto irq_stop;
2225 if (brd == NULL)
2226 goto irq_stop;
2227 max = brd->info->nports;
2228 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2229 irqbits = inb(brd->vector) & brd->vector_mask;
2230 if (irqbits == brd->vector_mask)
2231 break;
2232
2233 handled = IRQ_HANDLED;
2234 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2235 if (irqbits == brd->vector_mask)
2236 break;
2237 if (bits & irqbits)
2238 continue;
2239 port = &brd->ports[i];
2240
2241 int_cnt = 0;
2242 spin_lock(&port->slock);
2243 do {
2244 iir = inb(port->ioaddr + UART_IIR);
2245 if (iir & UART_IIR_NO_INT)
2246 break;
2247 iir &= MOXA_MUST_IIR_MASK;
2248 tty = tty_port_tty_get(&port->port);
2249 if (!tty ||
2250 (port->port.flags & ASYNC_CLOSING) ||
2251 !(port->port.flags &
2252 ASYNC_INITIALIZED)) {
2253 status = inb(port->ioaddr + UART_LSR);
2254 outb(0x27, port->ioaddr + UART_FCR);
2255 inb(port->ioaddr + UART_MSR);
2256 tty_kref_put(tty);
2257 break;
2258 }
2259
2260 status = inb(port->ioaddr + UART_LSR);
2261
2262 if (status & UART_LSR_PE)
2263 port->err_shadow |= NPPI_NOTIFY_PARITY;
2264 if (status & UART_LSR_FE)
2265 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2266 if (status & UART_LSR_OE)
2267 port->err_shadow |=
2268 NPPI_NOTIFY_HW_OVERRUN;
2269 if (status & UART_LSR_BI)
2270 port->err_shadow |= NPPI_NOTIFY_BREAK;
2271
2272 if (port->board->chip_flag) {
2273 if (iir == MOXA_MUST_IIR_GDA ||
2274 iir == MOXA_MUST_IIR_RDA ||
2275 iir == MOXA_MUST_IIR_RTO ||
2276 iir == MOXA_MUST_IIR_LSR)
2277 mxser_receive_chars(tty, port,
2278 &status);
2279
2280 } else {
2281 status &= port->read_status_mask;
2282 if (status & UART_LSR_DR)
2283 mxser_receive_chars(tty, port,
2284 &status);
2285 }
2286 msr = inb(port->ioaddr + UART_MSR);
2287 if (msr & UART_MSR_ANY_DELTA)
2288 mxser_check_modem_status(tty, port, msr);
2289
2290 if (port->board->chip_flag) {
2291 if (iir == 0x02 && (status &
2292 UART_LSR_THRE))
2293 mxser_transmit_chars(tty, port);
2294 } else {
2295 if (status & UART_LSR_THRE)
2296 mxser_transmit_chars(tty, port);
2297 }
2298 tty_kref_put(tty);
2299 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2300 spin_unlock(&port->slock);
2301 }
2302 }
2303
2304 irq_stop:
2305 return handled;
2306 }
2307
2308 static const struct tty_operations mxser_ops = {
2309 .open = mxser_open,
2310 .close = mxser_close,
2311 .write = mxser_write,
2312 .put_char = mxser_put_char,
2313 .flush_chars = mxser_flush_chars,
2314 .write_room = mxser_write_room,
2315 .chars_in_buffer = mxser_chars_in_buffer,
2316 .flush_buffer = mxser_flush_buffer,
2317 .ioctl = mxser_ioctl,
2318 .throttle = mxser_throttle,
2319 .unthrottle = mxser_unthrottle,
2320 .set_termios = mxser_set_termios,
2321 .stop = mxser_stop,
2322 .start = mxser_start,
2323 .hangup = mxser_hangup,
2324 .break_ctl = mxser_rs_break,
2325 .wait_until_sent = mxser_wait_until_sent,
2326 .tiocmget = mxser_tiocmget,
2327 .tiocmset = mxser_tiocmset,
2328 };
2329
2330 struct tty_port_operations mxser_port_ops = {
2331 .carrier_raised = mxser_carrier_raised,
2332 .dtr_rts = mxser_dtr_rts,
2333 .activate = mxser_activate,
2334 .shutdown = mxser_shutdown_port,
2335 };
2336
2337 /*
2338 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2339 */
2340
2341 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2342 unsigned int irq)
2343 {
2344 if (irq)
2345 free_irq(brd->irq, brd);
2346 if (pdev != NULL) { /* PCI */
2347 #ifdef CONFIG_PCI
2348 pci_release_region(pdev, 2);
2349 pci_release_region(pdev, 3);
2350 #endif
2351 } else {
2352 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2353 release_region(brd->vector, 1);
2354 }
2355 }
2356
2357 static int __devinit mxser_initbrd(struct mxser_board *brd,
2358 struct pci_dev *pdev)
2359 {
2360 struct mxser_port *info;
2361 unsigned int i;
2362 int retval;
2363
2364 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2365 brd->ports[0].max_baud);
2366
2367 for (i = 0; i < brd->info->nports; i++) {
2368 info = &brd->ports[i];
2369 tty_port_init(&info->port);
2370 info->port.ops = &mxser_port_ops;
2371 info->board = brd;
2372 info->stop_rx = 0;
2373 info->ldisc_stop_rx = 0;
2374
2375 /* Enhance mode enabled here */
2376 if (brd->chip_flag != MOXA_OTHER_UART)
2377 mxser_enable_must_enchance_mode(info->ioaddr);
2378
2379 info->port.flags = ASYNC_SHARE_IRQ;
2380 info->type = brd->uart_type;
2381
2382 process_txrx_fifo(info);
2383
2384 info->custom_divisor = info->baud_base * 16;
2385 info->port.close_delay = 5 * HZ / 10;
2386 info->port.closing_wait = 30 * HZ;
2387 info->normal_termios = mxvar_sdriver->init_termios;
2388 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2389 info->err_shadow = 0;
2390 spin_lock_init(&info->slock);
2391
2392 /* before set INT ISR, disable all int */
2393 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2394 info->ioaddr + UART_IER);
2395 }
2396
2397 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2398 brd);
2399 if (retval) {
2400 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2401 "conflict with another device.\n",
2402 brd->info->name, brd->irq);
2403 /* We hold resources, we need to release them. */
2404 mxser_release_res(brd, pdev, 0);
2405 }
2406 return retval;
2407 }
2408
2409 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2410 {
2411 int id, i, bits;
2412 unsigned short regs[16], irq;
2413 unsigned char scratch, scratch2;
2414
2415 brd->chip_flag = MOXA_OTHER_UART;
2416
2417 id = mxser_read_register(cap, regs);
2418 switch (id) {
2419 case C168_ASIC_ID:
2420 brd->info = &mxser_cards[0];
2421 break;
2422 case C104_ASIC_ID:
2423 brd->info = &mxser_cards[1];
2424 break;
2425 case CI104J_ASIC_ID:
2426 brd->info = &mxser_cards[2];
2427 break;
2428 case C102_ASIC_ID:
2429 brd->info = &mxser_cards[5];
2430 break;
2431 case CI132_ASIC_ID:
2432 brd->info = &mxser_cards[6];
2433 break;
2434 case CI134_ASIC_ID:
2435 brd->info = &mxser_cards[7];
2436 break;
2437 default:
2438 return 0;
2439 }
2440
2441 irq = 0;
2442 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2443 Flag-hack checks if configuration should be read as 2-port here. */
2444 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2445 irq = regs[9] & 0xF000;
2446 irq = irq | (irq >> 4);
2447 if (irq != (regs[9] & 0xFF00))
2448 goto err_irqconflict;
2449 } else if (brd->info->nports == 4) {
2450 irq = regs[9] & 0xF000;
2451 irq = irq | (irq >> 4);
2452 irq = irq | (irq >> 8);
2453 if (irq != regs[9])
2454 goto err_irqconflict;
2455 } else if (brd->info->nports == 8) {
2456 irq = regs[9] & 0xF000;
2457 irq = irq | (irq >> 4);
2458 irq = irq | (irq >> 8);
2459 if ((irq != regs[9]) || (irq != regs[10]))
2460 goto err_irqconflict;
2461 }
2462
2463 if (!irq) {
2464 printk(KERN_ERR "mxser: interrupt number unset\n");
2465 return -EIO;
2466 }
2467 brd->irq = ((int)(irq & 0xF000) >> 12);
2468 for (i = 0; i < 8; i++)
2469 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2470 if ((regs[12] & 0x80) == 0) {
2471 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2472 return -EIO;
2473 }
2474 brd->vector = (int)regs[11]; /* interrupt vector */
2475 if (id == 1)
2476 brd->vector_mask = 0x00FF;
2477 else
2478 brd->vector_mask = 0x000F;
2479 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2480 if (regs[12] & bits) {
2481 brd->ports[i].baud_base = 921600;
2482 brd->ports[i].max_baud = 921600;
2483 } else {
2484 brd->ports[i].baud_base = 115200;
2485 brd->ports[i].max_baud = 115200;
2486 }
2487 }
2488 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2489 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2490 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2491 outb(scratch2, cap + UART_LCR);
2492 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2493 scratch = inb(cap + UART_IIR);
2494
2495 if (scratch & 0xC0)
2496 brd->uart_type = PORT_16550A;
2497 else
2498 brd->uart_type = PORT_16450;
2499 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2500 "mxser(IO)")) {
2501 printk(KERN_ERR "mxser: can't request ports I/O region: "
2502 "0x%.8lx-0x%.8lx\n",
2503 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2504 8 * brd->info->nports - 1);
2505 return -EIO;
2506 }
2507 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2508 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2509 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2510 "0x%.8lx-0x%.8lx\n",
2511 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2512 8 * brd->info->nports - 1);
2513 return -EIO;
2514 }
2515 return brd->info->nports;
2516
2517 err_irqconflict:
2518 printk(KERN_ERR "mxser: invalid interrupt number\n");
2519 return -EIO;
2520 }
2521
2522 static int __devinit mxser_probe(struct pci_dev *pdev,
2523 const struct pci_device_id *ent)
2524 {
2525 #ifdef CONFIG_PCI
2526 struct mxser_board *brd;
2527 unsigned int i, j;
2528 unsigned long ioaddress;
2529 int retval = -EINVAL;
2530
2531 for (i = 0; i < MXSER_BOARDS; i++)
2532 if (mxser_boards[i].info == NULL)
2533 break;
2534
2535 if (i >= MXSER_BOARDS) {
2536 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2537 "not configured\n", MXSER_BOARDS);
2538 goto err;
2539 }
2540
2541 brd = &mxser_boards[i];
2542 brd->idx = i * MXSER_PORTS_PER_BOARD;
2543 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2544 mxser_cards[ent->driver_data].name,
2545 pdev->bus->number, PCI_SLOT(pdev->devfn));
2546
2547 retval = pci_enable_device(pdev);
2548 if (retval) {
2549 dev_err(&pdev->dev, "PCI enable failed\n");
2550 goto err;
2551 }
2552
2553 /* io address */
2554 ioaddress = pci_resource_start(pdev, 2);
2555 retval = pci_request_region(pdev, 2, "mxser(IO)");
2556 if (retval)
2557 goto err;
2558
2559 brd->info = &mxser_cards[ent->driver_data];
2560 for (i = 0; i < brd->info->nports; i++)
2561 brd->ports[i].ioaddr = ioaddress + 8 * i;
2562
2563 /* vector */
2564 ioaddress = pci_resource_start(pdev, 3);
2565 retval = pci_request_region(pdev, 3, "mxser(vector)");
2566 if (retval)
2567 goto err_relio;
2568 brd->vector = ioaddress;
2569
2570 /* irq */
2571 brd->irq = pdev->irq;
2572
2573 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2574 brd->uart_type = PORT_16550A;
2575 brd->vector_mask = 0;
2576
2577 for (i = 0; i < brd->info->nports; i++) {
2578 for (j = 0; j < UART_INFO_NUM; j++) {
2579 if (Gpci_uart_info[j].type == brd->chip_flag) {
2580 brd->ports[i].max_baud =
2581 Gpci_uart_info[j].max_baud;
2582
2583 /* exception....CP-102 */
2584 if (brd->info->flags & MXSER_HIGHBAUD)
2585 brd->ports[i].max_baud = 921600;
2586 break;
2587 }
2588 }
2589 }
2590
2591 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2592 for (i = 0; i < brd->info->nports; i++) {
2593 if (i < 4)
2594 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2595 else
2596 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2597 }
2598 outb(0, ioaddress + 4); /* default set to RS232 mode */
2599 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2600 }
2601
2602 for (i = 0; i < brd->info->nports; i++) {
2603 brd->vector_mask |= (1 << i);
2604 brd->ports[i].baud_base = 921600;
2605 }
2606
2607 /* mxser_initbrd will hook ISR. */
2608 retval = mxser_initbrd(brd, pdev);
2609 if (retval)
2610 goto err_null;
2611
2612 for (i = 0; i < brd->info->nports; i++)
2613 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2614
2615 pci_set_drvdata(pdev, brd);
2616
2617 return 0;
2618 err_relio:
2619 pci_release_region(pdev, 2);
2620 err_null:
2621 brd->info = NULL;
2622 err:
2623 return retval;
2624 #else
2625 return -ENODEV;
2626 #endif
2627 }
2628
2629 static void __devexit mxser_remove(struct pci_dev *pdev)
2630 {
2631 struct mxser_board *brd = pci_get_drvdata(pdev);
2632 unsigned int i;
2633
2634 for (i = 0; i < brd->info->nports; i++)
2635 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2636
2637 mxser_release_res(brd, pdev, 1);
2638 brd->info = NULL;
2639 }
2640
2641 static struct pci_driver mxser_driver = {
2642 .name = "mxser",
2643 .id_table = mxser_pcibrds,
2644 .probe = mxser_probe,
2645 .remove = __devexit_p(mxser_remove)
2646 };
2647
2648 static int __init mxser_module_init(void)
2649 {
2650 struct mxser_board *brd;
2651 unsigned int b, i, m;
2652 int retval;
2653
2654 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2655 if (!mxvar_sdriver)
2656 return -ENOMEM;
2657
2658 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2659 MXSER_VERSION);
2660
2661 /* Initialize the tty_driver structure */
2662 mxvar_sdriver->owner = THIS_MODULE;
2663 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2664 mxvar_sdriver->name = "ttyMI";
2665 mxvar_sdriver->major = ttymajor;
2666 mxvar_sdriver->minor_start = 0;
2667 mxvar_sdriver->num = MXSER_PORTS + 1;
2668 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2669 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2670 mxvar_sdriver->init_termios = tty_std_termios;
2671 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2672 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2673 tty_set_operations(mxvar_sdriver, &mxser_ops);
2674
2675 retval = tty_register_driver(mxvar_sdriver);
2676 if (retval) {
2677 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2678 "tty driver !\n");
2679 goto err_put;
2680 }
2681
2682 /* Start finding ISA boards here */
2683 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2684 if (!ioaddr[b])
2685 continue;
2686
2687 brd = &mxser_boards[m];
2688 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2689 if (retval <= 0) {
2690 brd->info = NULL;
2691 continue;
2692 }
2693
2694 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2695 brd->info->name, ioaddr[b]);
2696
2697 /* mxser_initbrd will hook ISR. */
2698 if (mxser_initbrd(brd, NULL) < 0) {
2699 brd->info = NULL;
2700 continue;
2701 }
2702
2703 brd->idx = m * MXSER_PORTS_PER_BOARD;
2704 for (i = 0; i < brd->info->nports; i++)
2705 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2706
2707 m++;
2708 }
2709
2710 retval = pci_register_driver(&mxser_driver);
2711 if (retval) {
2712 printk(KERN_ERR "mxser: can't register pci driver\n");
2713 if (!m) {
2714 retval = -ENODEV;
2715 goto err_unr;
2716 } /* else: we have some ISA cards under control */
2717 }
2718
2719 return 0;
2720 err_unr:
2721 tty_unregister_driver(mxvar_sdriver);
2722 err_put:
2723 put_tty_driver(mxvar_sdriver);
2724 return retval;
2725 }
2726
2727 static void __exit mxser_module_exit(void)
2728 {
2729 unsigned int i, j;
2730
2731 pci_unregister_driver(&mxser_driver);
2732
2733 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2734 if (mxser_boards[i].info != NULL)
2735 for (j = 0; j < mxser_boards[i].info->nports; j++)
2736 tty_unregister_device(mxvar_sdriver,
2737 mxser_boards[i].idx + j);
2738 tty_unregister_driver(mxvar_sdriver);
2739 put_tty_driver(mxvar_sdriver);
2740
2741 for (i = 0; i < MXSER_BOARDS; i++)
2742 if (mxser_boards[i].info != NULL)
2743 mxser_release_res(&mxser_boards[i], NULL, 1);
2744 }
2745
2746 module_init(mxser_module_init);
2747 module_exit(mxser_module_exit);