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Linux 2.6.34-rc3
[pohmelfs.git] / drivers / isdn / hardware / mISDN / w6692.c
blob2952a58c7a6158a824f3afec084ea471d7179592
1 /*
2 * w6692.c mISDN driver for Winbond w6692 based cards
3 *
4 * Author Karsten Keil <kkeil@suse.de>
5 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
6 *
7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/delay.h>
27 #include <linux/mISDNhw.h>
28 #include "w6692.h"
29
30 #define W6692_REV "2.0"
31
32 #define DBUSY_TIMER_VALUE 80
33
34 enum {
35 W6692_ASUS,
36 W6692_WINBOND,
37 W6692_USR
38 };
39
40 /* private data in the PCI devices list */
41 struct w6692map {
42 u_int subtype;
43 char *name;
44 };
45
46 static const struct w6692map w6692_map[] =
47 {
48 {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
49 {W6692_WINBOND, "Winbond W6692"},
50 {W6692_USR, "USR W6692"}
51 };
52
53 #ifndef PCI_VENDOR_ID_USR
54 #define PCI_VENDOR_ID_USR 0x16ec
55 #define PCI_DEVICE_ID_USR_6692 0x3409
56 #endif
57
58 struct w6692_ch {
59 struct bchannel bch;
60 u32 addr;
61 struct timer_list timer;
62 u8 b_mode;
63 };
64
65 struct w6692_hw {
66 struct list_head list;
67 struct pci_dev *pdev;
68 char name[MISDN_MAX_IDLEN];
69 u32 irq;
70 u32 irqcnt;
71 u32 addr;
72 u32 fmask; /* feature mask - bit set per card nr */
73 int subtype;
74 spinlock_t lock; /* hw lock */
75 u8 imask;
76 u8 pctl;
77 u8 xaddr;
78 u8 xdata;
79 u8 state;
80 struct w6692_ch bc[2];
81 struct dchannel dch;
82 char log[64];
83 };
84
85 static LIST_HEAD(Cards);
86 static DEFINE_RWLOCK(card_lock); /* protect Cards */
87
88 static int w6692_cnt;
89 static int debug;
90 static u32 led;
91 static u32 pots;
92
93 static void
94 _set_debug(struct w6692_hw *card)
95 {
96 card->dch.debug = debug;
97 card->bc[0].bch.debug = debug;
98 card->bc[1].bch.debug = debug;
99 }
100
101 static int
102 set_debug(const char *val, struct kernel_param *kp)
103 {
104 int ret;
105 struct w6692_hw *card;
106
107 ret = param_set_uint(val, kp);
108 if (!ret) {
109 read_lock(&card_lock);
110 list_for_each_entry(card, &Cards, list)
111 _set_debug(card);
112 read_unlock(&card_lock);
113 }
114 return ret;
115 }
116
117 MODULE_AUTHOR("Karsten Keil");
118 MODULE_LICENSE("GPL v2");
119 MODULE_VERSION(W6692_REV);
120 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
121 MODULE_PARM_DESC(debug, "W6692 debug mask");
122 module_param(led, uint, S_IRUGO | S_IWUSR);
123 MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
124 module_param(pots, uint, S_IRUGO | S_IWUSR);
125 MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
126
127 static inline u8
128 ReadW6692(struct w6692_hw *card, u8 offset)
129 {
130 return inb(card->addr + offset);
131 }
132
133 static inline void
134 WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
135 {
136 outb(value, card->addr + offset);
137 }
138
139 static inline u8
140 ReadW6692B(struct w6692_ch *bc, u8 offset)
141 {
142 return inb(bc->addr + offset);
143 }
144
145 static inline void
146 WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
147 {
148 outb(value, bc->addr + offset);
149 }
150
151 static void
152 enable_hwirq(struct w6692_hw *card)
153 {
154 WriteW6692(card, W_IMASK, card->imask);
155 }
156
157 static void
158 disable_hwirq(struct w6692_hw *card)
159 {
160 WriteW6692(card, W_IMASK, 0xff);
161 }
162
163 static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
164
165 static void
166 W6692Version(struct w6692_hw *card)
167 {
168 int val;
169
170 val = ReadW6692(card, W_D_RBCH);
171 pr_notice("%s: Winbond W6692 version: %s\n", card->name,
172 W6692Ver[(val >> 6) & 3]);
173 }
174
175 static void
176 w6692_led_handler(struct w6692_hw *card, int on)
177 {
178 if ((!(card->fmask & led)) || card->subtype == W6692_USR)
179 return;
180 if (on) {
181 card->xdata &= 0xfb; /* LED ON */
182 WriteW6692(card, W_XDATA, card->xdata);
183 } else {
184 card->xdata |= 0x04; /* LED OFF */
185 WriteW6692(card, W_XDATA, card->xdata);
186 }
187 }
188
189 static void
190 ph_command(struct w6692_hw *card, u8 cmd)
191 {
192 pr_debug("%s: ph_command %x\n", card->name, cmd);
193 WriteW6692(card, W_CIX, cmd);
194 }
195
196 static void
197 W6692_new_ph(struct w6692_hw *card)
198 {
199 if (card->state == W_L1CMD_RST)
200 ph_command(card, W_L1CMD_DRC);
201 schedule_event(&card->dch, FLG_PHCHANGE);
202 }
203
204 static void
205 W6692_ph_bh(struct dchannel *dch)
206 {
207 struct w6692_hw *card = dch->hw;
208
209 switch (card->state) {
210 case W_L1CMD_RST:
211 dch->state = 0;
212 l1_event(dch->l1, HW_RESET_IND);
213 break;
214 case W_L1IND_CD:
215 dch->state = 3;
216 l1_event(dch->l1, HW_DEACT_CNF);
217 break;
218 case W_L1IND_DRD:
219 dch->state = 3;
220 l1_event(dch->l1, HW_DEACT_IND);
221 break;
222 case W_L1IND_CE:
223 dch->state = 4;
224 l1_event(dch->l1, HW_POWERUP_IND);
225 break;
226 case W_L1IND_LD:
227 if (dch->state <= 5) {
228 dch->state = 5;
229 l1_event(dch->l1, ANYSIGNAL);
230 } else {
231 dch->state = 8;
232 l1_event(dch->l1, LOSTFRAMING);
233 }
234 break;
235 case W_L1IND_ARD:
236 dch->state = 6;
237 l1_event(dch->l1, INFO2);
238 break;
239 case W_L1IND_AI8:
240 dch->state = 7;
241 l1_event(dch->l1, INFO4_P8);
242 break;
243 case W_L1IND_AI10:
244 dch->state = 7;
245 l1_event(dch->l1, INFO4_P10);
246 break;
247 default:
248 pr_debug("%s: TE unknown state %02x dch state %02x\n",
249 card->name, card->state, dch->state);
250 break;
251 }
252 pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
253 }
254
255 static void
256 W6692_empty_Dfifo(struct w6692_hw *card, int count)
257 {
258 struct dchannel *dch = &card->dch;
259 u8 *ptr;
260
261 pr_debug("%s: empty_Dfifo %d\n", card->name, count);
262 if (!dch->rx_skb) {
263 dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
264 if (!dch->rx_skb) {
265 pr_info("%s: D receive out of memory\n", card->name);
266 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
267 return;
268 }
269 }
270 if ((dch->rx_skb->len + count) >= dch->maxlen) {
271 pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
272 dch->rx_skb->len + count);
273 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
274 return;
275 }
276 ptr = skb_put(dch->rx_skb, count);
277 insb(card->addr + W_D_RFIFO, ptr, count);
278 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
279 if (debug & DEBUG_HW_DFIFO) {
280 snprintf(card->log, 63, "D-recv %s %d ",
281 card->name, count);
282 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
283 }
284 }
285
286 static void
287 W6692_fill_Dfifo(struct w6692_hw *card)
288 {
289 struct dchannel *dch = &card->dch;
290 int count;
291 u8 *ptr;
292 u8 cmd = W_D_CMDR_XMS;
293
294 pr_debug("%s: fill_Dfifo\n", card->name);
295 if (!dch->tx_skb)
296 return;
297 count = dch->tx_skb->len - dch->tx_idx;
298 if (count <= 0)
299 return;
300 if (count > W_D_FIFO_THRESH)
301 count = W_D_FIFO_THRESH;
302 else
303 cmd |= W_D_CMDR_XME;
304 ptr = dch->tx_skb->data + dch->tx_idx;
305 dch->tx_idx += count;
306 outsb(card->addr + W_D_XFIFO, ptr, count);
307 WriteW6692(card, W_D_CMDR, cmd);
308 if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
309 pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
310 del_timer(&dch->timer);
311 }
312 init_timer(&dch->timer);
313 dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
314 add_timer(&dch->timer);
315 if (debug & DEBUG_HW_DFIFO) {
316 snprintf(card->log, 63, "D-send %s %d ",
317 card->name, count);
318 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
319 }
320 }
321
322 static void
323 d_retransmit(struct w6692_hw *card)
324 {
325 struct dchannel *dch = &card->dch;
326
327 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
328 del_timer(&dch->timer);
329 #ifdef FIXME
330 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
331 dchannel_sched_event(dch, D_CLEARBUSY);
332 #endif
333 if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
334 /* Restart frame */
335 dch->tx_idx = 0;
336 W6692_fill_Dfifo(card);
337 } else if (dch->tx_skb) { /* should not happen */
338 pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
339 test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
340 dch->tx_idx = 0;
341 W6692_fill_Dfifo(card);
342 } else {
343 pr_info("%s: XDU no TX_BUSY\n", card->name);
344 if (get_next_dframe(dch))
345 W6692_fill_Dfifo(card);
346 }
347 }
348
349 static void
350 handle_rxD(struct w6692_hw *card) {
351 u8 stat;
352 int count;
353
354 stat = ReadW6692(card, W_D_RSTA);
355 if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
356 if (stat & W_D_RSTA_RDOV) {
357 pr_debug("%s: D-channel RDOV\n", card->name);
358 #ifdef ERROR_STATISTIC
359 card->dch.err_rx++;
360 #endif
361 }
362 if (stat & W_D_RSTA_CRCE) {
363 pr_debug("%s: D-channel CRC error\n", card->name);
364 #ifdef ERROR_STATISTIC
365 card->dch.err_crc++;
366 #endif
367 }
368 if (stat & W_D_RSTA_RMB) {
369 pr_debug("%s: D-channel ABORT\n", card->name);
370 #ifdef ERROR_STATISTIC
371 card->dch.err_rx++;
372 #endif
373 }
374 if (card->dch.rx_skb)
375 dev_kfree_skb(card->dch.rx_skb);
376 card->dch.rx_skb = NULL;
377 WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
378 } else {
379 count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
380 if (count == 0)
381 count = W_D_FIFO_THRESH;
382 W6692_empty_Dfifo(card, count);
383 recv_Dchannel(&card->dch);
384 }
385 }
386
387 static void
388 handle_txD(struct w6692_hw *card) {
389 if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
390 del_timer(&card->dch.timer);
391 if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
392 W6692_fill_Dfifo(card);
393 } else {
394 if (card->dch.tx_skb)
395 dev_kfree_skb(card->dch.tx_skb);
396 if (get_next_dframe(&card->dch))
397 W6692_fill_Dfifo(card);
398 }
399 }
400
401 static void
402 handle_statusD(struct w6692_hw *card)
403 {
404 struct dchannel *dch = &card->dch;
405 u8 exval, v1, cir;
406
407 exval = ReadW6692(card, W_D_EXIR);
408
409 pr_debug("%s: D_EXIR %02x\n", card->name, exval);
410 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
411 /* Transmit underrun/collision */
412 pr_debug("%s: D-channel underrun/collision\n", card->name);
413 #ifdef ERROR_STATISTIC
414 dch->err_tx++;
415 #endif
416 d_retransmit(card);
417 }
418 if (exval & W_D_EXI_RDOV) { /* RDOV */
419 pr_debug("%s: D-channel RDOV\n", card->name);
420 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
421 }
422 if (exval & W_D_EXI_TIN2) /* TIN2 - never */
423 pr_debug("%s: spurious TIN2 interrupt\n", card->name);
424 if (exval & W_D_EXI_MOC) { /* MOC - not supported */
425 v1 = ReadW6692(card, W_MOSR);
426 pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
427 card->name, v1);
428 }
429 if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
430 cir = ReadW6692(card, W_CIR);
431 pr_debug("%s: ISC CIR %02X\n", card->name, cir);
432 if (cir & W_CIR_ICC) {
433 v1 = cir & W_CIR_COD_MASK;
434 pr_debug("%s: ph_state_change %x -> %x\n", card->name,
435 dch->state, v1);
436 card->state = v1;
437 if (card->fmask & led) {
438 switch (v1) {
439 case W_L1IND_AI8:
440 case W_L1IND_AI10:
441 w6692_led_handler(card, 1);
442 break;
443 default:
444 w6692_led_handler(card, 0);
445 break;
446 }
447 }
448 W6692_new_ph(card);
449 }
450 if (cir & W_CIR_SCC) {
451 v1 = ReadW6692(card, W_SQR);
452 pr_debug("%s: SCC SQR %02X\n", card->name, v1);
453 }
454 }
455 if (exval & W_D_EXI_WEXP)
456 pr_debug("%s: spurious WEXP interrupt!\n", card->name);
457 if (exval & W_D_EXI_TEXP)
458 pr_debug("%s: spurious TEXP interrupt!\n", card->name);
459 }
460
461 static void
462 W6692_empty_Bfifo(struct w6692_ch *wch, int count)
463 {
464 struct w6692_hw *card = wch->bch.hw;
465 u8 *ptr;
466
467 pr_debug("%s: empty_Bfifo %d\n", card->name, count);
468 if (unlikely(wch->bch.state == ISDN_P_NONE)) {
469 pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
470 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
471 if (wch->bch.rx_skb)
472 skb_trim(wch->bch.rx_skb, 0);
473 return;
474 }
475 if (!wch->bch.rx_skb) {
476 wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC);
477 if (unlikely(!wch->bch.rx_skb)) {
478 pr_info("%s: B receive out of memory\n", card->name);
479 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
480 W_B_CMDR_RACT);
481 return;
482 }
483 }
484 if (wch->bch.rx_skb->len + count > wch->bch.maxlen) {
485 pr_debug("%s: empty_Bfifo incoming packet too large\n",
486 card->name);
487 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
488 skb_trim(wch->bch.rx_skb, 0);
489 return;
490 }
491 ptr = skb_put(wch->bch.rx_skb, count);
492 insb(wch->addr + W_B_RFIFO, ptr, count);
493 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
494 if (debug & DEBUG_HW_DFIFO) {
495 snprintf(card->log, 63, "B%1d-recv %s %d ",
496 wch->bch.nr, card->name, count);
497 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
498 }
499 }
500
501 static void
502 W6692_fill_Bfifo(struct w6692_ch *wch)
503 {
504 struct w6692_hw *card = wch->bch.hw;
505 int count;
506 u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
507
508 pr_debug("%s: fill Bfifo\n", card->name);
509 if (!wch->bch.tx_skb)
510 return;
511 count = wch->bch.tx_skb->len - wch->bch.tx_idx;
512 if (count <= 0)
513 return;
514 ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
515 if (count > W_B_FIFO_THRESH)
516 count = W_B_FIFO_THRESH;
517 else if (test_bit(FLG_HDLC, &wch->bch.Flags))
518 cmd |= W_B_CMDR_XME;
519
520 pr_debug("%s: fill Bfifo%d/%d\n", card->name,
521 count, wch->bch.tx_idx);
522 wch->bch.tx_idx += count;
523 outsb(wch->addr + W_B_XFIFO, ptr, count);
524 WriteW6692B(wch, W_B_CMDR, cmd);
525 if (debug & DEBUG_HW_DFIFO) {
526 snprintf(card->log, 63, "B%1d-send %s %d ",
527 wch->bch.nr, card->name, count);
528 print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
529 }
530 }
531
532 #if 0
533 static int
534 setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
535 {
536 struct w6692_hw *card = wch->bch.hw;
537 u16 *vol = (u16 *)skb->data;
538 u8 val;
539
540 if ((!(card->fmask & pots)) ||
541 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
542 return -ENODEV;
543 if (skb->len < 2)
544 return -EINVAL;
545 if (*vol > 7)
546 return -EINVAL;
547 val = *vol & 7;
548 val = 7 - val;
549 if (mic) {
550 val <<= 3;
551 card->xaddr &= 0xc7;
552 } else {
553 card->xaddr &= 0xf8;
554 }
555 card->xaddr |= val;
556 WriteW6692(card, W_XADDR, card->xaddr);
557 return 0;
558 }
559
560 static int
561 enable_pots(struct w6692_ch *wch)
562 {
563 struct w6692_hw *card = wch->bch.hw;
564
565 if ((!(card->fmask & pots)) ||
566 !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
567 return -ENODEV;
568 wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
569 WriteW6692B(wch, W_B_MODE, wch->b_mode);
570 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
571 card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
572 WriteW6692(card, W_PCTL, card->pctl);
573 return 0;
574 }
575 #endif
576
577 static int
578 disable_pots(struct w6692_ch *wch)
579 {
580 struct w6692_hw *card = wch->bch.hw;
581
582 if (!(card->fmask & pots))
583 return -ENODEV;
584 wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
585 WriteW6692B(wch, W_B_MODE, wch->b_mode);
586 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
587 W_B_CMDR_XRST);
588 return 0;
589 }
590
591 static int
592 w6692_mode(struct w6692_ch *wch, u32 pr)
593 {
594 struct w6692_hw *card;
595
596 card = wch->bch.hw;
597 pr_debug("%s: B%d protocol %x-->%x\n", card->name,
598 wch->bch.nr, wch->bch.state, pr);
599 switch (pr) {
600 case ISDN_P_NONE:
601 if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
602 disable_pots(wch);
603 wch->b_mode = 0;
604 mISDN_clear_bchannel(&wch->bch);
605 WriteW6692B(wch, W_B_MODE, wch->b_mode);
606 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
607 test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
608 test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
609 break;
610 case ISDN_P_B_RAW:
611 wch->b_mode = W_B_MODE_MMS;
612 WriteW6692B(wch, W_B_MODE, wch->b_mode);
613 WriteW6692B(wch, W_B_EXIM, 0);
614 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
615 W_B_CMDR_XRST);
616 test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
617 break;
618 case ISDN_P_B_HDLC:
619 wch->b_mode = W_B_MODE_ITF;
620 WriteW6692B(wch, W_B_MODE, wch->b_mode);
621 WriteW6692B(wch, W_B_ADM1, 0xff);
622 WriteW6692B(wch, W_B_ADM2, 0xff);
623 WriteW6692B(wch, W_B_EXIM, 0);
624 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
625 W_B_CMDR_XRST);
626 test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
627 break;
628 default:
629 pr_info("%s: protocol %x not known\n", card->name, pr);
630 return -ENOPROTOOPT;
631 }
632 wch->bch.state = pr;
633 return 0;
634 }
635
636 static void
637 send_next(struct w6692_ch *wch)
638 {
639 if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len)
640 W6692_fill_Bfifo(wch);
641 else {
642 if (wch->bch.tx_skb) {
643 /* send confirm, on trans, free on hdlc. */
644 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
645 confirm_Bsend(&wch->bch);
646 dev_kfree_skb(wch->bch.tx_skb);
647 }
648 if (get_next_bframe(&wch->bch))
649 W6692_fill_Bfifo(wch);
650 }
651 }
652
653 static void
654 W6692B_interrupt(struct w6692_hw *card, int ch)
655 {
656 struct w6692_ch *wch = &card->bc[ch];
657 int count;
658 u8 stat, star = 0;
659
660 stat = ReadW6692B(wch, W_B_EXIR);
661 pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
662 if (stat & W_B_EXI_RME) {
663 star = ReadW6692B(wch, W_B_STAR);
664 if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
665 if ((star & W_B_STAR_RDOV) &&
666 test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
667 pr_debug("%s: B%d RDOV proto=%x\n", card->name,
668 wch->bch.nr, wch->bch.state);
669 #ifdef ERROR_STATISTIC
670 wch->bch.err_rdo++;
671 #endif
672 }
673 if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
674 if (star & W_B_STAR_CRCE) {
675 pr_debug("%s: B%d CRC error\n",
676 card->name, wch->bch.nr);
677 #ifdef ERROR_STATISTIC
678 wch->bch.err_crc++;
679 #endif
680 }
681 if (star & W_B_STAR_RMB) {
682 pr_debug("%s: B%d message abort\n",
683 card->name, wch->bch.nr);
684 #ifdef ERROR_STATISTIC
685 wch->bch.err_inv++;
686 #endif
687 }
688 }
689 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
690 W_B_CMDR_RRST | W_B_CMDR_RACT);
691 if (wch->bch.rx_skb)
692 skb_trim(wch->bch.rx_skb, 0);
693 } else {
694 count = ReadW6692B(wch, W_B_RBCL) &
695 (W_B_FIFO_THRESH - 1);
696 if (count == 0)
697 count = W_B_FIFO_THRESH;
698 W6692_empty_Bfifo(wch, count);
699 recv_Bchannel(&wch->bch, 0);
700 }
701 }
702 if (stat & W_B_EXI_RMR) {
703 if (!(stat & W_B_EXI_RME))
704 star = ReadW6692B(wch, W_B_STAR);
705 if (star & W_B_STAR_RDOV) {
706 pr_debug("%s: B%d RDOV proto=%x\n", card->name,
707 wch->bch.nr, wch->bch.state);
708 #ifdef ERROR_STATISTIC
709 wch->bch.err_rdo++;
710 #endif
711 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
712 W_B_CMDR_RRST | W_B_CMDR_RACT);
713 } else {
714 W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
715 if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) &&
716 wch->bch.rx_skb && (wch->bch.rx_skb->len > 0))
717 recv_Bchannel(&wch->bch, 0);
718 }
719 }
720 if (stat & W_B_EXI_RDOV) {
721 /* only if it is not handled yet */
722 if (!(star & W_B_STAR_RDOV)) {
723 pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
724 wch->bch.nr, wch->bch.state);
725 #ifdef ERROR_STATISTIC
726 wch->bch.err_rdo++;
727 #endif
728 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
729 W_B_CMDR_RRST | W_B_CMDR_RACT);
730 }
731 }
732 if (stat & W_B_EXI_XFR) {
733 if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
734 star = ReadW6692B(wch, W_B_STAR);
735 pr_debug("%s: B%d star %02x\n", card->name,
736 wch->bch.nr, star);
737 }
738 if (star & W_B_STAR_XDOW) {
739 pr_debug("%s: B%d XDOW proto=%x\n", card->name,
740 wch->bch.nr, wch->bch.state);
741 #ifdef ERROR_STATISTIC
742 wch->bch.err_xdu++;
743 #endif
744 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
745 W_B_CMDR_RACT);
746 /* resend */
747 if (wch->bch.tx_skb) {
748 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
749 wch->bch.tx_idx = 0;
750 }
751 }
752 send_next(wch);
753 if (stat & W_B_EXI_XDUN)
754 return; /* handle XDOW only once */
755 }
756 if (stat & W_B_EXI_XDUN) {
757 pr_debug("%s: B%d XDUN proto=%x\n", card->name,
758 wch->bch.nr, wch->bch.state);
759 #ifdef ERROR_STATISTIC
760 wch->bch.err_xdu++;
761 #endif
762 WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
763 /* resend */
764 if (wch->bch.tx_skb) {
765 if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
766 wch->bch.tx_idx = 0;
767 }
768 send_next(wch);
769 }
770 }
771
772 static irqreturn_t
773 w6692_irq(int intno, void *dev_id)
774 {
775 struct w6692_hw *card = dev_id;
776 u8 ista;
777
778 spin_lock(&card->lock);
779 ista = ReadW6692(card, W_ISTA);
780 if ((ista | card->imask) == card->imask) {
781 /* possible a shared IRQ reqest */
782 spin_unlock(&card->lock);
783 return IRQ_NONE;
784 }
785 card->irqcnt++;
786 pr_debug("%s: ista %02x\n", card->name, ista);
787 ista &= ~card->imask;
788 if (ista & W_INT_B1_EXI)
789 W6692B_interrupt(card, 0);
790 if (ista & W_INT_B2_EXI)
791 W6692B_interrupt(card, 1);
792 if (ista & W_INT_D_RME)
793 handle_rxD(card);
794 if (ista & W_INT_D_RMR)
795 W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
796 if (ista & W_INT_D_XFR)
797 handle_txD(card);
798 if (ista & W_INT_D_EXI)
799 handle_statusD(card);
800 if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
801 pr_debug("%s: W6692 spurious XINT!\n", card->name);
802 /* End IRQ Handler */
803 spin_unlock(&card->lock);
804 return IRQ_HANDLED;
805 }
806
807 static void
808 dbusy_timer_handler(struct dchannel *dch)
809 {
810 struct w6692_hw *card = dch->hw;
811 int rbch, star;
812 u_long flags;
813
814 if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
815 spin_lock_irqsave(&card->lock, flags);
816 rbch = ReadW6692(card, W_D_RBCH);
817 star = ReadW6692(card, W_D_STAR);
818 pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
819 card->name, rbch, star);
820 if (star & W_D_STAR_XBZ) /* D-Channel Busy */
821 test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
822 else {
823 /* discard frame; reset transceiver */
824 test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
825 if (dch->tx_idx)
826 dch->tx_idx = 0;
827 else
828 pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
829 card->name);
830 /* Transmitter reset */
831 WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
832 }
833 spin_unlock_irqrestore(&card->lock, flags);
834 }
835 }
836
837 void initW6692(struct w6692_hw *card)
838 {
839 u8 val;
840
841 card->dch.timer.function = (void *)dbusy_timer_handler;
842 card->dch.timer.data = (u_long)&card->dch;
843 init_timer(&card->dch.timer);
844 w6692_mode(&card->bc[0], ISDN_P_NONE);
845 w6692_mode(&card->bc[1], ISDN_P_NONE);
846 WriteW6692(card, W_D_CTL, 0x00);
847 disable_hwirq(card);
848 WriteW6692(card, W_D_SAM, 0xff);
849 WriteW6692(card, W_D_TAM, 0xff);
850 WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
851 card->state = W_L1CMD_RST;
852 ph_command(card, W_L1CMD_RST);
853 ph_command(card, W_L1CMD_ECK);
854 /* enable all IRQ but extern */
855 card->imask = 0x18;
856 WriteW6692(card, W_D_EXIM, 0x00);
857 WriteW6692B(&card->bc[0], W_B_EXIM, 0);
858 WriteW6692B(&card->bc[1], W_B_EXIM, 0);
859 /* Reset D-chan receiver and transmitter */
860 WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
861 /* Reset B-chan receiver and transmitter */
862 WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
863 WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
864 /* enable peripheral */
865 if (card->subtype == W6692_USR) {
866 /* seems that USR implemented some power control features
867 * Pin 79 is connected to the oscilator circuit so we
868 * have to handle it here
869 */
870 card->pctl = 0x80;
871 card->xdata = 0;
872 WriteW6692(card, W_PCTL, card->pctl);
873 WriteW6692(card, W_XDATA, card->xdata);
874 } else {
875 card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
876 W_PCTL_OE1 | W_PCTL_OE0;
877 card->xaddr = 0x00;/* all sw off */
878 if (card->fmask & pots)
879 card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
880 if (card->fmask & led)
881 card->xdata |= 0x04; /* LED OFF */
882 if ((card->fmask & pots) || (card->fmask & led)) {
883 WriteW6692(card, W_PCTL, card->pctl);
884 WriteW6692(card, W_XADDR, card->xaddr);
885 WriteW6692(card, W_XDATA, card->xdata);
886 val = ReadW6692(card, W_XADDR);
887 if (debug & DEBUG_HW)
888 pr_notice("%s: W_XADDR=%02x\n",
889 card->name, val);
890 }
891 }
892 }
893
894 static void
895 reset_w6692(struct w6692_hw *card)
896 {
897 WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
898 mdelay(10);
899 WriteW6692(card, W_D_CTL, 0);
900 }
901
902 static int
903 init_card(struct w6692_hw *card)
904 {
905 int cnt = 3;
906 u_long flags;
907
908 spin_lock_irqsave(&card->lock, flags);
909 disable_hwirq(card);
910 spin_unlock_irqrestore(&card->lock, flags);
911 if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
912 pr_info("%s: couldn't get interrupt %d\n", card->name,
913 card->irq);
914 return -EIO;
915 }
916 while (cnt--) {
917 spin_lock_irqsave(&card->lock, flags);
918 initW6692(card);
919 enable_hwirq(card);
920 spin_unlock_irqrestore(&card->lock, flags);
921 /* Timeout 10ms */
922 msleep_interruptible(10);
923 if (debug & DEBUG_HW)
924 pr_notice("%s: IRQ %d count %d\n", card->name,
925 card->irq, card->irqcnt);
926 if (!card->irqcnt) {
927 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
928 card->name, card->irq, 3 - cnt);
929 reset_w6692(card);
930 } else
931 return 0;
932 }
933 free_irq(card->irq, card);
934 return -EIO;
935 }
936
937 static int
938 w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
939 {
940 struct bchannel *bch = container_of(ch, struct bchannel, ch);
941 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
942 struct w6692_hw *card = bch->hw;
943 int ret = -EINVAL;
944 struct mISDNhead *hh = mISDN_HEAD_P(skb);
945 u32 id;
946 u_long flags;
947
948 switch (hh->prim) {
949 case PH_DATA_REQ:
950 spin_lock_irqsave(&card->lock, flags);
951 ret = bchannel_senddata(bch, skb);
952 if (ret > 0) { /* direct TX */
953 id = hh->id; /* skb can be freed */
954 ret = 0;
955 W6692_fill_Bfifo(bc);
956 spin_unlock_irqrestore(&card->lock, flags);
957 if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
958 queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
959 } else
960 spin_unlock_irqrestore(&card->lock, flags);
961 return ret;
962 case PH_ACTIVATE_REQ:
963 spin_lock_irqsave(&card->lock, flags);
964 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
965 ret = w6692_mode(bc, ch->protocol);
966 else
967 ret = 0;
968 spin_unlock_irqrestore(&card->lock, flags);
969 if (!ret)
970 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
971 NULL, GFP_KERNEL);
972 break;
973 case PH_DEACTIVATE_REQ:
974 spin_lock_irqsave(&card->lock, flags);
975 mISDN_clear_bchannel(bch);
976 w6692_mode(bc, ISDN_P_NONE);
977 spin_unlock_irqrestore(&card->lock, flags);
978 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
979 NULL, GFP_KERNEL);
980 ret = 0;
981 break;
982 default:
983 pr_info("%s: %s unknown prim(%x,%x)\n",
984 card->name, __func__, hh->prim, hh->id);
985 ret = -EINVAL;
986 }
987 if (!ret)
988 dev_kfree_skb(skb);
989 return ret;
990 }
991
992 static int
993 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
994 {
995 int ret = 0;
996
997 switch (cq->op) {
998 case MISDN_CTRL_GETOP:
999 cq->op = 0;
1000 break;
1001 /* Nothing implemented yet */
1002 case MISDN_CTRL_FILL_EMPTY:
1003 default:
1004 pr_info("%s: unknown Op %x\n", __func__, cq->op);
1005 ret = -EINVAL;
1006 break;
1007 }
1008 return ret;
1009 }
1010
1011 static int
1012 open_bchannel(struct w6692_hw *card, struct channel_req *rq)
1013 {
1014 struct bchannel *bch;
1015
1016 if (rq->adr.channel > 2)
1017 return -EINVAL;
1018 if (rq->protocol == ISDN_P_NONE)
1019 return -EINVAL;
1020 bch = &card->bc[rq->adr.channel - 1].bch;
1021 if (test_and_set_bit(FLG_OPEN, &bch->Flags))
1022 return -EBUSY; /* b-channel can be only open once */
1023 test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
1024 bch->ch.protocol = rq->protocol;
1025 rq->ch = &bch->ch;
1026 return 0;
1027 }
1028
1029 static int
1030 channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
1031 {
1032 int ret = 0;
1033
1034 switch (cq->op) {
1035 case MISDN_CTRL_GETOP:
1036 cq->op = 0;
1037 break;
1038 default:
1039 pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
1040 ret = -EINVAL;
1041 break;
1042 }
1043 return ret;
1044 }
1045
1046 static int
1047 w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1048 {
1049 struct bchannel *bch = container_of(ch, struct bchannel, ch);
1050 struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
1051 struct w6692_hw *card = bch->hw;
1052 int ret = -EINVAL;
1053 u_long flags;
1054
1055 pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
1056 switch (cmd) {
1057 case CLOSE_CHANNEL:
1058 test_and_clear_bit(FLG_OPEN, &bch->Flags);
1059 if (test_bit(FLG_ACTIVE, &bch->Flags)) {
1060 spin_lock_irqsave(&card->lock, flags);
1061 mISDN_freebchannel(bch);
1062 w6692_mode(bc, ISDN_P_NONE);
1063 spin_unlock_irqrestore(&card->lock, flags);
1064 } else {
1065 skb_queue_purge(&bch->rqueue);
1066 bch->rcount = 0;
1067 }
1068 ch->protocol = ISDN_P_NONE;
1069 ch->peer = NULL;
1070 module_put(THIS_MODULE);
1071 ret = 0;
1072 break;
1073 case CONTROL_CHANNEL:
1074 ret = channel_bctrl(bch, arg);
1075 break;
1076 default:
1077 pr_info("%s: %s unknown prim(%x)\n",
1078 card->name, __func__, cmd);
1079 }
1080 return ret;
1081 }
1082
1083 static int
1084 w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
1085 {
1086 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
1087 struct dchannel *dch = container_of(dev, struct dchannel, dev);
1088 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
1089 int ret = -EINVAL;
1090 struct mISDNhead *hh = mISDN_HEAD_P(skb);
1091 u32 id;
1092 u_long flags;
1093
1094 switch (hh->prim) {
1095 case PH_DATA_REQ:
1096 spin_lock_irqsave(&card->lock, flags);
1097 ret = dchannel_senddata(dch, skb);
1098 if (ret > 0) { /* direct TX */
1099 id = hh->id; /* skb can be freed */
1100 W6692_fill_Dfifo(card);
1101 ret = 0;
1102 spin_unlock_irqrestore(&card->lock, flags);
1103 queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
1104 } else
1105 spin_unlock_irqrestore(&card->lock, flags);
1106 return ret;
1107 case PH_ACTIVATE_REQ:
1108 ret = l1_event(dch->l1, hh->prim);
1109 break;
1110 case PH_DEACTIVATE_REQ:
1111 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
1112 ret = l1_event(dch->l1, hh->prim);
1113 break;
1114 }
1115
1116 if (!ret)
1117 dev_kfree_skb(skb);
1118 return ret;
1119 }
1120
1121 static int
1122 w6692_l1callback(struct dchannel *dch, u32 cmd)
1123 {
1124 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
1125 u_long flags;
1126
1127 pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
1128 switch (cmd) {
1129 case INFO3_P8:
1130 spin_lock_irqsave(&card->lock, flags);
1131 ph_command(card, W_L1CMD_AR8);
1132 spin_unlock_irqrestore(&card->lock, flags);
1133 break;
1134 case INFO3_P10:
1135 spin_lock_irqsave(&card->lock, flags);
1136 ph_command(card, W_L1CMD_AR10);
1137 spin_unlock_irqrestore(&card->lock, flags);
1138 break;
1139 case HW_RESET_REQ:
1140 spin_lock_irqsave(&card->lock, flags);
1141 if (card->state != W_L1IND_DRD)
1142 ph_command(card, W_L1CMD_RST);
1143 ph_command(card, W_L1CMD_ECK);
1144 spin_unlock_irqrestore(&card->lock, flags);
1145 break;
1146 case HW_DEACT_REQ:
1147 skb_queue_purge(&dch->squeue);
1148 if (dch->tx_skb) {
1149 dev_kfree_skb(dch->tx_skb);
1150 dch->tx_skb = NULL;
1151 }
1152 dch->tx_idx = 0;
1153 if (dch->rx_skb) {
1154 dev_kfree_skb(dch->rx_skb);
1155 dch->rx_skb = NULL;
1156 }
1157 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
1158 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
1159 del_timer(&dch->timer);
1160 break;
1161 case HW_POWERUP_REQ:
1162 spin_lock_irqsave(&card->lock, flags);
1163 ph_command(card, W_L1CMD_ECK);
1164 spin_unlock_irqrestore(&card->lock, flags);
1165 break;
1166 case PH_ACTIVATE_IND:
1167 test_and_set_bit(FLG_ACTIVE, &dch->Flags);
1168 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
1169 GFP_ATOMIC);
1170 break;
1171 case PH_DEACTIVATE_IND:
1172 test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
1173 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
1174 GFP_ATOMIC);
1175 break;
1176 default:
1177 pr_debug("%s: %s unknown command %x\n", card->name,
1178 __func__, cmd);
1179 return -1;
1180 }
1181 return 0;
1182 }
1183
1184 static int
1185 open_dchannel(struct w6692_hw *card, struct channel_req *rq)
1186 {
1187 pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
1188 card->dch.dev.id, __builtin_return_address(1));
1189 if (rq->protocol != ISDN_P_TE_S0)
1190 return -EINVAL;
1191 if (rq->adr.channel == 1)
1192 /* E-Channel not supported */
1193 return -EINVAL;
1194 rq->ch = &card->dch.dev.D;
1195 rq->ch->protocol = rq->protocol;
1196 if (card->dch.state == 7)
1197 _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
1198 0, NULL, GFP_KERNEL);
1199 return 0;
1200 }
1201
1202 static int
1203 w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1204 {
1205 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
1206 struct dchannel *dch = container_of(dev, struct dchannel, dev);
1207 struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
1208 struct channel_req *rq;
1209 int err = 0;
1210
1211 pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
1212 switch (cmd) {
1213 case OPEN_CHANNEL:
1214 rq = arg;
1215 if (rq->protocol == ISDN_P_TE_S0)
1216 err = open_dchannel(card, rq);
1217 else
1218 err = open_bchannel(card, rq);
1219 if (err)
1220 break;
1221 if (!try_module_get(THIS_MODULE))
1222 pr_info("%s: cannot get module\n", card->name);
1223 break;
1224 case CLOSE_CHANNEL:
1225 pr_debug("%s: dev(%d) close from %p\n", card->name,
1226 dch->dev.id, __builtin_return_address(0));
1227 module_put(THIS_MODULE);
1228 break;
1229 case CONTROL_CHANNEL:
1230 err = channel_ctrl(card, arg);
1231 break;
1232 default:
1233 pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
1234 return -EINVAL;
1235 }
1236 return err;
1237 }
1238
1239 static int
1240 setup_w6692(struct w6692_hw *card)
1241 {
1242 u32 val;
1243
1244 if (!request_region(card->addr, 256, card->name)) {
1245 pr_info("%s: config port %x-%x already in use\n", card->name,
1246 card->addr, card->addr + 255);
1247 return -EIO;
1248 }
1249 W6692Version(card);
1250 card->bc[0].addr = card->addr;
1251 card->bc[1].addr = card->addr + 0x40;
1252 val = ReadW6692(card, W_ISTA);
1253 if (debug & DEBUG_HW)
1254 pr_notice("%s ISTA=%02x\n", card->name, val);
1255 val = ReadW6692(card, W_IMASK);
1256 if (debug & DEBUG_HW)
1257 pr_notice("%s IMASK=%02x\n", card->name, val);
1258 val = ReadW6692(card, W_D_EXIR);
1259 if (debug & DEBUG_HW)
1260 pr_notice("%s D_EXIR=%02x\n", card->name, val);
1261 val = ReadW6692(card, W_D_EXIM);
1262 if (debug & DEBUG_HW)
1263 pr_notice("%s D_EXIM=%02x\n", card->name, val);
1264 val = ReadW6692(card, W_D_RSTA);
1265 if (debug & DEBUG_HW)
1266 pr_notice("%s D_RSTA=%02x\n", card->name, val);
1267 return 0;
1268 }
1269
1270 static void
1271 release_card(struct w6692_hw *card)
1272 {
1273 u_long flags;
1274
1275 spin_lock_irqsave(&card->lock, flags);
1276 disable_hwirq(card);
1277 w6692_mode(&card->bc[0], ISDN_P_NONE);
1278 w6692_mode(&card->bc[1], ISDN_P_NONE);
1279 if ((card->fmask & led) || card->subtype == W6692_USR) {
1280 card->xdata |= 0x04; /* LED OFF */
1281 WriteW6692(card, W_XDATA, card->xdata);
1282 }
1283 spin_unlock_irqrestore(&card->lock, flags);
1284 free_irq(card->irq, card);
1285 l1_event(card->dch.l1, CLOSE_CHANNEL);
1286 mISDN_unregister_device(&card->dch.dev);
1287 release_region(card->addr, 256);
1288 mISDN_freebchannel(&card->bc[1].bch);
1289 mISDN_freebchannel(&card->bc[0].bch);
1290 mISDN_freedchannel(&card->dch);
1291 write_lock_irqsave(&card_lock, flags);
1292 list_del(&card->list);
1293 write_unlock_irqrestore(&card_lock, flags);
1294 pci_disable_device(card->pdev);
1295 pci_set_drvdata(card->pdev, NULL);
1296 kfree(card);
1297 }
1298
1299 static int
1300 setup_instance(struct w6692_hw *card)
1301 {
1302 int i, err;
1303 u_long flags;
1304
1305 snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
1306 write_lock_irqsave(&card_lock, flags);
1307 list_add_tail(&card->list, &Cards);
1308 write_unlock_irqrestore(&card_lock, flags);
1309 card->fmask = (1 << w6692_cnt);
1310 _set_debug(card);
1311 spin_lock_init(&card->lock);
1312 mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
1313 card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
1314 card->dch.dev.D.send = w6692_l2l1D;
1315 card->dch.dev.D.ctrl = w6692_dctrl;
1316 card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1317 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
1318 card->dch.hw = card;
1319 card->dch.dev.nrbchan = 2;
1320 for (i = 0; i < 2; i++) {
1321 mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM);
1322 card->bc[i].bch.hw = card;
1323 card->bc[i].bch.nr = i + 1;
1324 card->bc[i].bch.ch.nr = i + 1;
1325 card->bc[i].bch.ch.send = w6692_l2l1B;
1326 card->bc[i].bch.ch.ctrl = w6692_bctrl;
1327 set_channelmap(i + 1, card->dch.dev.channelmap);
1328 list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
1329 }
1330 err = setup_w6692(card);
1331 if (err)
1332 goto error_setup;
1333 err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
1334 card->name);
1335 if (err)
1336 goto error_reg;
1337 err = init_card(card);
1338 if (err)
1339 goto error_init;
1340 err = create_l1(&card->dch, w6692_l1callback);
1341 if (!err) {
1342 w6692_cnt++;
1343 pr_notice("W6692 %d cards installed\n", w6692_cnt);
1344 return 0;
1345 }
1346
1347 free_irq(card->irq, card);
1348 error_init:
1349 mISDN_unregister_device(&card->dch.dev);
1350 error_reg:
1351 release_region(card->addr, 256);
1352 error_setup:
1353 mISDN_freebchannel(&card->bc[1].bch);
1354 mISDN_freebchannel(&card->bc[0].bch);
1355 mISDN_freedchannel(&card->dch);
1356 write_lock_irqsave(&card_lock, flags);
1357 list_del(&card->list);
1358 write_unlock_irqrestore(&card_lock, flags);
1359 kfree(card);
1360 return err;
1361 }
1362
1363 static int __devinit
1364 w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1365 {
1366 int err = -ENOMEM;
1367 struct w6692_hw *card;
1368 struct w6692map *m = (struct w6692map *)ent->driver_data;
1369
1370 card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
1371 if (!card) {
1372 pr_info("No kmem for w6692 card\n");
1373 return err;
1374 }
1375 card->pdev = pdev;
1376 card->subtype = m->subtype;
1377 err = pci_enable_device(pdev);
1378 if (err) {
1379 kfree(card);
1380 return err;
1381 }
1382
1383 printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
1384 m->name, pci_name(pdev));
1385
1386 card->addr = pci_resource_start(pdev, 1);
1387 card->irq = pdev->irq;
1388 pci_set_drvdata(pdev, card);
1389 err = setup_instance(card);
1390 if (err)
1391 pci_set_drvdata(pdev, NULL);
1392 return err;
1393 }
1394
1395 static void __devexit
1396 w6692_remove_pci(struct pci_dev *pdev)
1397 {
1398 struct w6692_hw *card = pci_get_drvdata(pdev);
1399
1400 if (card)
1401 release_card(card);
1402 else
1403 if (debug)
1404 pr_notice("%s: drvdata allready removed\n", __func__);
1405 }
1406
1407 static struct pci_device_id w6692_ids[] = {
1408 { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
1409 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
1410 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
1411 PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
1412 (ulong)&w6692_map[2]},
1413 { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
1414 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
1415 { }
1416 };
1417 MODULE_DEVICE_TABLE(pci, w6692_ids);
1418
1419 static struct pci_driver w6692_driver = {
1420 .name = "w6692",
1421 .probe = w6692_probe,
1422 .remove = __devexit_p(w6692_remove_pci),
1423 .id_table = w6692_ids,
1424 };
1425
1426 static int __init w6692_init(void)
1427 {
1428 int err;
1429
1430 pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
1431
1432 err = pci_register_driver(&w6692_driver);
1433 return err;
1434 }
1435
1436 static void __exit w6692_cleanup(void)
1437 {
1438 pci_unregister_driver(&w6692_driver);
1439 }
1440
1441 module_init(w6692_init);
1442 module_exit(w6692_cleanup);